diff --git a/demos/ARM7-LPC214x-GCC-minimal/Makefile b/demos/ARM7-LPC214x-GCC-minimal/Makefile
new file mode 100644
index 000000000..f440f799d
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/Makefile
@@ -0,0 +1,197 @@
+#
+# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
+#
+##############################################################################################
+#
+# On command line:
+#
+# make all = Create project
+#
+# make clean = Clean project files.
+#
+# To rebuild project do "make clean" and "make all".
+#
+
+##############################################################################################
+# Start of default section
+#
+
+TRGT = arm-elf-
+CC = $(TRGT)gcc
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+MCU = arm7tdmi
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################################
+
+##############################################################################################
+# Start of user section
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List ARM-mode C source files here
+ASRC = chcore.c \
+ ../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
+ ../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c \
+ ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c \
+ ../../ports/ARM7-LPC214x/GCC/vic.c \
+ main.c
+
+
+# List THUMB-mode C sources here
+# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
+# enabled for all modules and that lowers performance.
+TSRC =
+
+# List ASM source files here
+ASMSRC = crt0.s chcore2.s
+
+# List all user directories here
+UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb -D THUMB
+
+# Common options here
+# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
+# chconf.h.
+# NOTE: -falign-functions=16 may improve the performance, not always, but
+# increases the code size.
+OPT = -O2 -ggdb -fomit-frame-pointer -fno-strict-aliasing
+#OPT += -ffixed-r7
+OPT += -falign-functions=16
+
+# Define warning options here
+WARN = -Wall -Wstrict-prototypes
+
+#
+# End of user defines
+##############################################################################################
+
+INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
+LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+AOBJS = $(ASRC:.c=.o)
+TOBJS = $(TSRC:.c=.o)
+OBJS = $(ASMOBJS) $(AOBJS) $(TOBJS)
+ASMOBJS = $(ASMSRC:.s=.o)
+LIBS = $(DLIBS) $(ULIBS)
+MCFLAGS = -mcpu=$(MCU)
+
+ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
+CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
+LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
+ODFLAGS = -x --syms
+
+# Thumb interwork enabled only if needed because it kills performance.
+ifneq ($(TSRC),)
+ ifneq ($(ASRC),)
+ # Both ARM and THUMB case
+ CPFLAGS += -mthumb-interwork -D THUMB
+ LDFLAGS += -mthumb-interwork
+ ASFLAGS += -mthumb-interwork -D THUMB
+ else
+ # Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
+ CPFLAGS += -D THUMB
+ LDFLAGS += -mthumb
+ ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
+ endif
+endif
+
+# Generate dependency information
+CPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+#
+# Makefile rules
+#
+
+all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp
+
+$(AOBJS) : %.o : %.c
+ @echo
+ $(CC) -c $(CPFLAGS) $(AOPT) -I . $(INCDIR) $< -o $@
+
+$(TOBJS) : %.o : %.c
+ @echo
+ $(CC) -c $(CPFLAGS) $(TOPT) -mthumb -I . $(INCDIR) $< -o $@
+
+$(ASMOBJS) : %.o : %.s
+ @echo
+ $(AS) -c $(ASFLAGS) $< -o $@
+
+%elf: $(OBJS)
+ @echo
+ $(CC) $(ASMOBJS) $(AOBJS) $(TOBJS) $(LDFLAGS) $(LIBS) -o $@
+
+%hex: %elf
+ $(HEX) $< $@
+
+%bin: %elf
+ $(BIN) $< $@
+
+%dmp: %elf
+ $(OD) $(ODFLAGS) $< > $@
+
+clean:
+ -rm -f $(OBJS)
+ -rm -f $(PROJECT).elf
+ -rm -f $(PROJECT).dmp
+ -rm -f $(PROJECT).map
+ -rm -f $(PROJECT).hex
+ -rm -f $(PROJECT).bin
+ -rm -f $(ASRC:.c=.c.bak)
+ -rm -f $(ASRC:.c=.lst)
+ -rm -f $(TSRC:.c=.c.bak)
+ -rm -f $(TSRC:.c=.lst)
+ -rm -f $(ASMSRC:.s=.s.bak)
+ -rm -f $(ASMSRC:.s=.lst)
+ -rm -fR .dep
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***
diff --git a/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb b/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb
new file mode 100644
index 000000000..03f2c7ba9
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/Makefile.thumb
@@ -0,0 +1,196 @@
+#
+# !!!! Do NOT edit this makefile with an editor which replace tabs by spaces !!!!
+#
+##############################################################################################
+#
+# On command line:
+#
+# make all = Create project
+#
+# make clean = Clean project files.
+#
+# To rebuild project do "make clean" and "make all".
+#
+
+##############################################################################################
+# Start of default section
+#
+
+TRGT = arm-elf-
+CC = $(TRGT)gcc
+CP = $(TRGT)objcopy
+AS = $(TRGT)gcc -x assembler-with-cpp
+OD = $(TRGT)objdump
+HEX = $(CP) -O ihex
+BIN = $(CP) -O binary
+
+MCU = arm7tdmi
+
+# List all default C defines here, like -D_DEBUG=1
+DDEFS =
+
+# List all default ASM defines here, like -D_DEBUG=1
+DADEFS =
+
+# List all default directories to look for include files here
+DINCDIR =
+
+# List the default directory to look for the libraries here
+DLIBDIR =
+
+# List all default libraries here
+DLIBS =
+
+#
+# End of default section
+##############################################################################################
+
+##############################################################################################
+# Start of user section
+#
+
+# Define project name here
+PROJECT = ch
+
+# Define linker script file here
+LDSCRIPT= ch.ld
+
+# List all user C define here, like -D_DEBUG=1
+UDEFS =
+
+# Define ASM defines here
+UADEFS =
+
+# List ARM-mode C source files here
+ASRC =
+
+# List THUMB-mode C sources here
+# NOTE: If any module is compiled in thumb mode then -mthumb-interwork is
+# enabled for all modules and that lowers performance.
+TSRC = chcore.c \
+ ../../src/chinit.c ../../src/chdebug.c ../../src/chlists.c ../../src/chdelta.c \
+ ../../src/chschd.c ../../src/chthreads.c ../../src/chsem.c ../../src/chevents.c \
+ ../../src/chmsg.c ../../src/chsleep.c ../../src/chqueues.c ../../src/chserial.c \
+ ../../ports/ARM7-LPC214x/GCC/vic.c \
+ main.c
+
+# List ASM source files here
+ASMSRC = crt0.s chcore2.s
+
+# List all user directories here
+UINCDIR = ../../src/include ../../src/lib ../../ports/ARM7-LPC214x/GCC
+
+# List the user directory to look for the libraries here
+ULIBDIR =
+
+# List all user libraries here
+ULIBS =
+
+# ARM-specific options here
+AOPT =
+
+# THUMB-specific options here
+TOPT = -mthumb
+
+# Common options here
+# NOTE: -ffixed-r7 is only needed if you enabled CH_CURRP_REGISTER_CACHE in
+# chconf.h.
+# NOTE: -falign-functions=16 may improve the performance, not always, but
+# increases the code size.
+OPT = -Os -ggdb -fomit-frame-pointer -fno-strict-aliasing
+#OPT += -ffixed-r7
+OPT += -falign-functions=16
+
+# Define warning options here
+WARN = -Wall -Wstrict-prototypes
+
+#
+# End of user defines
+##############################################################################################
+
+INCDIR = $(patsubst %,-I%,$(DINCDIR) $(UINCDIR))
+LIBDIR = $(patsubst %,-L%,$(DLIBDIR) $(ULIBDIR))
+DEFS = $(DDEFS) $(UDEFS)
+ADEFS = $(DADEFS) $(UADEFS)
+AOBJS = $(ASRC:.c=.o)
+TOBJS = $(TSRC:.c=.o)
+OBJS = $(ASMOBJS) $(AOBJS) $(TOBJS)
+ASMOBJS = $(ASMSRC:.s=.o)
+LIBS = $(DLIBS) $(ULIBS)
+MCFLAGS = -mcpu=$(MCU)
+
+ASFLAGS = $(MCFLAGS) -Wa,-amhls=$(<:.s=.lst) $(ADEFS)
+CPFLAGS = $(MCFLAGS) $(OPT) $(WARN) -Wa,-ahlms=$(<:.c=.lst) $(DEFS)
+LDFLAGS = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) -Wl,-Map=$(PROJECT).map,--cref,--no-warn-mismatch $(LIBDIR)
+ODFLAGS = -x --syms
+
+# Thumb interwork enabled only if needed because it kills performance.
+ifneq ($(TSRC),)
+ ifneq ($(ASRC),)
+ # Both ARM and THUMB case
+ CPFLAGS += -mthumb-interwork -D THUMB
+ LDFLAGS += -mthumb-interwork
+ ASFLAGS += -mthumb-interwork -D THUMB
+ else
+ # Pure THUMB case, THUMB C code cannot be called by ARM asm code directly
+ CPFLAGS += -D THUMB -D THUMB_NO_INTERWORKING
+ LDFLAGS += -mthumb
+ ASFLAGS += -mthumb-interwork -D THUMB -D THUMB_NO_INTERWORKING
+ endif
+endif
+
+# Generate dependency information
+CPFLAGS += -MD -MP -MF .dep/$(@F).d
+
+#
+# Makefile rules
+#
+
+all: $(OBJS) $(PROJECT).elf $(PROJECT).hex $(PROJECT).bin $(PROJECT).dmp
+
+$(AOBJS) : %.o : %.c
+ @echo
+ $(CC) -c $(CPFLAGS) $(AOPT) -I . $(INCDIR) $< -o $@
+
+$(TOBJS) : %.o : %.c
+ @echo
+ $(CC) -c $(CPFLAGS) $(TOPT) -I . $(INCDIR) $< -o $@
+
+$(ASMOBJS) : %.o : %.s
+ @echo
+ $(AS) -c $(ASFLAGS) $< -o $@
+
+%elf: $(OBJS)
+ @echo
+ $(CC) $(ASMOBJS) $(AOBJS) $(TOBJS) $(LDFLAGS) $(LIBS) -o $@
+
+%hex: %elf
+ $(HEX) $< $@
+
+%bin: %elf
+ $(BIN) $< $@
+
+%dmp: %elf
+ $(OD) $(ODFLAGS) $< > $@
+
+clean:
+ -rm -f $(OBJS)
+ -rm -f $(PROJECT).elf
+ -rm -f $(PROJECT).dmp
+ -rm -f $(PROJECT).map
+ -rm -f $(PROJECT).hex
+ -rm -f $(PROJECT).bin
+ -rm -f $(ASRC:.c=.c.bak)
+ -rm -f $(ASRC:.c=.lst)
+ -rm -f $(TSRC:.c=.c.bak)
+ -rm -f $(TSRC:.c=.lst)
+ -rm -f $(ASMSRC:.s=.s.bak)
+ -rm -f $(ASMSRC:.s=.lst)
+ -rm -fR .dep
+
+#
+# Include the dependency files, should be the last of the makefile
+#
+-include $(shell mkdir .dep 2>/dev/null) $(wildcard .dep/*)
+
+# *** EOF ***
diff --git a/demos/ARM7-LPC214x-GCC-minimal/ch.ld b/demos/ARM7-LPC214x-GCC-minimal/ch.ld
new file mode 100644
index 000000000..ace1c3b53
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/ch.ld
@@ -0,0 +1,85 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/*
+ * LPC2148 memory setup.
+ */
+__und_stack_size__ = 0x0004;
+__abt_stack_size__ = 0x0004;
+__fiq_stack_size__ = 0x0010;
+__irq_stack_size__ = 0x0080;
+__svc_stack_size__ = 0x0004;
+__sys_stack_size__ = 0x0100;
+__stacks_total_size__ = __und_stack_size__ + __abt_stack_size__ + __fiq_stack_size__ + __irq_stack_size__ + __svc_stack_size__ + __sys_stack_size__;
+
+MEMORY
+{
+ flash : org = 0x00000000, len = 512k - 12k
+ ram : org = 0x40000200, len = 32k - 0x200 - 288
+}
+
+__ram_start__ = ORIGIN(ram);
+__ram_size__ = LENGTH(ram);
+__ram_end__ = __ram_start__ + __ram_size__;
+__dma_start__ = 0x7FD00000;
+__dma_size__ = 8k;
+__dma_end__ = 0x7FD00000 + __dma_size__;
+
+SECTIONS
+{
+ . = 0;
+
+ .text :
+ {
+ _text = .;
+ *(.text);
+ *(.rodata);
+ *(.rodata*);
+ *(.glue_7t);
+ *(.glue_7);
+ . = ALIGN(4);
+ _etext = .;
+ } > flash
+
+ _textdata = _etext;
+
+ .data :
+ {
+ _data = .;
+ *(.data)
+ . = ALIGN(4);
+ _edata = .;
+ } > ram AT > flash
+
+ .bss :
+ {
+ _bss_start = .;
+ *(.bss)
+ . = ALIGN(4);
+ *(COMMON)
+ . = ALIGN(4);
+ _bss_end = .;
+ } > ram
+}
+
+PROVIDE(end = .);
+_end = .;
+
+__heap_base__ = _end;
+__heap_end__ = __ram_end__ - __stacks_total_size__;
diff --git a/demos/ARM7-LPC214x-GCC-minimal/chconf.h b/demos/ARM7-LPC214x-GCC-minimal/chconf.h
new file mode 100644
index 000000000..70908e292
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/chconf.h
@@ -0,0 +1,167 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/*
+ * Configuration file for LPC214x-GCC demo project.
+ */
+
+/**
+ * @addtogroup Config
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/** Configuration option: if specified then time efficient rather than space
+ * efficient code is used when two possible implementations exist, note
+ * that this is not related to the compiler optimization options.*/
+//#define CH_OPTIMIZE_SPEED
+
+/** Configuration option: if specified then the Virtual Timers subsystem is
+ * included in the kernel.*/
+#define CH_USE_VIRTUAL_TIMERS
+
+/** Configuration option: if specified then the System Timer subsystem is
+ * included in the kernel.*/
+#define CH_USE_SYSTEMTIME
+
+/** Configuration option: if specified then the \p chThdSleep() function is
+ * included in the kernel.
+ * @note requires \p CH_USE_VIRTUAL_TIMERS.*/
+#define CH_USE_SLEEP
+
+/** Configuration option: if specified then the \p chThdResume()
+ * function is included in the kernel.*/
+#define CH_USE_RESUME
+
+/** Configuration option: if specified then the \p chThdSuspend()
+ * function is included in the kernel.*/
+#define CH_USE_SUSPEND
+
+/** Configuration option: if specified then the \p chThdTerminate()
+ * and \p chThdShouldTerminate() functions are included in the kernel.*/
+//#define CH_USE_TERMINATE
+
+/** Configuration option: if specified then the \p chThdWait() function
+ * is included in the kernel.*/
+//#define CH_USE_WAITEXIT
+
+/** Configuration option: if specified then the Semaphores APIs are included
+ * in the kernel.*/
+#define CH_USE_SEMAPHORES
+
+/** Configuration option: if specified then the Semaphores atomic Signal+Wait
+ * APIs are included in the kernel.*/
+//#define CH_USE_SEMSW
+
+/** Configuration option: if specified then the Semaphores with timeout APIs
+ * are included in the kernel.
+ * @note requires \p CH_USE_SEMAPHORES.
+ * @note requires \p CH_USE_VIRTUAL_TIMERS.*/
+//#define CH_USE_SEMAPHORES_TIMEOUT
+
+/** Configuration option: if specified then the Semaphores APIs with priority
+ * shift are included in the kernel.
+ * @note requires \p CH_USE_SEMAPHORES.*/
+//#define CH_USE_RT_SEMAPHORES
+
+/** Configuration option: if specified then the Events APIs are included in
+ * the kernel.*/
+//#define CH_USE_EVENTS
+
+/** Configuration option: if specified then the \p chEvtWaitTimeout()
+ * function is included in the kernel.
+ * @note requires \p CH_USE_EVENTS.
+ * @note requires \p CH_USE_VIRTUAL_TIMERS.*/
+//#define CH_USE_EVENTS_TIMEOUT
+
+/** Configuration option: if specified then the Synchronous Messages APIs are
+ * included in the kernel.*/
+//#define CH_USE_MESSAGES
+
+/** Configuration option: if specified then the \p chMsgSendTimeout()
+ * function is included in the kernel.
+ * @note requires \p CH_USE_MESSAGES.
+ * @note requires \p CH_USE_VIRTUAL_TIMERS.*/
+//#define CH_USE_MESSAGES_TIMEOUT
+
+/** Configuration option: if specified then the \p chMsgSendWithEvent()
+ * function is included in the kernel.
+ * @note requires \p CH_USE_MESSAGES.
+ * @note requires \p CH_USE_VIRTUAL_TIMERS.*/
+//#define CH_USE_MESSAGES_EVENT
+
+/** Configuration option: if specified then the
+ * \p chThdGetExitEventSource() function is included in the kernel.
+ * @note requires \p CH_USE_MESSAGES.
+ * @note requires \p CH_USE_EVENTS.*/
+//#define CH_USE_EXIT_EVENT
+
+/** Configuration option: if specified then the I/O queues APIs are included
+ * in the kernel.*/
+//#define CH_USE_QUEUES
+
+/** Configuration option: if specified then the halfduplex queue APIs are
+ * included in the kernel.*/
+//#define CH_USE_QUEUES_HALFDUPLEX
+
+/** Configuration option: if specified then the I/O queues with timeout
+ * APIs are included in the kernel.
+ * @note requires \p CH_USE_SEMAPHORES_TIMEOUT.*/
+//#define CH_USE_QUEUES_TIMEOUT
+
+/** Configuration option: if specified then the full duplex serial driver APIs
+ * are included in the kernel.*/
+//#define CH_USE_SERIAL_FULLDUPLEX
+
+/** Configuration option: if specified then the half duplex serial driver APIs
+ * are included in the kernel.*/
+//#define CH_USE_SERIAL_HALFDUPLEX
+
+/** Configuration option: Frequency of the system timer that drives the system
+ * ticks. This also defines the system time unit.*/
+#define CH_FREQUENCY 1000
+
+/** Configuration option: This constant is the number of ticks allowed for the
+ * threads before preemption occurs.*/
+#define CH_TIME_QUANTUM 20
+
+/** Configuration option: Defines a CPU register to be used as storage for the
+ * global \p currp variable. Caching this variable in a register can greatly
+ * improve both space and time efficiency of the generated code. Another side
+ * effect is that one less register has to be saved during the context switch
+ * resulting in lower RAM usage and faster code.
+ * @note This option is only useable with the GCC compiler and is only useful
+ * on processors with many registers like ARM cores.
+ * @note If this option is enabled then ALL the libraries linked to the
+ * ChibiOS/RT code must be recompiled with the GCC option \p
+ * -ffixed-.
+ */
+//#define CH_CURRP_REGISTER_CACHE "r7"
+
+/** Configuration option: Includes basic debug support to the kernel.
+ * @note the debug support is port-dependent, it may be not present on some
+ * targets. In that case stub functions will be included.
+ */
+//#define CH_USE_DEBUG
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/ARM7-LPC214x-GCC-minimal/chcore.c b/demos/ARM7-LPC214x-GCC-minimal/chcore.c
new file mode 100644
index 000000000..068774d17
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/chcore.c
@@ -0,0 +1,184 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+#include
+
+#include "lpc214x.h"
+#include "vic.h"
+//#include "lpc214x_serial.h"
+//#include "lpc214x_ssp.h"
+//#include "mmcsd.h"
+
+//#include "buzzer.h"
+
+extern void IrqHandler(void);
+extern void T0IrqHandler(void);
+
+#define VAL_TC0_PRESCALER 0
+
+/*
+ * Pins configuration for Olimex LPC-P2148.
+ *
+ * PINSEL0
+ * P0 P0 P0 P0 P0 P0 RXD TXD SSE MOS MIS SCK SDA SCL RXD TXD
+ * 15 14 13 12 11 10 1 1 L0 I0 O0 0 0 0 0 0
+ * 00 00 00 00 00 00 01 01 01 01 01 01 01 01 01 01
+ * IN IN OUT OUT OUT OUT -- -- -- -- -- -- -- -- -- --
+ * 0 0 1 1 1 1 0 0 0 0 0 0 0 0 0 0
+ *
+ * PINSEL1
+ * P0 AD P0 P0 -- -- AO -- VB P0 P0 P0 MOS MIS SCK P0
+ * 31 03 29 28 -- -- UT -- US 22 21 20 I1 O1 1 16
+ * 00 01 00 00 00 00 10 00 01 00 00 00 10 10 10 00
+ * OUT -- OUT OUT -- -- -- -- -- OUT OUT OUT -- -- -- IN
+ * 1 0 1 1 0 0 0 0 0 1 1 1 0 0 0 0
+ *
+ * PINSEL2
+ * -- -- -- -- -- -- -- -- -- -- -- -- -- -- GP DBG --
+ * -- -- -- -- -- -- -- -- -- -- -- -- -- -- IO --
+ * 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0 1 00
+ * -- -- -- -- -- -- -- -- -- -- -- -- -- -- IN -- --
+ */
+#define VAL_PINSEL0 0x00055555
+#define VAL_PINSEL1 0x100840A8
+#define VAL_PINSEL2 0x00000004
+#define VAL_FIO0DIR 0xB0703C00
+#define VAL_FIO1DIR 0x00000000
+
+/*
+ * Hardware initialization goes here.
+ * NOTE: Interrupts are still disabled.
+ */
+void hwinit(void) {
+
+ /*
+ * All peripherals clock disabled by default in order to save power.
+ */
+ PCONP = PCRTC | PCTIM0;
+
+ /*
+ * MAM setup.
+ */
+ MAMTIM = 0x3; /* 3 cycles for flash accesses. */
+ MAMCR = 0x2; /* MAM fully enabled. */
+
+ /*
+ * PLL setup for Fosc=12MHz and CCLK=48MHz.
+ * P=2 M=3.
+ */
+ PLL *pll = PLLBase;
+ pll->PLL0_CFG = 0x23; /* P and M values. */
+ pll->PLL0_CON = 0x1; /* Enalbles the PLL 0. */
+ pll->PLL0_FEED = 0xAA;
+ pll->PLL0_FEED = 0x55;
+ while (!(pll->PLL0_STAT & 0x400))
+ ; /* Wait for PLL lock. */
+
+ pll->PLL0_CON = 0x3; /* Connects the PLL. */
+ pll->PLL0_FEED = 0xAA;
+ pll->PLL0_FEED = 0x55;
+
+ /*
+ * VPB setup.
+ * PCLK = CCLK / 4.
+ */
+ VPBDIV = VPD_D4;
+
+ /*
+ * I/O pins configuration.
+ */
+ PINSEL0 = VAL_PINSEL0;
+ PINSEL1 = VAL_PINSEL1;
+ PINSEL2 = VAL_PINSEL2;
+ IO0DIR = VAL_FIO0DIR;
+ IO0SET = 0xFFFFFFFF;
+ IO1DIR = VAL_FIO1DIR;
+ IO1SET = 0xFFFFFFFF;
+
+ /*
+ * Interrupt vectors assignment.
+ */
+ InitVIC();
+ VICDefVectAddr = (IOREG32)IrqHandler;
+ SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
+// SetVICVector(UART0IrqHandler, 1, SOURCE_UART0);
+// SetVICVector(UART1IrqHandler, 2, SOURCE_UART1);
+
+ /*
+ * System Timer initialization, 1ms intervals.
+ */
+ VICIntEnable = INTMASK(SOURCE_Timer0);
+ TC *timer = T0Base;
+ timer->TC_PR = VAL_TC0_PRESCALER;
+ timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
+ timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
+ timer->TC_TCR = 2; /* Reset counter and prescaler. */
+ timer->TC_TCR = 1; /* Timer enabled. */
+
+ /*
+ * Other subsystems.
+ */
+// InitSerial();
+// InitSSP();
+// InitMMC();
+// InitBuzzer();
+}
+
+/*
+ * System idle thread loop.
+ */
+void _IdleThread(void *p) {
+
+ while (TRUE) {
+// Note, it is disabled because it causes trouble with the JTAG probe.
+// Enable it in the final code only.
+// PCON = 1;
+ }
+}
+
+/*
+ * System halt.
+ * Yellow LED only.
+ */
+void chSysHalt(void) {
+
+ chSysLock();
+ IO0SET = 0x00000C00;
+ IO0CLR = 0x80000000;
+ while (TRUE)
+ ;
+}
+
+/*
+ * Non-vectored IRQs handling here.
+ */
+void NonVectoredIrq(void) {
+
+ VICVectAddr = 0;
+}
+
+/*
+ * Timer 0 IRQ handling here.
+ */
+void Timer0Irq(void) {
+
+ T0IR = 1; /* Clear interrupt on match MR0. */
+ chSchTimerHandlerI();
+ VICVectAddr = 0;
+}
diff --git a/demos/ARM7-LPC214x-GCC-minimal/chcore.h b/demos/ARM7-LPC214x-GCC-minimal/chcore.h
new file mode 100644
index 000000000..d5ad07040
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/chcore.h
@@ -0,0 +1,117 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+#ifndef _CHCORE_H_
+#define _CHCORE_H_
+
+/*
+ * The following values are implementation dependent. You may change them in
+ * order to match your HW.
+ */
+#define FOSC 12000000
+#define CCLK 48000000
+#define PCLK 12000000
+
+typedef void *regarm;
+
+/*
+ * Interrupt saved context.
+ */
+struct extctx {
+ regarm spsr_irq;
+ regarm lr_irq;
+ regarm r0;
+ regarm r1;
+ regarm r2;
+ regarm r3;
+ regarm r12;
+};
+
+/*
+ * System saved context.
+ */
+struct intctx {
+ regarm r4;
+ regarm r5;
+ regarm r6;
+#ifndef CH_CURRP_REGISTER_CACHE
+ regarm r7;
+#endif
+ regarm r8;
+ regarm r9;
+ regarm r10;
+ regarm r11;
+ regarm lr;
+};
+
+/*
+ * Port dependent part of the Thread structure, you may add fields in
+ * this structure.
+ */
+typedef struct {
+ struct intctx *r13;
+} Context;
+
+/*
+ * Platform dependent part of the \p chThdCreate() API.
+ */
+#define SETUP_CONTEXT(workspace, wsize, pf, arg) { \
+ tp->p_ctx.r13 = (struct intctx *)((BYTE8 *)workspace + \
+ wsize - \
+ sizeof(struct intctx)); \
+ tp->p_ctx.r13->r4 = pf; \
+ tp->p_ctx.r13->r5 = arg; \
+ tp->p_ctx.r13->lr = threadstart; \
+}
+
+#ifdef THUMB
+extern void chSysLock(void);
+extern void chSysUnlock(void);
+#else /* !THUMB */
+#define chSysLock() asm("msr CPSR_c, #0x9F")
+#define chSysUnlock() asm("msr CPSR_c, #0x1F")
+#endif /* THUMB */
+
+#define chSysPuts(msg) {}
+
+#ifdef THUMB
+#define INT_REQUIRED_STACK 0x10
+#else /* !THUMB */
+#define INT_REQUIRED_STACK 0
+#endif /* THUMB */
+#define UserStackSize(n) (((sizeof(Thread) + \
+ sizeof(struct intctx) + \
+ sizeof(struct extctx) + \
+ (INT_REQUIRED_STACK) + \
+ (n) - 1) | 3) + 1)
+
+#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
+
+/* It requires zero bytes, but better be safe.*/
+#define IDLE_THREAD_STACK_SIZE 8
+void _IdleThread(void *p) __attribute__((noreturn));
+
+void chSysHalt(void) __attribute__((noreturn));
+void chSysSwitchI(Context *oldp, Context *newp);
+void threadstart(void);
+void DefFiqHandler(void);
+void DefIrqHandler(void);
+void SpuriousHandler(void);
+
+#endif /* _CHCORE_H_ */
diff --git a/demos/ARM7-LPC214x-GCC-minimal/chcore2.s b/demos/ARM7-LPC214x-GCC-minimal/chcore2.s
new file mode 100644
index 000000000..f8906d022
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/chcore2.s
@@ -0,0 +1,251 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+#include "chconf.h"
+
+.set MODE_USR, 0x10
+.set MODE_FIQ, 0x11
+.set MODE_IRQ, 0x12
+.set MODE_SVC, 0x13
+.set MODE_ABT, 0x17
+.set MODE_UND, 0x1B
+.set MODE_SYS, 0x1F
+
+.equ I_BIT, 0x80
+.equ F_BIT, 0x40
+
+.text
+.code 32
+.balign 4
+
+.globl threadstart
+threadstart:
+ msr CPSR_c, #MODE_SYS
+#ifndef THUMB_NO_INTERWORKING
+ mov r0, r5
+ mov lr, pc
+ bx r4
+ bl chThdExit
+#else
+ add r0, pc, #1
+ bx r0
+.code 16
+ mov r0, r5
+ mov lr, pc
+ bx r4
+ bl chThdExit
+.code 32
+#endif
+
+.globl UndHandler
+UndHandler:
+
+.globl SwiHandler
+SwiHandler:
+
+.globl PrefetchHandler
+PrefetchHandler:
+
+.globl AbortHandler
+AbortHandler:
+
+.globl FiqHandler
+FiqHandler:
+#ifdef THUMB_NO_INTERWORKING
+ ldr r0, =chSysHalt
+ bx r0
+#else
+ bl chSysHalt
+#endif
+
+#ifdef THUMB
+.globl chSysLock
+chSysLock:
+ msr CPSR_c, #0x9F
+ bx lr
+
+.globl chSysUnlock
+chSysUnlock:
+ msr CPSR_c, #0x1F
+ bx lr
+#endif
+
+.globl chSysSwitchI
+chSysSwitchI:
+#ifdef CH_CURRP_REGISTER_CACHE
+ stmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
+ str sp, [r0, #0]
+ ldr sp, [r1, #0]
+#ifdef THUMB
+ ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, lr}
+ bx lr
+#else
+ ldmfd sp!, {r4, r5, r6, r8, r9, r10, r11, pc}
+#endif
+#else
+ stmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
+ str sp, [r0, #0]
+ ldr sp, [r1, #0]
+#ifdef THUMB
+ ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, lr}
+ bx lr
+#else
+ ldmfd sp!, {r4, r5, r6, r7, r8, r9, r10, r11, pc}
+#endif
+#endif /* CH_CURRP_REGISTER_CACHE */
+
+/*
+ * System stack frame structure after a context switch in the
+ * interrupt handler:
+ *
+ * High +------------+
+ * | R12 | -+
+ * | R3 | |
+ * | R2 | |
+ * | R1 | | External context: IRQ handler frame
+ * | R0 | |
+ * | LR_IRQ | | (user code return address)
+ * | SPSR | -+ (user code status)
+ * | .... | <- mk_DoRescheduleI() stack frame, optimize it for space
+ * | LR | -+ (system code return address)
+ * | R11 | |
+ * | R10 | |
+ * | R9 | |
+ * | R8 | | Internal context: mk_SwitchI() frame
+ * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
+ * | R6 | |
+ * | R5 | |
+ * SP-> | R4 | -+
+ * Low +------------+
+ */
+.globl IrqHandler
+IrqHandler:
+ sub lr, lr, #4
+ stmfd sp!, {r0-r3, r12, lr}
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl NonVectoredIrq
+ b IrqCommon
+.code 32
+#else
+ bl NonVectoredIrq
+ b IrqCommon
+#endif
+
+.globl T0IrqHandler
+T0IrqHandler:
+ sub lr, lr, #4
+ stmfd sp!, {r0-r3, r12, lr}
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl Timer0Irq
+ b IrqCommon
+.code 32
+#else
+ bl Timer0Irq
+ b IrqCommon
+#endif
+
+/*
+.globl UART0IrqHandler
+UART0IrqHandler:
+ sub lr, lr, #4
+ stmfd sp!, {r0-r3, r12, lr}
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl UART0Irq
+ b IrqCommon
+.code 32
+#else
+ bl UART0Irq
+ b IrqCommon
+#endif
+
+.globl UART1IrqHandler
+UART1IrqHandler:
+ sub lr, lr, #4
+ stmfd sp!, {r0-r3, r12, lr}
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl UART1Irq
+ b IrqCommon
+.code 32
+#else
+ bl UART1Irq
+ b IrqCommon
+#endif
+*/
+
+/*
+ * Common exit point for all IRQ routines, it performs the rescheduling if
+ * required.
+ */
+IrqCommon:
+#ifdef THUMB_NO_INTERWORKING
+.code 16
+ bl chSchRescRequiredI
+ mov lr, pc
+ bx lr
+.code 32
+#else
+ bl chSchRescRequiredI
+#endif
+ cmp r0, #0 // Simply returns if a
+ ldmeqfd sp!, {r0-r3, r12, pc}^ // reschedule is not required.
+
+ // Saves the IRQ mode registers in the system stack.
+ ldmfd sp!, {r0-r3, r12, lr} // IRQ stack now empty.
+ msr CPSR_c, #MODE_SYS | I_BIT
+ stmfd sp!, {r0-r3, r12} // Registers on System Stack.
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ mrs r0, SPSR
+ mov r1, lr
+ msr CPSR_c, #MODE_SYS | I_BIT
+ stmfd sp!, {r0, r1} // Push R0=SPSR, R1=LR_IRQ.
+
+ // Context switch.
+#ifdef THUMB_NO_INTERWORKING
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl chSchDoRescheduleI
+ mov lr, pc
+ bx lr
+.code 32
+#else
+ bl chSchDoRescheduleI
+#endif
+
+ // Re-establish the IRQ conditions again.
+ ldmfd sp!, {r0, r1} // Pop R0=SPSR, R1=LR_IRQ.
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ msr SPSR_fsxc, r0
+ mov lr, r1
+ msr CPSR_c, #MODE_SYS | I_BIT
+ ldmfd sp!, {r0-r3, r12}
+ msr CPSR_c, #MODE_IRQ | I_BIT
+ subs pc, lr, #0
diff --git a/demos/ARM7-LPC214x-GCC-minimal/chtypes.h b/demos/ARM7-LPC214x-GCC-minimal/chtypes.h
new file mode 100644
index 000000000..2ac219148
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/chtypes.h
@@ -0,0 +1,47 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+#ifndef _CHTYPES_H_
+#define _CHTYPES_H_
+
+/*
+ * Generic types often dependant on the compiler.
+ */
+#define BOOL char
+#define BYTE8 unsigned char
+#define SBYTE8 char
+#define WORD16 short
+#define UWORD16 unsigned short
+#define LONG32 int
+#define ULONG32 unsigned int
+
+typedef BYTE8 t_tmode;
+typedef BYTE8 t_tstate;
+typedef UWORD16 t_tid;
+typedef ULONG32 t_prio;
+typedef LONG32 t_msg;
+typedef LONG32 t_eventid;
+typedef ULONG32 t_eventmask;
+typedef ULONG32 t_time;
+typedef LONG32 t_cnt;
+typedef ULONG32 t_size;
+
+#define INLINE inline
+
+#endif /* _CHTYPES_H_ */
diff --git a/demos/ARM7-LPC214x-GCC-minimal/crt0.s b/demos/ARM7-LPC214x-GCC-minimal/crt0.s
new file mode 100644
index 000000000..a7845036d
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/crt0.s
@@ -0,0 +1,149 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+/*
+ * Generic ARM startup file for ChibiOS/RT.
+ */
+
+.extern _main
+
+.set MODE_USR, 0x10
+.set MODE_FIQ, 0x11
+.set MODE_IRQ, 0x12
+.set MODE_SVC, 0x13
+.set MODE_ABT, 0x17
+.set MODE_UND, 0x1B
+.set MODE_SYS, 0x1F
+
+.equ I_BIT, 0x80
+.equ F_BIT, 0x40
+
+.text
+.code 32
+.balign 4
+/*
+ * System entry points.
+ */
+_start:
+ b ResetHandler
+ ldr pc, _undefined
+ ldr pc, _swi
+ ldr pc, _prefetch
+ ldr pc, _abort
+ nop
+ ldr pc, [pc,#-0xFF0] /* VIC - IRQ Vector Register */
+ ldr pc, _fiq
+
+_undefined:
+ .word UndHandler
+_swi:
+ .word SwiHandler
+_prefetch:
+ .word PrefetchHandler
+_abort:
+ .word AbortHandler
+_fiq:
+ .word FiqHandler
+ .word 0
+ .word 0
+
+/*
+ * Reset handler.
+ */
+ResetHandler:
+ /*
+ * Stack pointers initialization.
+ */
+ ldr r0, =__ram_end__
+ /* Undefined */
+ msr CPSR_c, #MODE_UND | I_BIT | F_BIT
+ mov sp, r0
+ ldr r1, =__und_stack_size__
+ sub r0, r0, r1
+ /* Abort */
+ msr CPSR_c, #MODE_ABT | I_BIT | F_BIT
+ mov sp, r0
+ ldr r1, =__abt_stack_size__
+ sub r0, r0, r1
+ /* FIQ */
+ msr CPSR_c, #MODE_FIQ | I_BIT | F_BIT
+ mov sp, r0
+ ldr r1, =__fiq_stack_size__
+ sub r0, r0, r1
+ /* IRQ */
+ msr CPSR_c, #MODE_IRQ | I_BIT | F_BIT
+ mov sp, r0
+ ldr r1, =__irq_stack_size__
+ sub r0, r0, r1
+ /* Supervisor */
+ msr CPSR_c, #MODE_SVC | I_BIT | F_BIT
+ mov sp, r0
+ ldr r1, =__svc_stack_size__
+ sub r0, r0, r1
+ /* System */
+ msr CPSR_c, #MODE_SYS | I_BIT | F_BIT
+ mov sp, r0
+// ldr r1, =__sys_stack_size__
+// sub r0, r0, r1
+ /*
+ * Data initialization.
+ * NOTE: It assumes that the DATA size is a multiple of 4.
+ */
+ ldr r1, =_textdata
+ ldr r2, =_data
+ ldr r3, =_edata
+dataloop:
+ cmp r2, r3
+ ldrlo r0, [r1], #4
+ strlo r0, [r2], #4
+ blo dataloop
+ /*
+ * BSS initialization.
+ * NOTE: It assumes that the BSS size is a multiple of 4.
+ */
+ mov r0, #0
+ ldr r1, =_bss_start
+ ldr r2, =_bss_end
+bssloop:
+ cmp r1, r2
+ strlo r0, [r1], #4
+ blo bssloop
+ /*
+ * Application-provided HW initialization routine.
+ */
+#ifndef THUMB_NO_INTERWORKING
+ bl hwinit
+ /*
+ * main(0, NULL).
+ */
+ mov r0, #0
+ mov r1, r0
+ bl main
+ bl chSysHalt
+#else
+ add r0, pc, #1
+ bx r0
+.code 16
+ bl hwinit
+ mov r0, #0
+ mov r1, r0
+ bl main
+ bl chSysHalt
+.code 32
+#endif
diff --git a/demos/ARM7-LPC214x-GCC-minimal/main.c b/demos/ARM7-LPC214x-GCC-minimal/main.c
new file mode 100644
index 000000000..5a0b1e80a
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/main.c
@@ -0,0 +1,82 @@
+/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+*/
+
+#include
+
+#include "lpc214x.h"
+
+/*
+ * Red LEDs blinker thread, times are in milliseconds.
+ */
+static WorkingArea(waThread1, 32);
+static t_msg Thread1(void *arg) {
+
+ while (TRUE) {
+ IO0CLR = 0x00000800;
+ chThdSleep(200);
+ IO0SET = 0x00000C00;
+ chThdSleep(800);
+ IO0CLR = 0x00000400;
+ chThdSleep(200);
+ IO0SET = 0x00000C00;
+ chThdSleep(800);
+ }
+ return 0;
+}
+
+/*
+ * Yellow LED blinker thread, times are in milliseconds.
+ */
+static WorkingArea(waThread2, 32);
+static t_msg Thread2(void *arg) {
+
+ while (TRUE) {
+ IO0CLR = 0x80000000;
+ chThdSleep(200);
+ IO0SET = 0x80000000;
+ chThdSleep(300);
+ }
+ return 0;
+}
+
+/*
+ * Entry point, the interrupts are disabled on entry.
+ */
+int main(int argc, char **argv) {
+
+ /*
+ * The main() function becomes a thread here then the interrupts are
+ * enabled and ChibiOS/RT goes live.
+ */
+ chSysInit();
+
+ /*
+ * Creates the blinker threads.
+ */
+ chThdCreate(NORMALPRIO, 0, waThread1, sizeof(waThread1), Thread1, NULL);
+ chThdCreate(NORMALPRIO, 0, waThread2, sizeof(waThread2), Thread2, NULL);
+
+ /*
+ * Normal main() thread activity, in this demo it does nothing except
+ * sleeping in a loop.
+ */
+ while (TRUE)
+ chThdSleep(1000);
+ return 0;
+}
diff --git a/demos/ARM7-LPC214x-GCC-minimal/readme.txt b/demos/ARM7-LPC214x-GCC-minimal/readme.txt
new file mode 100644
index 000000000..363cd8dde
--- /dev/null
+++ b/demos/ARM7-LPC214x-GCC-minimal/readme.txt
@@ -0,0 +1,18 @@
+*****************************************************************************
+** ChibiOS/RT port for ARM7TDMI LPC214X. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on an Olimex LPC-P2148 board. The port on other boards or other
+members of the LPC2000 family should be an easy task.
+
+** The Demo **
+
+This is a minimal demo, it just blinks the leds on the board by using multiple
+threads, most subsystems are disabled.
+
+** Build Procedure **
+
+The demo was built using the YAGARTO toolchain but any toolchain based on GCC
+and GNU userspace programs will work.
diff --git a/demos/ARM7-LPC214x-GCC/chcore.h b/demos/ARM7-LPC214x-GCC/chcore.h
index 5217e30f6..d5ad07040 100644
--- a/demos/ARM7-LPC214x-GCC/chcore.h
+++ b/demos/ARM7-LPC214x-GCC/chcore.h
@@ -95,11 +95,13 @@ extern void chSysUnlock(void);
#else /* !THUMB */
#define INT_REQUIRED_STACK 0
#endif /* THUMB */
-#define UserStackSize(n) (sizeof(Thread) + \
- sizeof(struct intctx) + \
- sizeof(struct extctx) + \
- (INT_REQUIRED_STACK) + \
- (n))
+#define UserStackSize(n) (((sizeof(Thread) + \
+ sizeof(struct intctx) + \
+ sizeof(struct extctx) + \
+ (INT_REQUIRED_STACK) + \
+ (n) - 1) | 3) + 1)
+
+#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
/* It requires zero bytes, but better be safe.*/
#define IDLE_THREAD_STACK_SIZE 8
diff --git a/demos/ARM7-LPC214x-GCC/main.c b/demos/ARM7-LPC214x-GCC/main.c
index f84874f78..71fba60a8 100644
--- a/demos/ARM7-LPC214x-GCC/main.c
+++ b/demos/ARM7-LPC214x-GCC/main.c
@@ -28,7 +28,7 @@
/*
* Red LEDs blinker thread, times are in milliseconds.
*/
-static BYTE8 waThread1[UserStackSize(32)];
+static WorkingArea(waThread1, 32);
static t_msg Thread1(void *arg) {
while (TRUE) {
@@ -47,7 +47,7 @@ static t_msg Thread1(void *arg) {
/*
* Yellow LED blinker thread, times are in milliseconds.
*/
-static BYTE8 waThread2[UserStackSize(32)];
+static WorkingArea(waThread2, 32);
static t_msg Thread2(void *arg) {
while (TRUE) {
diff --git a/demos/AVR-AT90CANx-GCC/chcore.h b/demos/AVR-AT90CANx-GCC/chcore.h
index 32c939d32..07cb45f64 100644
--- a/demos/AVR-AT90CANx-GCC/chcore.h
+++ b/demos/AVR-AT90CANx-GCC/chcore.h
@@ -103,6 +103,8 @@ typedef struct {
EXTRA_INT_STACK + \
(n))
+#define WorkingArea(s, n) BYTE8 s[UserStackSize(n)];
+
#define chSysLock() asm("cli")
#define chSysUnlock() asm("sei")
#define chSysPuts(msg) {}
diff --git a/demos/AVR-AT90CANx-GCC/main.c b/demos/AVR-AT90CANx-GCC/main.c
index 61156b040..14c45cf47 100644
--- a/demos/AVR-AT90CANx-GCC/main.c
+++ b/demos/AVR-AT90CANx-GCC/main.c
@@ -23,7 +23,7 @@
void hwinit(void);
-static BYTE8 waThread1[UserStackSize(32)];
+static WorkingArea(waThread1, 32);
static t_msg Thread1(void *arg) {
while (TRUE) {
diff --git a/demos/Win32-MSVS/chcore.h b/demos/Win32-MSVS/chcore.h
index 6d11921cf..15a21fb40 100644
--- a/demos/Win32-MSVS/chcore.h
+++ b/demos/Win32-MSVS/chcore.h
@@ -65,6 +65,8 @@ typedef struct {
#define UserStackSize(n) (sizeof(Thread) + sizeof(void *)*2 + \
sizeof(struct stackregs) + (n) + (INT_REQUIRED_STACK))
+#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
+
#define IDLE_THREAD_STACK_SIZE 16384
t_msg _IdleThread(void *p);
diff --git a/demos/Win32-MSVS/demo.c b/demos/Win32-MSVS/demo.c
index 1d4f4aa16..7f8bd6903 100644
--- a/demos/Win32-MSVS/demo.c
+++ b/demos/Win32-MSVS/demo.c
@@ -23,10 +23,10 @@
#include
static ULONG32 wdguard;
-static BYTE8 wdarea[UserStackSize(2048)];
+static WorkingArea(wdarea, 2048);
static ULONG32 cdguard;
-static BYTE8 cdarea[UserStackSize(2048)];
+static WorkingArea(cdarea, 2048);
static Thread *cdtp;
static t_msg WatchdogThread(void *arg);
@@ -159,7 +159,7 @@ static t_msg ShellThread(void *arg) {
FullDuplexDriver *sd = (FullDuplexDriver *)arg;
char *lp, line[64];
Thread *tp;
- BYTE8 tarea[UserStackSize(1024)];
+ WorkingArea(tarea, 1024);
chIQReset(&sd->sd_iqueue);
chOQReset(&sd->sd_oqueue);
@@ -221,7 +221,7 @@ static t_msg ShellThread(void *arg) {
return 0;
}
-static BYTE8 s1area[UserStackSize(4096)];
+static WorkingArea(s1area, 2048);
static Thread *s1;
EventListener s1tel;
@@ -244,7 +244,7 @@ static void COM1Handler(t_eventid id) {
chIQReset(&COM1.sd_iqueue);
}
-static BYTE8 s2area[UserStackSize(4096)];
+static WorkingArea(s2area, 2048);
static Thread *s2;
EventListener s2tel;
diff --git a/demos/Win32-MinGW/chcore.h b/demos/Win32-MinGW/chcore.h
index a28aa2833..c79b9bf81 100644
--- a/demos/Win32-MinGW/chcore.h
+++ b/demos/Win32-MinGW/chcore.h
@@ -65,6 +65,8 @@ typedef struct {
#define UserStackSize(n) (sizeof(Thread) + sizeof(void *) * 2 + \
sizeof(struct stackregs) + (n) + (INT_REQUIRED_STACK))
+#define WorkingArea(s, n) ULONG32 s[UserStackSize(n) >> 2];
+
#define IDLE_THREAD_STACK_SIZE 16384
t_msg _IdleThread(void *p);
diff --git a/demos/Win32-MinGW/demo.c b/demos/Win32-MinGW/demo.c
index 1d4f4aa16..7f8bd6903 100644
--- a/demos/Win32-MinGW/demo.c
+++ b/demos/Win32-MinGW/demo.c
@@ -23,10 +23,10 @@
#include
static ULONG32 wdguard;
-static BYTE8 wdarea[UserStackSize(2048)];
+static WorkingArea(wdarea, 2048);
static ULONG32 cdguard;
-static BYTE8 cdarea[UserStackSize(2048)];
+static WorkingArea(cdarea, 2048);
static Thread *cdtp;
static t_msg WatchdogThread(void *arg);
@@ -159,7 +159,7 @@ static t_msg ShellThread(void *arg) {
FullDuplexDriver *sd = (FullDuplexDriver *)arg;
char *lp, line[64];
Thread *tp;
- BYTE8 tarea[UserStackSize(1024)];
+ WorkingArea(tarea, 1024);
chIQReset(&sd->sd_iqueue);
chOQReset(&sd->sd_oqueue);
@@ -221,7 +221,7 @@ static t_msg ShellThread(void *arg) {
return 0;
}
-static BYTE8 s1area[UserStackSize(4096)];
+static WorkingArea(s1area, 2048);
static Thread *s1;
EventListener s1tel;
@@ -244,7 +244,7 @@ static void COM1Handler(t_eventid id) {
chIQReset(&COM1.sd_iqueue);
}
-static BYTE8 s2area[UserStackSize(4096)];
+static WorkingArea(s2area, 2048);
static Thread *s2;
EventListener s2tel;
diff --git a/readme.txt b/readme.txt
index baf97a2a0..561f1956a 100644
--- a/readme.txt
+++ b/readme.txt
@@ -31,7 +31,7 @@ ARM7-LPC214x-GCC - ChibiOS/RT port for ARM7 LPC2148, the demo targets the
Olimex LPC-P2148 board. This port can be easily modified
for any processor into the LPC2000 family or other
boards. The demo can be compiled using YAGARTO or any
- other GCC-based ARM toolchain.
+ other GCC-based ARM toolchain. Full demo.
AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
*****************************************************************************
@@ -39,12 +39,25 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
*****************************************************************************
*** 0.4.2 ***
+- Added a minimal ARM7 demo, you can use this one as template in order to
+ create your application. It is easier to add subsystems back to the small
+ demo than remove stuff from the large one.
- Introduced support for "pure" THUMB mode, it is activated when all the
source files are compiled in THUMB mode, the option -mthumb-interworking is
- not used in this scenario greatly improving both code size and speed.
+ not used in this scenario and this greatly improves both code size and
+ speed.
It is recommended to either use ARM mode or THUMB mode and not mix them
unless you know exactly what you are doing and understand the consequences.
Mixing is still supported anyway.
+- Fixed a problem with the thread working area declarations, the alignment to
+ 4 bytes boundary was not enforced. Now it is defined a new macro
+ WorkingArea(name, length) that takes care of both the allocation and the
+ alignment.
+ Example:
+ static WorkingArea(waThread1, 32);
+ It is expanded as:
+ ULONG32 waThread1[UserStackSpace(32) >> 2];
+ Now the demos use the new declaration style.
*** 0.4.1 ***
- Modified the initialization code in order to have a dedicated idle thread in
@@ -205,7 +218,7 @@ AVR-AT90CANx-GCC - Port on AVR AT90CAN128, not complete yet.
*** 0.1.1 ***
- Some fixes into the documentation
-- Renamed makefiles to Makefiles, upper case M.
+- Renamed the makefiles to Makefile, upper case M.
*** 0.1.0 ***
- First alpha release
diff --git a/test/test.c b/test/test.c
index a40a059f3..412e46866 100644
--- a/test/test.c
+++ b/test/test.c
@@ -22,17 +22,17 @@
void ChkIntSources(void);
#if defined(WIN32) && defined(_DEBUG)
-static BYTE8 wsT1[UserStackSize(512)];
-static BYTE8 wsT2[UserStackSize(512)];
-static BYTE8 wsT3[UserStackSize(512)];
-static BYTE8 wsT4[UserStackSize(512)];
-static BYTE8 wsT5[UserStackSize(512)];
+static WorkingArea(wsT1, 512);
+static WorkingArea(wsT2, 512);
+static WorkingArea(wsT3, 512);
+static WorkingArea(wsT4, 512);
+static WorkingArea(wsT5, 512);
#else
-static BYTE8 wsT1[UserStackSize(64)];
-static BYTE8 wsT2[UserStackSize(64)];
-static BYTE8 wsT3[UserStackSize(64)];
-static BYTE8 wsT4[UserStackSize(64)];
-static BYTE8 wsT5[UserStackSize(64)];
+static WorkingArea(wsT1, 64);
+static WorkingArea(wsT2, 64);
+static WorkingArea(wsT3, 64);
+static WorkingArea(wsT4, 64);
+static WorkingArea(wsT5, 64);
#endif
static Thread *t1, *t2, *t3, *t4, *t5;