[AVR] use better defines for timer based drivers

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5943 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
utzig 2013-07-08 22:26:33 +00:00
parent fc67bfe7e4
commit 9970f28cb9
14 changed files with 180 additions and 180 deletions

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@ -38,28 +38,28 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
#define AVR_PWM_USE_PWM3 FALSE #define AVR_PWM_USE_TIM3 FALSE
#define AVR_PWM_USE_PWM4 FALSE #define AVR_PWM_USE_TIM4 FALSE
#define AVR_PWM_USE_PWM5 FALSE #define AVR_PWM_USE_TIM5 FALSE
/* /*
* ICU driver system settings. * ICU driver system settings.
*/ */
#define AVR_ICU_USE_ICU1 FALSE #define AVR_ICU_USE_TIM1 FALSE
#define AVR_ICU_USE_ICU3 FALSE #define AVR_ICU_USE_TIM3 FALSE
#define AVR_ICU_USE_ICU4 FALSE #define AVR_ICU_USE_TIM4 FALSE
#define AVR_ICU_USE_ICU5 FALSE #define AVR_ICU_USE_TIM5 FALSE
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define AVR_GPT_USE_GPT1 FALSE #define AVR_GPT_USE_TIM1 FALSE
#define AVR_GPT_USE_GPT2 FALSE #define AVR_GPT_USE_TIM2 FALSE
#define AVR_GPT_USE_GPT3 FALSE #define AVR_GPT_USE_TIM3 FALSE
#define AVR_GPT_USE_GPT4 FALSE #define AVR_GPT_USE_TIM4 FALSE
#define AVR_GPT_USE_GPT5 FALSE #define AVR_GPT_USE_TIM5 FALSE
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

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@ -38,28 +38,28 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
#define AVR_PWM_USE_PWM3 FALSE #define AVR_PWM_USE_TIM3 FALSE
#define AVR_PWM_USE_PWM4 FALSE #define AVR_PWM_USE_TIM4 FALSE
#define AVR_PWM_USE_PWM5 FALSE #define AVR_PWM_USE_TIM5 FALSE
/* /*
* ICU driver system settings. * ICU driver system settings.
*/ */
#define AVR_ICU_USE_ICU1 FALSE #define AVR_ICU_USE_TIM1 FALSE
#define AVR_ICU_USE_ICU3 FALSE #define AVR_ICU_USE_TIM3 FALSE
#define AVR_ICU_USE_ICU4 FALSE #define AVR_ICU_USE_TIM4 FALSE
#define AVR_ICU_USE_ICU5 FALSE #define AVR_ICU_USE_TIM5 FALSE
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define AVR_GPT_USE_GPT1 FALSE #define AVR_GPT_USE_TIM1 FALSE
#define AVR_GPT_USE_GPT2 FALSE #define AVR_GPT_USE_TIM2 FALSE
#define AVR_GPT_USE_GPT3 FALSE #define AVR_GPT_USE_TIM3 FALSE
#define AVR_GPT_USE_GPT4 FALSE #define AVR_GPT_USE_TIM4 FALSE
#define AVR_GPT_USE_GPT5 FALSE #define AVR_GPT_USE_TIM5 FALSE
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

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@ -38,28 +38,28 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
#define AVR_PWM_USE_PWM3 FALSE #define AVR_PWM_USE_TIM3 FALSE
#define AVR_PWM_USE_PWM4 FALSE #define AVR_PWM_USE_TIM4 FALSE
#define AVR_PWM_USE_PWM5 FALSE #define AVR_PWM_USE_TIM5 FALSE
/* /*
* ICU driver system settings. * ICU driver system settings.
*/ */
#define AVR_ICU_USE_ICU1 FALSE #define AVR_ICU_USE_TIM1 FALSE
#define AVR_ICU_USE_ICU3 FALSE #define AVR_ICU_USE_TIM3 FALSE
#define AVR_ICU_USE_ICU4 FALSE #define AVR_ICU_USE_TIM4 FALSE
#define AVR_ICU_USE_ICU5 FALSE #define AVR_ICU_USE_TIM5 FALSE
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define AVR_GPT_USE_GPT1 FALSE #define AVR_GPT_USE_TIM1 FALSE
#define AVR_GPT_USE_GPT2 FALSE #define AVR_GPT_USE_TIM2 FALSE
#define AVR_GPT_USE_GPT3 FALSE #define AVR_GPT_USE_TIM3 FALSE
#define AVR_GPT_USE_GPT4 FALSE #define AVR_GPT_USE_TIM4 FALSE
#define AVR_GPT_USE_GPT5 FALSE #define AVR_GPT_USE_TIM5 FALSE
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

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@ -38,28 +38,28 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
#define AVR_PWM_USE_PWM3 FALSE #define AVR_PWM_USE_TIM3 FALSE
#define AVR_PWM_USE_PWM4 FALSE #define AVR_PWM_USE_TIM4 FALSE
#define AVR_PWM_USE_PWM5 FALSE #define AVR_PWM_USE_TIM5 FALSE
/* /*
* ICU driver system settings. * ICU driver system settings.
*/ */
#define AVR_ICU_USE_ICU1 FALSE #define AVR_ICU_USE_TIM1 FALSE
#define AVR_ICU_USE_ICU3 FALSE #define AVR_ICU_USE_TIM3 FALSE
#define AVR_ICU_USE_ICU4 FALSE #define AVR_ICU_USE_TIM4 FALSE
#define AVR_ICU_USE_ICU5 FALSE #define AVR_ICU_USE_TIM5 FALSE
/* /*
* GPT driver system settings. * GPT driver system settings.
*/ */
#define AVR_GPT_USE_GPT1 FALSE #define AVR_GPT_USE_TIM1 FALSE
#define AVR_GPT_USE_GPT2 FALSE #define AVR_GPT_USE_TIM2 FALSE
#define AVR_GPT_USE_GPT3 FALSE #define AVR_GPT_USE_TIM3 FALSE
#define AVR_GPT_USE_GPT4 FALSE #define AVR_GPT_USE_TIM4 FALSE
#define AVR_GPT_USE_GPT5 FALSE #define AVR_GPT_USE_TIM5 FALSE
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

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@ -52,19 +52,19 @@ typedef struct {
} timer_registers_t; } timer_registers_t;
const timer_registers_t regs_table[] = { const timer_registers_t regs_table[] = {
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
{ &TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &TCNT1H, &TCNT1L, &TIFR1, &TIMSK1 }, { &TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &TCNT1H, &TCNT1L, &TIFR1, &TIMSK1 },
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
{ &TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &TCNT2, &TCNT2, &TIFR2, &TIMSK2 }, { &TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &TCNT2, &TCNT2, &TIFR2, &TIMSK2 },
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
{ &TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &TCNT3H, &TCNT3L, &TIFR3, &TIMSK3 }, { &TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &TCNT3H, &TCNT3L, &TIFR3, &TIMSK3 },
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
{ &TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &TCNT4H, &TCNT4L, &TIFR4, &TIMSK4 }, { &TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &TCNT4H, &TCNT4L, &TIFR4, &TIMSK4 },
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
{ &TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &TCNT5H, &TCNT5L, &TIFR5, &TIMSK5 }, { &TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &TCNT5H, &TCNT5L, &TIFR5, &TIMSK5 },
#endif #endif
}; };
@ -73,19 +73,19 @@ const timer_registers_t regs_table[] = {
/* Driver exported variables. */ /* Driver exported variables. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
GPTDriver GPTD1; GPTDriver GPTD1;
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
GPTDriver GPTD2; GPTDriver GPTD2;
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
GPTDriver GPTD3; GPTDriver GPTD3;
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
GPTDriver GPTD4; GPTDriver GPTD4;
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
GPTDriver GPTD5; GPTDriver GPTD5;
#endif #endif
@ -134,23 +134,23 @@ static void gpt_lld_dummy_callback(GPTDriver *gptp)
static uint8_t getTimerIndex(GPTDriver *gptp) static uint8_t getTimerIndex(GPTDriver *gptp)
{ {
uint8_t index = 0; uint8_t index = 0;
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
if (gptp == &GPTD1) return index; if (gptp == &GPTD1) return index;
else index++; else index++;
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
if (gptp == &GPTD2) return index; if (gptp == &GPTD2) return index;
else index++; else index++;
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
if (gptp == &GPTD3) return index; if (gptp == &GPTD3) return index;
else index++; else index++;
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
if (gptp == &GPTD4) return index; if (gptp == &GPTD4) return index;
else index++; else index++;
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
if (gptp == &GPTD5) return index; if (gptp == &GPTD5) return index;
else index++; else index++;
#endif #endif
@ -160,7 +160,7 @@ static uint8_t getTimerIndex(GPTDriver *gptp)
/* Driver interrupt handlers. */ /* Driver interrupt handlers. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER1_COMPA_vect) CH_IRQ_HANDLER(TIMER1_COMPA_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -169,7 +169,7 @@ CH_IRQ_HANDLER(TIMER1_COMPA_vect)
} }
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER2_COMPA_vect) CH_IRQ_HANDLER(TIMER2_COMPA_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -178,7 +178,7 @@ CH_IRQ_HANDLER(TIMER2_COMPA_vect)
} }
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER3_COMPA_vect) CH_IRQ_HANDLER(TIMER3_COMPA_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -187,7 +187,7 @@ CH_IRQ_HANDLER(TIMER3_COMPA_vect)
} }
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER4_COMPA_vect) CH_IRQ_HANDLER(TIMER4_COMPA_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -196,7 +196,7 @@ CH_IRQ_HANDLER(TIMER4_COMPA_vect)
} }
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER5_COMPA_vect) CH_IRQ_HANDLER(TIMER5_COMPA_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -216,19 +216,19 @@ CH_IRQ_HANDLER(TIMER5_COMPA_vect)
*/ */
void gpt_lld_init(void) void gpt_lld_init(void)
{ {
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
gptObjectInit(&GPTD1); gptObjectInit(&GPTD1);
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
gptObjectInit(&GPTD2); gptObjectInit(&GPTD2);
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
gptObjectInit(&GPTD3); gptObjectInit(&GPTD3);
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
gptObjectInit(&GPTD4); gptObjectInit(&GPTD4);
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
gptObjectInit(&GPTD5); gptObjectInit(&GPTD5);
#endif #endif
} }
@ -250,7 +250,7 @@ void gpt_lld_start(GPTDriver *gptp)
/* Configuration.*/ /* Configuration.*/
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
if (gptp == &GPTD2) { if (gptp == &GPTD2) {
psc = prescaler(gptp->config->frequency, ratio_extended, PRESCALER_SIZE_EXTENDED); psc = prescaler(gptp->config->frequency, ratio_extended, PRESCALER_SIZE_EXTENDED);
gptp->clock_source = clock_source_extended[psc] & 0x07; gptp->clock_source = clock_source_extended[psc] & 0x07;

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@ -45,8 +45,8 @@
* @details If set to @p TRUE the support for GPT1 is included. * @details If set to @p TRUE the support for GPT1 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(AVR_GPT_USE_GPT1) #if !defined(AVR_GPT_USE_TIM1)
#define AVR_GPT_USE_GPT1 FALSE #define AVR_GPT_USE_TIM1 FALSE
#endif #endif
/** /**
@ -54,8 +54,8 @@
* @details If set to @p TRUE the support for GPT2 is included. * @details If set to @p TRUE the support for GPT2 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(AVR_GPT_USE_GPT2) #if !defined(AVR_GPT_USE_TIM2)
#define AVR_GPT_USE_GPT2 FALSE #define AVR_GPT_USE_TIM2 FALSE
#endif #endif
/** /**
@ -63,8 +63,8 @@
* @details If set to @p TRUE the support for GPT3 is included. * @details If set to @p TRUE the support for GPT3 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(AVR_GPT_USE_GPT3) #if !defined(AVR_GPT_USE_TIM3)
#define AVR_GPT_USE_GPT3 FALSE #define AVR_GPT_USE_TIM3 FALSE
#endif #endif
/** /**
@ -72,8 +72,8 @@
* @details If set to @p TRUE the support for GPT4 is included. * @details If set to @p TRUE the support for GPT4 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(AVR_GPT_USE_GPT4) #if !defined(AVR_GPT_USE_TIM4)
#define AVR_GPT_USE_GPT4 FALSE #define AVR_GPT_USE_TIM4 FALSE
#endif #endif
/** /**
@ -81,8 +81,8 @@
* @details If set to @p TRUE the support for GPT5 is included. * @details If set to @p TRUE the support for GPT5 is included.
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(AVR_GPT_USE_GPT5) #if !defined(AVR_GPT_USE_TIM5)
#define AVR_GPT_USE_GPT5 FALSE #define AVR_GPT_USE_TIM5 FALSE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
@ -183,19 +183,19 @@ struct GPTDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_GPT_USE_GPT1 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM1 || defined(__DOXYGEN__)
extern GPTDriver GPTD1; extern GPTDriver GPTD1;
#endif #endif
#if AVR_GPT_USE_GPT2 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM2 || defined(__DOXYGEN__)
extern GPTDriver GPTD2; extern GPTDriver GPTD2;
#endif #endif
#if AVR_GPT_USE_GPT3 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM3 || defined(__DOXYGEN__)
extern GPTDriver GPTD3; extern GPTDriver GPTD3;
#endif #endif
#if AVR_GPT_USE_GPT4 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM4 || defined(__DOXYGEN__)
extern GPTDriver GPTD4; extern GPTDriver GPTD4;
#endif #endif
#if AVR_GPT_USE_GPT5 || defined(__DOXYGEN__) #if AVR_GPT_USE_TIM5 || defined(__DOXYGEN__)
extern GPTDriver GPTD5; extern GPTDriver GPTD5;
#endif #endif

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@ -40,16 +40,16 @@ typedef struct {
static icu_registers_t regs_table[]= static icu_registers_t regs_table[]=
{ {
#if AVR_ICU_USE_ICU1 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__)
{&TCCR1A, &TCCR1B, &TCNT1, &TIMSK1}, {&TCCR1A, &TCCR1B, &TCNT1, &TIMSK1},
#endif #endif
#if AVR_ICU_USE_ICU3 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__)
{&TCCR3A, &TCCR3B, &TCNT3, &TIMSK3}, {&TCCR3A, &TCCR3B, &TCNT3, &TIMSK3},
#endif #endif
#if AVR_ICU_USE_ICU4 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__)
{&TCCR4A, &TCCR4B, &TCNT4, &TIMSK4}, {&TCCR4A, &TCCR4B, &TCNT4, &TIMSK4},
#endif #endif
#if AVR_ICU_USE_ICU5 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__)
{&TCCR5A, &TCCR5B, &TCNT5, &TIMSK5}, {&TCCR5A, &TCCR5B, &TCNT5, &TIMSK5},
#endif #endif
}; };
@ -62,25 +62,25 @@ static icu_registers_t regs_table[]=
/** /**
* @brief ICU1 driver identifier. * @brief ICU1 driver identifier.
*/ */
#if AVR_ICU_USE_ICU1 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__)
ICUDriver ICUD1; ICUDriver ICUD1;
#endif #endif
/** /**
* @brief ICU3 driver identifier. * @brief ICU3 driver identifier.
*/ */
#if AVR_ICU_USE_ICU3 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__)
ICUDriver ICUD3; ICUDriver ICUD3;
#endif #endif
/** /**
* @brief ICU4 driver identifier. * @brief ICU4 driver identifier.
*/ */
#if AVR_ICU_USE_ICU4 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__)
ICUDriver ICUD4; ICUDriver ICUD4;
#endif #endif
/** /**
* @brief ICU5 driver identifier. * @brief ICU5 driver identifier.
*/ */
#if AVR_ICU_USE_ICU5 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__)
ICUDriver ICUD5; ICUDriver ICUD5;
#endif #endif
@ -117,19 +117,19 @@ static inline void handle_capture_isr(ICUDriver *icup,
static uint8_t index(ICUDriver *icup) static uint8_t index(ICUDriver *icup)
{ {
uint8_t index = 0; uint8_t index = 0;
#if AVR_ICU_USE_ICU1 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__)
if (icup == &ICUD1) return index; if (icup == &ICUD1) return index;
else index++; else index++;
#endif #endif
#if AVR_ICU_USE_ICU3 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__)
if (icup == &ICUD3) return index; if (icup == &ICUD3) return index;
else index++; else index++;
#endif #endif
#if AVR_ICU_USE_ICU4 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__)
if (icup == &ICUD4) return index; if (icup == &ICUD4) return index;
else index++; else index++;
#endif #endif
#if AVR_ICU_USE_ICU5 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__)
if (icup == &ICUD5) return index; if (icup == &ICUD5) return index;
else index++; else index++;
#endif #endif
@ -139,7 +139,7 @@ static uint8_t index(ICUDriver *icup)
/* Driver interrupt handlers. */ /* Driver interrupt handlers. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_ICU_USE_ICU1 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM1 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER1_CAPT_vect) CH_IRQ_HANDLER(TIMER1_CAPT_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -155,7 +155,7 @@ CH_IRQ_HANDLER(TIMER1_OVF_vect)
} }
#endif #endif
#if AVR_ICU_USE_ICU3 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM3 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER3_CAPT_vect) CH_IRQ_HANDLER(TIMER3_CAPT_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -171,7 +171,7 @@ CH_IRQ_HANDLER(TIMER3_OVF_vect)
} }
#endif #endif
#if AVR_ICU_USE_ICU4 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM4 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER4_CAPT_vect) CH_IRQ_HANDLER(TIMER4_CAPT_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -187,7 +187,7 @@ CH_IRQ_HANDLER(TIMER4_OVF_vect)
} }
#endif #endif
#if AVR_ICU_USE_ICU5 || defined(__DOXYGEN__) #if AVR_ICU_USE_TIM5 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER5_CAPT_vect) CH_IRQ_HANDLER(TIMER5_CAPT_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -214,16 +214,16 @@ CH_IRQ_HANDLER(TIMER5_OVF_vect)
*/ */
void icu_lld_init(void) { void icu_lld_init(void) {
#if AVR_ICU_USE_ICU1 #if AVR_ICU_USE_TIM1
icuObjectInit(&ICUD1); icuObjectInit(&ICUD1);
#endif #endif
#if AVR_ICU_USE_ICU3 #if AVR_ICU_USE_TIM3
icuObjectInit(&ICUD3); icuObjectInit(&ICUD3);
#endif #endif
#if AVR_ICU_USE_ICU4 #if AVR_ICU_USE_TIM4
icuObjectInit(&ICUD4); icuObjectInit(&ICUD4);
#endif #endif
#if AVR_ICU_USE_ICU5 #if AVR_ICU_USE_TIM5
icuObjectInit(&ICUD5); icuObjectInit(&ICUD5);
#endif #endif
} }
@ -264,11 +264,11 @@ void icu_lld_stop(ICUDriver *icup) {
/* Resets the peripheral.*/ /* Resets the peripheral.*/
/* Disables the peripheral.*/ /* Disables the peripheral.*/
#if AVR_ICU_USE_ICU1 #if AVR_ICU_USE_TIM1
if (&ICUD1 == icup) { if (&ICUD1 == icup) {
} }
#endif /* AVR_ICU_USE_ICU1 */ #endif /* AVR_ICU_USE_TIM1 */
} }
} }

View File

@ -43,29 +43,29 @@
* @brief ICU driver enable switch. * @brief ICU driver enable switch.
* @details If set to @p TRUE the support for ICU1 is included. * @details If set to @p TRUE the support for ICU1 is included.
*/ */
#if !defined(AVR_ICU_USE_ICU1) || defined(__DOXYGEN__) #if !defined(AVR_ICU_USE_TIM1) || defined(__DOXYGEN__)
#define AVR_ICU_USE_ICU1 FALSE #define AVR_ICU_USE_TIM1 FALSE
#endif #endif
/** /**
* @brief ICU driver enable switch. * @brief ICU driver enable switch.
* @details If set to @p TRUE the support for ICU3 is included. * @details If set to @p TRUE the support for ICU3 is included.
*/ */
#if !defined(AVR_ICU_USE_ICU3) || defined(__DOXYGEN__) #if !defined(AVR_ICU_USE_TIM3) || defined(__DOXYGEN__)
#define AVR_ICU_USE_ICU3 FALSE #define AVR_ICU_USE_TIM3 FALSE
#endif #endif
/** /**
* @brief ICU driver enable switch. * @brief ICU driver enable switch.
* @details If set to @p TRUE the support for ICU4 is included. * @details If set to @p TRUE the support for ICU4 is included.
*/ */
#if !defined(AVR_ICU_USE_ICU4) || defined(__DOXYGEN__) #if !defined(AVR_ICU_USE_TIM4) || defined(__DOXYGEN__)
#define AVR_ICU_USE_ICU4 FALSE #define AVR_ICU_USE_TIM4 FALSE
#endif #endif
/** /**
* @brief ICU driver enable switch. * @brief ICU driver enable switch.
* @details If set to @p TRUE the support for ICU5 is included. * @details If set to @p TRUE the support for ICU5 is included.
*/ */
#if !defined(AVR_ICU_USE_ICU5) || defined(__DOXYGEN__) #if !defined(AVR_ICU_USE_TIM5) || defined(__DOXYGEN__)
#define AVR_ICU_USE_ICU5 FALSE #define AVR_ICU_USE_TIM5 FALSE
#endif #endif
/** @} */ /** @} */
@ -159,16 +159,16 @@ struct ICUDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_ICU_USE_ICU1 && !defined(__DOXYGEN__) #if AVR_ICU_USE_TIM1 && !defined(__DOXYGEN__)
extern ICUDriver ICUD1; extern ICUDriver ICUD1;
#endif #endif
#if AVR_ICU_USE_ICU3 && !defined(__DOXYGEN__) #if AVR_ICU_USE_TIM3 && !defined(__DOXYGEN__)
extern ICUDriver ICUD3; extern ICUDriver ICUD3;
#endif #endif
#if AVR_ICU_USE_ICU4 && !defined(__DOXYGEN__) #if AVR_ICU_USE_TIM4 && !defined(__DOXYGEN__)
extern ICUDriver ICUD4; extern ICUDriver ICUD4;
#endif #endif
#if AVR_ICU_USE_ICU5 && !defined(__DOXYGEN__) #if AVR_ICU_USE_TIM5 && !defined(__DOXYGEN__)
extern ICUDriver ICUD5; extern ICUDriver ICUD5;
#endif #endif

View File

@ -51,23 +51,23 @@ typedef struct {
static timer_registers_t regs_table[]= static timer_registers_t regs_table[]=
{ {
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
#if defined(OCR1C) #if defined(OCR1C)
{&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, &OCR1CH, &OCR1CL, &TIFR1, &TIMSK1}, {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, &OCR1CH, &OCR1CL, &TIFR1, &TIMSK1},
#else #else
{&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, NULL, NULL, &TIFR1, &TIMSK1}, {&TCCR1A, &TCCR1B, &OCR1AH, &OCR1AL, &OCR1BH, &OCR1BL, NULL, NULL, &TIFR1, &TIMSK1},
#endif #endif
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
{&TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &OCR2B, &OCR2B, NULL, NULL, &TIFR2, &TIMSK2}, {&TCCR2A, &TCCR2B, &OCR2A, &OCR2A, &OCR2B, &OCR2B, NULL, NULL, &TIFR2, &TIMSK2},
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
{&TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &OCR3BH, &OCR3BL, &OCR3CH, &OCR3CL, &TIFR3, &TIMSK3}, {&TCCR3A, &TCCR3B, &OCR3AH, &OCR3AL, &OCR3BH, &OCR3BL, &OCR3CH, &OCR3CL, &TIFR3, &TIMSK3},
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
{&TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &OCR4CH, &OCR4CL, &OCR4CH, &OCR4CL, &TIFR4, &TIMSK4}, {&TCCR4A, &TCCR4B, &OCR4AH, &OCR4AL, &OCR4CH, &OCR4CL, &OCR4CH, &OCR4CL, &TIFR4, &TIMSK4},
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
{&TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &OCR5BH, &OCR5BL, &OCR5CH, &OCR5CL, &TIFR5, &TIMSK5}, {&TCCR5A, &TCCR5B, &OCR5AH, &OCR5AL, &OCR5BH, &OCR5BL, &OCR5CH, &OCR5CL, &TIFR5, &TIMSK5},
#endif #endif
}; };
@ -77,19 +77,19 @@ static timer_registers_t regs_table[]=
/*===========================================================================*/ /*===========================================================================*/
/** @brief PWM driver identifiers.*/ /** @brief PWM driver identifiers.*/
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
PWMDriver PWMD1; PWMDriver PWMD1;
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
PWMDriver PWMD2; PWMDriver PWMD2;
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
PWMDriver PWMD3; PWMDriver PWMD3;
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
PWMDriver PWMD4; PWMDriver PWMD4;
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
PWMDriver PWMD5; PWMDriver PWMD5;
#endif #endif
@ -116,23 +116,23 @@ static void config_channel(volatile uint8_t *tccra,
static uint8_t timer_index(PWMDriver *pwmp) static uint8_t timer_index(PWMDriver *pwmp)
{ {
uint8_t index = 0; uint8_t index = 0;
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
if (pwmp == &PWMD1) return index; if (pwmp == &PWMD1) return index;
else index++; else index++;
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
if (pwmp == &PWMD2) return index; if (pwmp == &PWMD2) return index;
else index++; else index++;
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
if (pwmp == &PWMD3) return index; if (pwmp == &PWMD3) return index;
else index++; else index++;
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
if (pwmp == &PWMD4) return index; if (pwmp == &PWMD4) return index;
else index++; else index++;
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
if (pwmp == &PWMD5) return index; if (pwmp == &PWMD5) return index;
else index++; else index++;
#endif #endif
@ -145,7 +145,7 @@ static uint8_t timer_index(PWMDriver *pwmp)
/* /*
* interrupt for compare1&2 and clock overflow. pwmd1 & pwmd2 * interrupt for compare1&2 and clock overflow. pwmd1 & pwmd2
*/ */
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER1_OVF_vect) CH_IRQ_HANDLER(TIMER1_OVF_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -176,7 +176,7 @@ CH_IRQ_HANDLER(TIMER1_COMPC_vect)
#endif #endif
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER2_OVF_vect) CH_IRQ_HANDLER(TIMER2_OVF_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -199,7 +199,7 @@ CH_IRQ_HANDLER(TIMER2_COMPB_vect)
} }
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER3_OVF_vect) CH_IRQ_HANDLER(TIMER3_OVF_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -229,7 +229,7 @@ CH_IRQ_HANDLER(TIMER3_COMPC_vect)
} }
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER4_OVF_vect) CH_IRQ_HANDLER(TIMER4_OVF_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -259,7 +259,7 @@ CH_IRQ_HANDLER(TIMER4_COMPC_vect)
} }
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
CH_IRQ_HANDLER(TIMER5_OVF_vect) CH_IRQ_HANDLER(TIMER5_OVF_vect)
{ {
CH_IRQ_PROLOGUE(); CH_IRQ_PROLOGUE();
@ -300,31 +300,31 @@ CH_IRQ_HANDLER(TIMER5_COMPC_vect)
*/ */
void pwm_lld_init(void) void pwm_lld_init(void)
{ {
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
pwmObjectInit(&PWMD1); pwmObjectInit(&PWMD1);
TCCR1A = (1 << WGM11) | (1 << WGM10); TCCR1A = (1 << WGM11) | (1 << WGM10);
TCCR1B = (0 << WGM13) | (1 << WGM12); TCCR1B = (0 << WGM13) | (1 << WGM12);
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
pwmObjectInit(&PWMD2); pwmObjectInit(&PWMD2);
TCCR2A = (1 << WGM21) | (1 << WGM20); TCCR2A = (1 << WGM21) | (1 << WGM20);
TCCR2B = (0 << WGM22); TCCR2B = (0 << WGM22);
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
pwmObjectInit(&PWMD3); pwmObjectInit(&PWMD3);
TCCR3A = (1 << WGM31) | (1 << WGM30); TCCR3A = (1 << WGM31) | (1 << WGM30);
TCCR3B = (0 << WGM33) | (1 << WGM32); TCCR3B = (0 << WGM33) | (1 << WGM32);
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
pwmObjectInit(&PWMD4); pwmObjectInit(&PWMD4);
TCCR4A = (1 << WGM41) | (1 << WGM40); TCCR4A = (1 << WGM41) | (1 << WGM40);
TCCR4B = (0 << WGM43) | (1 << WGM42); TCCR4B = (0 << WGM43) | (1 << WGM42);
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
pwmObjectInit(&PWMD5); pwmObjectInit(&PWMD5);
TCCR5A = (1 << WGM51) | (1 << WGM50); TCCR5A = (1 << WGM51) | (1 << WGM50);
TCCR5B = (0 << WGM53) | (1 << WGM52); TCCR5B = (0 << WGM53) | (1 << WGM52);
@ -342,7 +342,7 @@ void pwm_lld_start(PWMDriver *pwmp)
{ {
if (pwmp->state == PWM_STOP) { if (pwmp->state == PWM_STOP) {
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
if (pwmp == &PWMD2) { if (pwmp == &PWMD2) {
TCCR2B &= ~((1 << CS22) | (1 << CS21)); TCCR2B &= ~((1 << CS22) | (1 << CS21));
TCCR2B |= (1 << CS20); TCCR2B |= (1 << CS20);
@ -417,7 +417,7 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
if (val > MAX_PWM_VALUE) if (val > MAX_PWM_VALUE)
val = MAX_PWM_VALUE; val = MAX_PWM_VALUE;
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
if (pwmp == &PWMD2) { if (pwmp == &PWMD2) {
config_channel(&TCCR2A, config_channel(&TCCR2A,
7 - 2*channel, 7 - 2*channel,

View File

@ -36,20 +36,20 @@
/* Driver constants. */ /* Driver constants. */
/*===========================================================================*/ /*===========================================================================*/
#if !defined(AVR_PWM_USE_PWM1) #if !defined(AVR_PWM_USE_TIM1)
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#endif #endif
#if !defined(AVR_PWM_USE_PWM2) #if !defined(AVR_PWM_USE_TIM2)
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
#endif #endif
#if !defined(AVR_PWM_USE_PWM3) #if !defined(AVR_PWM_USE_TIM3)
#define AVR_PWM_USE_PWM3 FALSE #define AVR_PWM_USE_TIM3 FALSE
#endif #endif
#if !defined(AVR_PWM_USE_PWM4) #if !defined(AVR_PWM_USE_TIM4)
#define AVR_PWM_USE_PWM4 FALSE #define AVR_PWM_USE_TIM4 FALSE
#endif #endif
#if !defined(AVR_PWM_USE_PWM5) #if !defined(AVR_PWM_USE_TIM5)
#define AVR_PWM_USE_PWM5 FALSE #define AVR_PWM_USE_TIM5 FALSE
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
@ -174,19 +174,19 @@ struct PWMDriver {
/* External declarations. */ /* External declarations. */
/*===========================================================================*/ /*===========================================================================*/
#if AVR_PWM_USE_PWM1 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM1 || defined(__DOXYGEN__)
extern PWMDriver PWMD1; extern PWMDriver PWMD1;
#endif #endif
#if AVR_PWM_USE_PWM2 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM2 || defined(__DOXYGEN__)
extern PWMDriver PWMD2; extern PWMDriver PWMD2;
#endif #endif
#if AVR_PWM_USE_PWM3 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM3 || defined(__DOXYGEN__)
extern PWMDriver PWMD3; extern PWMDriver PWMD3;
#endif #endif
#if AVR_PWM_USE_PWM4 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM4 || defined(__DOXYGEN__)
extern PWMDriver PWMD4; extern PWMDriver PWMD4;
#endif #endif
#if AVR_PWM_USE_PWM5 || defined(__DOXYGEN__) #if AVR_PWM_USE_TIM5 || defined(__DOXYGEN__)
extern PWMDriver PWMD5; extern PWMDriver PWMD5;
#endif #endif

View File

@ -31,5 +31,5 @@
* GPT driver system settings. * GPT driver system settings.
*/ */
#define AVR_GPT_USE_GPT1 TRUE #define AVR_GPT_USE_TIM1 TRUE
#define AVR_GPT_USE_GPT2 TRUE #define AVR_GPT_USE_TIM2 TRUE

View File

@ -23,4 +23,4 @@
*/ */
#define AVR_SERIAL_USE_USART0 TRUE #define AVR_SERIAL_USE_USART0 TRUE
#define AVR_ICU_USE_ICU3 TRUE #define AVR_ICU_USE_TIM3 TRUE

View File

@ -25,5 +25,5 @@
/* /*
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 TRUE #define AVR_PWM_USE_TIM1 TRUE
#define AVR_PWM_USE_PWM2 TRUE #define AVR_PWM_USE_TIM2 TRUE

View File

@ -40,8 +40,8 @@
* PWM driver system settings. * PWM driver system settings.
*/ */
#define AVR_PWM_USE_PWM1 FALSE #define AVR_PWM_USE_TIM1 FALSE
#define AVR_PWM_USE_PWM2 FALSE #define AVR_PWM_USE_TIM2 FALSE
/* /*
* Serial driver system settings. * Serial driver system settings.