diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
index a2846f4e2..0cc15f415 100644
--- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
+++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c
@@ -824,7 +824,7 @@ void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) {
   gptp->tim->CNT   = 0;                         /* Reset counter.           */
 
   /* NOTE: After generating the UG event it takes several clock cycles before
-     SR bit 0 goes to 1. This is because the clearing of CNT has been inserted
+     SR bit 0 goes to 1. This is why the clearing of CNT has been inserted
      before the clearing of SR, to give it some time.*/
   gptp->tim->SR    = 0;                         /* Clear pending IRQs.      */
   if (NULL != gptp->config->callback)