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H5 board support. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@16375 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2023-08-13 08:55:03 +00:00
parent ddd162f77d
commit 9a6f3b3249
18 changed files with 5052 additions and 62 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
demos/STM32/RT-STM32H563ZI-NUCLEO144/.project
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@ -27,7 +27,7 @@
<link>
<name>board</name>
<type>2</type>
<locationURI>CHIBIOS/os/hal/boards/ST_NUCLEO144_L552ZE</locationURI>
<locationURI>CHIBIOS/os/hal/boards/ST_NUCLEO144_H563ZI</locationURI>
</link>
<link>
<name>os</name>

8
demos/STM32/RT-STM32H563ZI-NUCLEO144/Makefile
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@ -101,7 +101,7 @@ include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h5xx.m
# HAL-OSAL files (optional).
include $(CHIBIOS)/os/hal/hal.mk
include $(CHIBIOS)/os/hal/ports/STM32/STM32H5xx/platform.mk
#include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H563ZI/board.mk
include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H563ZI/board.mk
include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
# RTOS files (optional).
include $(CHIBIOS)/os/rt/rt.mk
@ -109,9 +109,9 @@ include $(CHIBIOS)/os/common/ports/ARMv8-M-ML/compilers/GCC/mk/port.mk
# Auto-build files in ./source recursively.
include $(CHIBIOS)/tools/mk/autobuild.mk
# Other files (optional).
#include $(CHIBIOS)/os/test/test.mk
#include $(CHIBIOS)/test/rt/rt_test.mk
#include $(CHIBIOS)/test/oslib/oslib_test.mk
include $(CHIBIOS)/os/test/test.mk
include $(CHIBIOS)/test/rt/rt_test.mk
include $(CHIBIOS)/test/oslib/oslib_test.mk
# Define linker script file here.
LDSCRIPT= $(STARTUPLD)/STM32H563xI.ld

2
demos/STM32/RT-STM32H563ZI-NUCLEO144/cfg/halconf.h
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@ -156,7 +156,7 @@
* @brief Enables the SIO subsystem.
*/
#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__)
#define HAL_USE_SIO FALSE
#define HAL_USE_SIO TRUE
#endif
/**

24
demos/STM32/RT-STM32H563ZI-NUCLEO144/cfg/mcuconf.h
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@ -293,18 +293,18 @@
/*
* SIO driver system settings.
*/
#define STM32_SIO_USE_USART1 FALSE
#define STM32_SIO_USE_USART2 FALSE
#define STM32_SIO_USE_USART3 FALSE
#define STM32_SIO_USE_UART4 FALSE
#define STM32_SIO_USE_UART5 FALSE
#define STM32_SIO_USE_USART6 FALSE
#define STM32_SIO_USE_UART7 FALSE
#define STM32_SIO_USE_UART8 FALSE
#define STM32_SIO_USE_UART9 FALSE
#define STM32_SIO_USE_USART10 FALSE
#define STM32_SIO_USE_USART11 FALSE
#define STM32_SIO_USE_UART12 FALSE
#define STM32_SIO_USE_USART1 TRUE
#define STM32_SIO_USE_USART2 TRUE
#define STM32_SIO_USE_USART3 TRUE
#define STM32_SIO_USE_UART4 TRUE
#define STM32_SIO_USE_UART5 TRUE
#define STM32_SIO_USE_USART6 TRUE
#define STM32_SIO_USE_UART7 TRUE
#define STM32_SIO_USE_UART8 TRUE
#define STM32_SIO_USE_UART9 TRUE
#define STM32_SIO_USE_USART10 TRUE
#define STM32_SIO_USE_USART11 TRUE
#define STM32_SIO_USE_UART12 TRUE
#define STM32_SIO_USE_LPUART1 TRUE
/*

51
demos/STM32/RT-STM32H563ZI-NUCLEO144/main.c
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@ -14,14 +14,61 @@
limitations under the License.
*/
#include <stdint.h>
#include <stdbool.h>
#include "ch.h"
#include "hal.h"
#include "rt_test_root.h"
#include "oslib_test_root.h"
/*
* Green LED blinker thread, times are in milliseconds.
*/
static THD_WORKING_AREA(waThread1, 128);
static THD_FUNCTION(Thread1, arg) {
(void)arg;
chRegSetThreadName("blinker");
while (true) {
palClearLine(LINE_LED_GREEN);
chThdSleepMilliseconds(500);
palSetLine(LINE_LED_GREEN);
chThdSleepMilliseconds(500);
}
}
/*
* Application entry point.
*/
int main(void) {
/*
* System initializations.
* - HAL initialization, this also initializes the configured device drivers
* and performs the board-specific initializations.
* - Kernel initialization, the main() function becomes a thread and the
* RTOS is active.
*/
halInit();
chSysInit();
/*
* Activates the Serial or SIO driver using the default configuration.
*/
sioStart(&SIOD3, NULL);
/*
* Creates the blinker thread.
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
/*
* Normal main() thread activity, in this demo it does nothing except
* sleeping in a loop and check the button state.
*/
while (true) {
if (palReadLine(LINE_BUTTON)) {
test_execute((BaseSequentialStream *)&SIOD3, &rt_test_suite);
test_execute((BaseSequentialStream *)&SIOD3, &oslib_test_suite);
}
chThdSleepMilliseconds(500);
}
}

266
os/hal/boards/ST_NUCLEO144_H563ZI/board.c Normal file
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@ -0,0 +1,266 @@
/*
ChibiOS - Copyright (C) 2006..2023 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#include "hal.h"
#include "stm32_gpio.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/**
* @brief Type of STM32 GPIO port setup.
*/
typedef struct {
uint32_t moder;
uint32_t otyper;
uint32_t ospeedr;
uint32_t pupdr;
uint32_t odr;
uint32_t afrl;
uint32_t afrh;
} gpio_setup_t;
/**
* @brief Type of STM32 GPIO initialization data.
*/
typedef struct {
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
gpio_setup_t PAData;
#endif
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
gpio_setup_t PBData;
#endif
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
gpio_setup_t PCData;
#endif
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
gpio_setup_t PDData;
#endif
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
gpio_setup_t PEData;
#endif
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
gpio_setup_t PFData;
#endif
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
gpio_setup_t PGData;
#endif
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
gpio_setup_t PHData;
#endif
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
gpio_setup_t PIData;
#endif
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
gpio_setup_t PJData;
#endif
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
gpio_setup_t PKData;
#endif
} gpio_config_t;
/**
* @brief STM32 GPIO static initialization data.
*/
static const gpio_config_t gpio_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
#endif
#if STM32_HAS_GPIOJ
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
#endif
#if STM32_HAS_GPIOK
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
#endif
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
gpiop->OTYPER = config->otyper;
gpiop->OSPEEDR = config->ospeedr;
gpiop->PUPDR = config->pupdr;
gpiop->ODR = config->odr;
gpiop->AFRL = config->afrl;
gpiop->AFRH = config->afrh;
gpiop->MODER = config->moder;
}
static void stm32_gpio_init(void) {
/* Enabling GPIO-related clocks, the mask comes from the
registry header file.*/
rccResetAHB4(STM32_GPIO_EN_MASK);
rccEnableAHB4(STM32_GPIO_EN_MASK, true);
/* Initializing all the defined GPIO ports.*/
#if STM32_HAS_GPIOA
gpio_init(GPIOA, &gpio_default_config.PAData);
#endif
#if STM32_HAS_GPIOB
gpio_init(GPIOB, &gpio_default_config.PBData);
#endif
#if STM32_HAS_GPIOC
gpio_init(GPIOC, &gpio_default_config.PCData);
#endif
#if STM32_HAS_GPIOD
gpio_init(GPIOD, &gpio_default_config.PDData);
#endif
#if STM32_HAS_GPIOE
gpio_init(GPIOE, &gpio_default_config.PEData);
#endif
#if STM32_HAS_GPIOF
gpio_init(GPIOF, &gpio_default_config.PFData);
#endif
#if STM32_HAS_GPIOG
gpio_init(GPIOG, &gpio_default_config.PGData);
#endif
#if STM32_HAS_GPIOH
gpio_init(GPIOH, &gpio_default_config.PHData);
#endif
#if STM32_HAS_GPIOI
gpio_init(GPIOI, &gpio_default_config.PIData);
#endif
#if STM32_HAS_GPIOJ
gpio_init(GPIOJ, &gpio_default_config.PJData);
#endif
#if STM32_HAS_GPIOK
gpio_init(GPIOK, &gpio_default_config.PKData);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Early initialization code.
* @details GPIO ports and system clocks are initialized before everything
* else.
*/
void __early_init(void) {
stm32_gpio_init();
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return true;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return false;
}
#endif
/**
* @brief Board-specific initialization code.
* @note You can add your board-specific code here.
*/
void boardInit(void) {
}

1377
os/hal/boards/ST_NUCLEO144_H563ZI/board.h Normal file
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9
os/hal/boards/ST_NUCLEO144_H563ZI/board.mk Normal file
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@ -0,0 +1,9 @@
# List of all the board related files.
BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H563ZI/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H563ZI
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)

1198
os/hal/boards/ST_NUCLEO144_H563ZI/cfg/board.chcfg Normal file
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15
os/hal/boards/ST_NUCLEO144_H563ZI/cfg/board.fmpp Normal file
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@ -0,0 +1,15 @@
sourceRoot: ../../../../../tools/ftl/processors/boards/stm32h5xx/templates
outputRoot: ..
dataRoot: .
freemarkerLinks: {
lib: ../../../../../tools/ftl/libs
}
data : {
doc1:xml (
board.chcfg
{
}
)
}

11
os/hal/ports/STM32/STM32H5xx/hal_lld.h
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@ -92,10 +92,11 @@
#define CLK_PCLK1TIM 12U
#define CLK_PCLK2 13U
#define CLK_PCLK2TIM 14U
#define CLK_MCO1 15U
#define CLK_MCO2 16U
#define CLK_LSCO 17U
#define CLK_ARRAY_SIZE 18U
#define CLK_PCLK3 15U
#define CLK_MCO1 16U
#define CLK_MCO2 17U
#define CLK_LSCO 18U
#define CLK_ARRAY_SIZE 19U
/** @} */
/**
@ -3524,7 +3525,7 @@ typedef struct {
(clkpt) == CLK_PCLK1TIM ? STM32_TIMP1CLK : \
(clkpt) == CLK_PCLK2 ? STM32_PCLK2 : \
(clkpt) == CLK_PCLK2TIM ? STM32_TIMP2CLK : \
(clkpt) == CLK_PCLK2 ? STM32_PCLK3 : \
(clkpt) == CLK_PCLK3 ? STM32_PCLK3 : \
(clkpt) == CLK_MCO1 ? STM32_MCO1CLK : \
(clkpt) == CLK_MCO2 ? STM32_MCO2CLK : \
(clkpt) == CLK_LSCO ? STM32_LSCOCLK : \

302
tools/ftl/processors/boards/stm32h5xx/templates/board.c.ftl Normal file
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@ -0,0 +1,302 @@
[#ftl]
[#--
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
--]
[@pp.dropOutputFile /]
[#import "/@lib/libutils.ftl" as utils /]
[#import "/@lib/liblicense.ftl" as license /]
[@pp.changeOutputFile name="board.c" /]
/*
[@license.EmitLicenseAsText /]
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
[#list doc1.board.headers.header as header]
#include "${header[0]?string?trim}"
[/#list]
#include "hal.h"
#include "stm32_gpio.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
/**
* @brief Type of STM32 GPIO port setup.
*/
typedef struct {
uint32_t moder;
uint32_t otyper;
uint32_t ospeedr;
uint32_t pupdr;
uint32_t odr;
uint32_t afrl;
uint32_t afrh;
} gpio_setup_t;
/**
* @brief Type of STM32 GPIO initialization data.
*/
typedef struct {
#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
gpio_setup_t PAData;
#endif
#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
gpio_setup_t PBData;
#endif
#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
gpio_setup_t PCData;
#endif
#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
gpio_setup_t PDData;
#endif
#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
gpio_setup_t PEData;
#endif
#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
gpio_setup_t PFData;
#endif
#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
gpio_setup_t PGData;
#endif
#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
gpio_setup_t PHData;
#endif
#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
gpio_setup_t PIData;
#endif
#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
gpio_setup_t PJData;
#endif
#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
gpio_setup_t PKData;
#endif
} gpio_config_t;
/**
* @brief STM32 GPIO static initialization data.
*/
static const gpio_config_t gpio_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
#endif
#if STM32_HAS_GPIOJ
{VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
#endif
#if STM32_HAS_GPIOK
{VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
#endif
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
gpiop->OTYPER = config->otyper;
gpiop->OSPEEDR = config->ospeedr;
gpiop->PUPDR = config->pupdr;
gpiop->ODR = config->odr;
gpiop->AFRL = config->afrl;
gpiop->AFRH = config->afrh;
gpiop->MODER = config->moder;
}
static void stm32_gpio_init(void) {
/* Enabling GPIO-related clocks, the mask comes from the
registry header file.*/
rccResetAHB4(STM32_GPIO_EN_MASK);
rccEnableAHB4(STM32_GPIO_EN_MASK, true);
/* Initializing all the defined GPIO ports.*/
#if STM32_HAS_GPIOA
gpio_init(GPIOA, &gpio_default_config.PAData);
#endif
#if STM32_HAS_GPIOB
gpio_init(GPIOB, &gpio_default_config.PBData);
#endif
#if STM32_HAS_GPIOC
gpio_init(GPIOC, &gpio_default_config.PCData);
#endif
#if STM32_HAS_GPIOD
gpio_init(GPIOD, &gpio_default_config.PDData);
#endif
#if STM32_HAS_GPIOE
gpio_init(GPIOE, &gpio_default_config.PEData);
#endif
#if STM32_HAS_GPIOF
gpio_init(GPIOF, &gpio_default_config.PFData);
#endif
#if STM32_HAS_GPIOG
gpio_init(GPIOG, &gpio_default_config.PGData);
#endif
#if STM32_HAS_GPIOH
gpio_init(GPIOH, &gpio_default_config.PHData);
#endif
#if STM32_HAS_GPIOI
gpio_init(GPIOI, &gpio_default_config.PIData);
#endif
#if STM32_HAS_GPIOJ
gpio_init(GPIOJ, &gpio_default_config.PJData);
#endif
#if STM32_HAS_GPIOK
gpio_init(GPIOK, &gpio_default_config.PKData);
#endif
}
/*===========================================================================*/
/* Driver interrupt handlers. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Early initialization code.
* @details GPIO ports and system clocks are initialized before everything
* else.
*/
void __early_init(void) {
stm32_gpio_init();
stm32_clock_init();
[#if doc1.board.board_functions.__early_init[0]??]
${doc1.board.board_functions.__early_init[0]}
[/#if]
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
[#if doc1.board.board_functions.sdc_lld_is_card_inserted[0]??]
${doc1.board.board_functions.sdc_lld_is_card_inserted[0]}
[#else]
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return true;
[/#if]
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
[#if doc1.board.board_functions.sdc_lld_is_write_protected[0]??]
${doc1.board.board_functions.sdc_lld_is_write_protected[0]}
[#else]
(void)sdcp;
/* CHTODO: Fill the implementation.*/
return false;
[/#if]
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
[#if doc1.board.board_functions.mmc_lld_is_card_inserted[0]??]
${doc1.board.board_functions.mmc_lld_is_card_inserted[0]}
[#else]
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return true;
[/#if]
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
[#if doc1.board.board_functions.mmc_lld_is_write_protected[0]??]
${doc1.board.board_functions.mmc_lld_is_write_protected[0]}
[#else]
(void)mmcp;
/* CHTODO: Fill the implementation.*/
return false;
[/#if]
}
#endif
/**
* @brief Board-specific initialization code.
* @note You can add your board-specific code here.
*/
void boardInit(void) {
[#if doc1.board.board_functions.boardInit[0]??]
${doc1.board.board_functions.boardInit[0]}
[/#if]
}

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@ -0,0 +1,378 @@
[#ftl]
[#--
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
--]
[@pp.dropOutputFile /]
[#import "/@lib/libutils.ftl" as utils /]
[#import "/@lib/liblicense.ftl" as license /]
[@pp.changeOutputFile name="board.h" /]
/*
[@license.EmitLicenseAsText /]
*/
/*
* This file has been automatically generated using ChibiStudio board
* generator plugin. Do not edit manually.
*/
#ifndef BOARD_H
#define BOARD_H
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/*
* Setup for ${doc1.board.board_name[0]} board.
*/
/*
* Board identifier.
*/
#define BOARD_${doc1.board.board_id[0]}
#define BOARD_NAME "${doc1.board.board_name[0]}"
[#if doc1.board.ethernet_phy[0]??]
/*
* Ethernet PHY type.
*/
#define BOARD_PHY_ID ${doc1.board.ethernet_phy.identifier[0]}
[#if doc1.board.ethernet_phy.bus_type[0]?string == "RMII"]
#define BOARD_PHY_RMII
[/#if]
[/#if]
/*
* Board oscillators-related settings.
[#if doc1.board.clocks.@LSEFrequency[0]?number == 0]
* NOTE: LSE not fitted.
[/#if]
[#if doc1.board.clocks.@HSEFrequency[0]?number == 0]
* NOTE: HSE not fitted.
[/#if]
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK ${doc1.board.clocks.@LSEFrequency[0]}U
#endif
[#if doc1.board.clocks.@LSEBypass[0]?string == "true"]
#define STM32_LSE_BYPASS
[/#if]
#define STM32_LSEDRV (${doc1.board.clocks.@LSEDrive[0]?word_list[0]?number}U << 3U)
#if !defined(STM32_HSECLK)
#define STM32_HSECLK ${doc1.board.clocks.@HSEFrequency[0]}U
#endif
[#if doc1.board.clocks.@HSEBypass[0]?string == "true"]
#define STM32_HSE_BYPASS
[/#if]
/*
* MCU type as defined in the ST header.
*/
#define ${doc1.board.subtype[0]}
/*
* IO pins assignments.
*/
[#list doc1.board.ports.* as port]
[#assign port_name = port?node_name?upper_case /]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign pin_name = pin?node_name?upper_case /]
#define ${(port_name + "_" + pin_name)?right_pad(27, " ")} ${pin_index?string}U
[#else]
[#list names as name]
#define ${(port_name + "_" + name)?right_pad(27, " ")} ${pin_index?string}U
[/#list]
[/#if]
[/#list]
[/#list]
/*
* IO lines assignments.
*/
[#list doc1.board.ports.* as port]
[#assign port_name = port?node_name?upper_case /]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size > 0]
[#list names as name]
#define LINE_${name?right_pad(22, " ")} PAL_LINE(${port_name}, ${pin_index?string}U)
[/#list]
[/#if]
[/#list]
[/#list]
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
[#list doc1.board.ports.* as port]
[#assign port_name = port?node_name?upper_case /]
/*
* ${port_name} setup:
*
[#-- Generating pin descriptions inside the comment.--]
[#list port.* as pin]
[#assign pin_name = pin?node_name?upper_case /]
[#assign name = pin.@ID[0]?string?trim /]
[#if name?length == 0]
[#assign name = pin_name /]
[/#if]
[#assign mode = pin.@Mode[0] /]
[#assign type = pin.@Type[0] /]
[#assign resistor = pin.@Resistor[0] /]
[#assign speed = pin.@Speed[0] /]
[#assign alternate = pin.@Alternate[0] /]
[#if mode == "Input"]
[#assign desc = mode + " " + resistor /]
[#elseif mode == "Output"]
[#assign desc = mode + " " + type + " " + speed /]
[#elseif mode == "Alternate"]
[#assign desc = mode + " " + alternate /]
[#else]
[#assign desc = "Analog" /]
[/#if]
* P${(port?node_name[4..] + pin_index?string)?right_pad(3, " ")} - ${name?right_pad(26, " ")}(${desc?lower_case}).
[/#list]
*/
[#--
-- Generating MODER register value.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign mode = pin.@Mode[0] /]
[#if mode == "Input"]
[#assign out = "PIN_MODE_INPUT(" + port_name + "_" + name + ")" /]
[#elseif mode == "Output"]
[#assign out = "PIN_MODE_OUTPUT(" + port_name + "_" + name + ")" /]
[#elseif mode == "Alternate"]
[#assign out = "PIN_MODE_ALTERNATE(" + port_name + "_" + name + ")" /]
[#else]
[#assign out = "PIN_MODE_ANALOG(" + port_name + "_" + name + ")" /]
[/#if]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_MODER (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
[/#list]
[#--
-- Generating OTYPER register value.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign type = pin.@Type[0] /]
[#if type == "PushPull"]
[#assign out = "PIN_OTYPE_PUSHPULL(" + port_name + "_" + name + ")" /]
[#else]
[#assign out = "PIN_OTYPE_OPENDRAIN(" + port_name + "_" + name + ")" /]
[/#if]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_OTYPER (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
[/#list]
[#--
-- Generating SPEEDR register value.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign speed = pin.@Speed[0] /]
[#if speed == "Minimum"]
[#assign out = "PIN_OSPEED_VERYLOW(" + port_name + "_" + name + ")" /]
[#elseif speed == "Low"]
[#assign out = "PIN_OSPEED_LOW(" + port_name + "_" + name + ")" /]
[#elseif speed == "High"]
[#assign out = "PIN_OSPEED_MEDIUM(" + port_name + "_" + name + ")" /]
[#else]
[#assign out = "PIN_OSPEED_HIGH(" + port_name + "_" + name + ")" /]
[/#if]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_OSPEEDR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
[/#list]
[#--
-- Generating PUPDR register value.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign resistor = pin.@Resistor[0] /]
[#if resistor == "Floating"]
[#assign out = "PIN_PUPDR_FLOATING(" + port_name + "_" + name + ")" /]
[#elseif resistor == "PullUp"]
[#assign out = "PIN_PUPDR_PULLUP(" + port_name + "_" + name + ")" /]
[#else]
[#assign out = "PIN_PUPDR_PULLDOWN(" + port_name + "_" + name + ")" /]
[/#if]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_PUPDR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
[/#list]
[#--
-- Generating ODR register value.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign level = pin.@Level[0] /]
[#if level == "Low"]
[#assign out = "PIN_ODR_LOW(" + port_name + "_" + name + ")" /]
[#else]
[#assign out = "PIN_ODR_HIGH(" + port_name + "_" + name + ")" /]
[/#if]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_ODR (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if pin_index < 15]
${(line + " |")?right_pad(76, " ") + "\\"}
[#else]
${line + ")"}
[/#if]
[/#list]
[#--
-- Generating AFRx registers values.
--]
[#list port.* as pin]
[#assign names = pin.@ID[0]?string?word_list /]
[#if names?size == 0]
[#assign name = pin?node_name?upper_case /]
[#else]
[#assign name = names[0] /]
[/#if]
[#assign alternate = pin.@Alternate[0]?trim /]
[#assign out = "PIN_AFIO_AF(" + port_name + "_" + name + ", " + alternate + "U)" /]
[#if pin_index == 0]
[#assign line = "#define VAL_" + port_name + "_AFRL (" + out /]
[#elseif pin_index == 8]
[#assign line = "#define VAL_" + port_name + "_AFRH (" + out /]
[#else]
[#assign line = " " + out /]
[/#if]
[#if (pin_index == 7) || (pin_index == 15)]
${line + ")"}
[#else]
${(line + " |")?right_pad(76, " ") + "\\"}
[/#if]
[/#list]
[/#list]
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* BOARD_H */

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[#ftl]
[#--
ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio.
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
--]
[@pp.dropOutputFile /]
[#import "/@lib/libutils.ftl" as utils /]
[@pp.changeOutputFile name="board.mk" /]
[#if doc1.board.configuration_settings.board_files_path[0]??]
[#assign path = doc1.board.configuration_settings.board_files_path[0]?string?trim /]
[#if !path?ends_with("/")]
[#assign path = path + "/"]
[/#if]
[#else]
[#assign path = "$(CHIBIOS)/os/hal/boards/" /]
[/#if]
# List of all the board related files.
BOARDSRC = ${path}${doc1.board.board_id[0]}/board.c
# Required include directories
BOARDINC = ${path}${doc1.board.board_id[0]}
# Shared variables
ALLCSRC += $(BOARDSRC)
ALLINC += $(BOARDINC)

12
tools/ftl/processors/processors.xml
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@ -1,4 +1,10 @@
<processors>
<processor class="board" target="STM32C0xx">
<name>STM32C0xx Board Configuration</name>
<path>resources/gencfg/processors/boards/stm32c0xx/templates</path>
<default>resources/gencfg/xml/stm32c0board.xml</default>
<basefilename>board</basefilename>
</processor>
<processor class="board" target="STM32F0xx">
<name>STM32F0xx Board Configuration</name>
<path>resources/gencfg/processors/boards/stm32f0xx/templates</path>
@ -35,6 +41,12 @@
<default>resources/gencfg/xml/stm32g4board.xml</default>
<basefilename>board</basefilename>
</processor>
<processor class="board" target="STM32H5xx">
<name>STM32H5xx Board Configuration</name>
<path>resources/gencfg/processors/boards/stm32h5xx/templates</path>
<default>resources/gencfg/xml/stm32h5board.xml</default>
<basefilename>board</basefilename>
</processor>
<processor class="board" target="STM32H7xx">
<name>STM32H7xx Board Configuration</name>
<path>resources/gencfg/processors/boards/stm32h7xx/templates</path>

180
tools/ftl/schema/boards/stm32h5xx_board.xsd Normal file
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@ -0,0 +1,180 @@
<?xml version="1.0" encoding="UTF-8"?>
<xs:schema elementFormDefault="qualified"
xmlns:xs="http://www.w3.org/2001/XMLSchema">
<xs:include schemaLocation="../common/doc.xsd" />
<xs:include schemaLocation="../common/stm32/stm32_gpiov2_port.xsd" />
<xs:include schemaLocation="abstract_board.xsd" />
<xs:complexType name="STM32H7xxBoardType">
<xs:complexContent>
<xs:extension base="AbstractBoardType">
<xs:sequence>
<xs:element name="subtype">
<xs:simpleType>
<xs:restriction base="xs:string">
<xs:whiteSpace value="collapse"></xs:whiteSpace>
<xs:enumeration value="STM32H723xx"></xs:enumeration>
<xs:enumeration value="STM32H733xx"></xs:enumeration>
<xs:enumeration value="STM32H725xx"></xs:enumeration>
<xs:enumeration value="STM32H735xx"></xs:enumeration>
<xs:enumeration value="STM32H742xx"></xs:enumeration>
<xs:enumeration value="STM32H743xx"></xs:enumeration>
<xs:enumeration value="STM32H753xx"></xs:enumeration>
<xs:enumeration value="STM32H745xx"></xs:enumeration>
<xs:enumeration value="STM32H755xx"></xs:enumeration>
<xs:enumeration value="STM32H747xx"></xs:enumeration>
<xs:enumeration value="STM32H757xx"></xs:enumeration>
<xs:enumeration value="STM32H750xx"></xs:enumeration>
<xs:enumeration value="STM32H7A3xx"></xs:enumeration>
<xs:enumeration value="STM32H7A3xxQ"></xs:enumeration>
<xs:enumeration value="STM32H7B0xx"></xs:enumeration>
<xs:enumeration value="STM32H7B0xxQ"></xs:enumeration>
<xs:enumeration value="STM32H7B3xx"></xs:enumeration>
<xs:enumeration value="STM32H7B3xxQ"></xs:enumeration>
</xs:restriction>
</xs:simpleType>
</xs:element>
<xs:element name="clocks" maxOccurs="1"
minOccurs="1">
<xs:complexType>
<xs:attribute name="HSEBypass"
use="required">
<xs:simpleType>
<xs:restriction base="xs:string">
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:enumeration value="false"></xs:enumeration>
<xs:enumeration value="true"></xs:enumeration>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
<xs:attribute name="HSEFrequency"
use="required">
<xs:simpleType>
<xs:restriction base="xs:int">
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:minInclusive value="0"></xs:minInclusive>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
<xs:attribute name="LSEBypass"
use="required">
<xs:simpleType>
<xs:restriction base="xs:string">
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:enumeration value="false"></xs:enumeration>
<xs:enumeration value="true"></xs:enumeration>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
<xs:attribute name="LSEDrive"
use="required">
<xs:simpleType>
<xs:restriction
base="LSEDriveType">
<xs:enumeration
value="3 High Drive (default)">
</xs:enumeration>
<xs:enumeration
value="2 Medium-High Drive">
</xs:enumeration>
<xs:enumeration
value="1 Medium-Low Drive">
</xs:enumeration>
<xs:enumeration
value="0 Low Drive (lowest consumption)">
</xs:enumeration>
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
<xs:attribute name="LSEFrequency"
use="required">
<xs:simpleType>
<xs:restriction base="xs:int">
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:minInclusive value="0"></xs:minInclusive>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
<xs:attribute name="VDD" use="required">
<xs:simpleType>
<xs:restriction base="xs:int">
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:minInclusive value="180"></xs:minInclusive>
<xs:maxInclusive value="360"></xs:maxInclusive>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
</xs:complexType>
</xs:element>
<xs:element name="ports" type="portsType"
maxOccurs="1" minOccurs="1">
</xs:element>
</xs:sequence>
</xs:extension>
</xs:complexContent>
</xs:complexType>
<xs:complexType name="portsType">
<xs:sequence>
<xs:element name="GPIOA" type="STM32GPIOv2PortType"
minOccurs="1" maxOccurs="1">
</xs:element>
<xs:element name="GPIOB" type="STM32GPIOv2PortType"
minOccurs="1" maxOccurs="1">
</xs:element>
<xs:element name="GPIOC" type="STM32GPIOv2PortType"
minOccurs="1" maxOccurs="1">
</xs:element>
<xs:element name="GPIOD" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOE" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOF" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOG" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOH" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOI" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOJ" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOK" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
</xs:sequence>
</xs:complexType>
<xs:element name="board" type="STM32H7xxBoardType"></xs:element>
<xs:simpleType name="LSEDriveType">
<xs:restriction base="xs:string"></xs:restriction>
</xs:simpleType>
</xs:schema>

43
tools/ftl/schema/boards/stm32h7xx_board.xsd
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@ -1,12 +1,10 @@
<?xml version="1.0" encoding="UTF-8"?>
<xs:schema elementFormDefault="qualified"
xmlns:xs="http://www.w3.org/2001/XMLSchema">
<xs:include schemaLocation="../common/doc.xsd" />
<xs:include schemaLocation="../common/stm32/stm32_gpiov2_port.xsd" />
<xs:include schemaLocation="abstract_board.xsd" />
<xs:complexType name="STM32H7xxBoardType">
<xs:complexType name="STM32H5xxBoardType">
<xs:complexContent>
<xs:extension base="AbstractBoardType">
<xs:sequence>
@ -14,24 +12,10 @@
<xs:simpleType>
<xs:restriction base="xs:string">
<xs:whiteSpace value="collapse"></xs:whiteSpace>
<xs:enumeration value="STM32H723xx"></xs:enumeration>
<xs:enumeration value="STM32H733xx"></xs:enumeration>
<xs:enumeration value="STM32H725xx"></xs:enumeration>
<xs:enumeration value="STM32H735xx"></xs:enumeration>
<xs:enumeration value="STM32H742xx"></xs:enumeration>
<xs:enumeration value="STM32H743xx"></xs:enumeration>
<xs:enumeration value="STM32H753xx"></xs:enumeration>
<xs:enumeration value="STM32H745xx"></xs:enumeration>
<xs:enumeration value="STM32H755xx"></xs:enumeration>
<xs:enumeration value="STM32H747xx"></xs:enumeration>
<xs:enumeration value="STM32H757xx"></xs:enumeration>
<xs:enumeration value="STM32H750xx"></xs:enumeration>
<xs:enumeration value="STM32H7A3xx"></xs:enumeration>
<xs:enumeration value="STM32H7A3xxQ"></xs:enumeration>
<xs:enumeration value="STM32H7B0xx"></xs:enumeration>
<xs:enumeration value="STM32H7B0xxQ"></xs:enumeration>
<xs:enumeration value="STM32H7B3xx"></xs:enumeration>
<xs:enumeration value="STM32H7B3xxQ"></xs:enumeration>
<xs:enumeration value="STM32H503xx"></xs:enumeration>
<xs:enumeration value="STM32H562xx"></xs:enumeration>
<xs:enumeration value="STM32H563xx"></xs:enumeration>
<xs:enumeration value="STM32H573xx"></xs:enumeration>
</xs:restriction>
</xs:simpleType>
</xs:element>
@ -103,7 +87,6 @@
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:minInclusive value="0"></xs:minInclusive>
</xs:restriction>
</xs:simpleType>
@ -114,25 +97,20 @@
<xs:whiteSpace
value="collapse">
</xs:whiteSpace>
<xs:minInclusive value="180"></xs:minInclusive>
<xs:maxInclusive value="360"></xs:maxInclusive>
</xs:restriction>
</xs:simpleType>
</xs:attribute>
</xs:complexType>
</xs:element>
<xs:element name="ports" type="portsType"
maxOccurs="1" minOccurs="1">
</xs:element>
</xs:sequence>
</xs:extension>
</xs:complexContent>
</xs:complexType>
<xs:complexType name="portsType">
<xs:sequence>
<xs:element name="GPIOA" type="STM32GPIOv2PortType"
@ -162,18 +140,9 @@
<xs:element name="GPIOI" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOJ" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
<xs:element name="GPIOK" type="STM32GPIOv2PortType"
maxOccurs="1" minOccurs="1">
</xs:element>
</xs:sequence>
</xs:complexType>
<xs:element name="board" type="STM32H7xxBoardType"></xs:element>
<xs:element name="board" type="STM32H5xxBoardType"></xs:element>
<xs:simpleType name="LSEDriveType">
<xs:restriction base="xs:string"></xs:restriction>
</xs:simpleType>

1197
tools/ftl/xml/stm32h5board.xml Normal file
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