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Fixed bug 3120785. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2439 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-11-27 19:16:40 +00:00
parent 5401b0fa1c
commit 9b7b5ce6bf
14 changed files with 159 additions and 54 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
demos/ARMCM3-STM32F100-DISCOVERY-GCC/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 TRUE #define STM32_PWM_USE_TIM3 TRUE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
demos/ARMCM3-STM32F103-FATFS-GCC/mcuconf.h
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@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
demos/ARMCM3-STM32F103-GCC/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
demos/ARMCM3-STM32F107-GCC/mcuconf.h
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@ -68,10 +68,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

2
docs/Doxyfile
View File

@ -31,7 +31,7 @@ PROJECT_NAME = ChibiOS/RT
# This could be handy for archiving the generated documentation or # This could be handy for archiving the generated documentation or
# if some version control system is used. # if some version control system is used.
PROJECT_NUMBER = 2.1.4 PROJECT_NUMBER = 2.1.5
# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) # The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute)
# base path where the generated documentation will be put. # base path where the generated documentation will be put.

67
os/hal/platforms/STM32/pwm_lld.c
View File

@ -78,6 +78,15 @@ PWMDriver PWMD3;
PWMDriver PWMD4; PWMDriver PWMD4;
#endif #endif
/**
* @brief PWM5 driver identifier.
* @note The driver PWM5 allocates the timer TIM5 when enabled.
*/
#if defined(STM32_PWM_USE_TIM5) || defined(__DOXYGEN__)
PWMDriver PWMD5;
#endif
/*===========================================================================*/ /*===========================================================================*/
/* Driver local variables. */ /* Driver local variables. */
/*===========================================================================*/ /*===========================================================================*/
@ -212,6 +221,23 @@ CH_IRQ_HANDLER(TIM4_IRQHandler) {
} }
#endif /* STM32_PWM_USE_TIM4 */ #endif /* STM32_PWM_USE_TIM4 */
#if STM32_PWM_USE_TIM5
/**
* @brief TIM5 interrupt handler.
*
* @isr
*/
CH_IRQ_HANDLER(TIM5_IRQHandler) {
CH_IRQ_PROLOGUE();
serve_interrupt(&PWMD5);
CH_IRQ_EPILOGUE();
}
#endif /* STM32_PWM_USE_TIM5 */
/*===========================================================================*/ /*===========================================================================*/
/* Driver exported functions. */ /* Driver exported functions. */
/*===========================================================================*/ /*===========================================================================*/
@ -266,6 +292,17 @@ void pwm_lld_init(void) {
PWMD4.pd_enabled_channels = 0; PWMD4.pd_enabled_channels = 0;
PWMD4.pd_tim = TIM4; PWMD4.pd_tim = TIM4;
#endif #endif
#if STM32_PWM_USE_TIM5
/* TIM2 reset, ensures reset state in order to avoid trouble with JTAGs.*/
RCC->APB1RSTR = RCC_APB1RSTR_TIM5RST;
RCC->APB1RSTR = 0;
/* Driver initialization.*/
pwmObjectInit(&PWMD5);
PWMD5.pd_enabled_channels = 0;
PWMD5.pd_tim = TIM5;
#endif
} }
/** /**
@ -289,9 +326,9 @@ void pwm_lld_start(PWMDriver *pwmp) {
RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST; RCC->APB2RSTR = RCC_APB2RSTR_TIM1RST;
RCC->APB2RSTR = 0; RCC->APB2RSTR = 0;
NVICEnableVector(TIM1_UP_IRQn, NVICEnableVector(TIM1_UP_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM1_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
NVICEnableVector(TIM1_CC_IRQn, NVICEnableVector(TIM1_CC_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM1_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_PWM_TIM1_IRQ_PRIORITY));
} }
#endif #endif
#if STM32_PWM_USE_TIM2 #if STM32_PWM_USE_TIM2
@ -300,7 +337,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
RCC->APB1RSTR = RCC_APB1RSTR_TIM2RST; RCC->APB1RSTR = RCC_APB1RSTR_TIM2RST;
RCC->APB1RSTR = 0; RCC->APB1RSTR = 0;
NVICEnableVector(TIM2_IRQn, NVICEnableVector(TIM2_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM2_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_PWM_TIM2_IRQ_PRIORITY));
} }
#endif #endif
#if STM32_PWM_USE_TIM3 #if STM32_PWM_USE_TIM3
@ -309,7 +346,7 @@ void pwm_lld_start(PWMDriver *pwmp) {
RCC->APB1RSTR = RCC_APB1RSTR_TIM3RST; RCC->APB1RSTR = RCC_APB1RSTR_TIM3RST;
RCC->APB1RSTR = 0; RCC->APB1RSTR = 0;
NVICEnableVector(TIM3_IRQn, NVICEnableVector(TIM3_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM3_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_PWM_TIM3_IRQ_PRIORITY));
} }
#endif #endif
#if STM32_PWM_USE_TIM4 #if STM32_PWM_USE_TIM4
@ -318,9 +355,21 @@ void pwm_lld_start(PWMDriver *pwmp) {
RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST; RCC->APB1RSTR = RCC_APB1RSTR_TIM4RST;
RCC->APB1RSTR = 0; RCC->APB1RSTR = 0;
NVICEnableVector(TIM4_IRQn, NVICEnableVector(TIM4_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_PWM4_IRQ_PRIORITY)); CORTEX_PRIORITY_MASK(STM32_PWM_TIM4_IRQ_PRIORITY));
} }
#endif #endif
#if STM32_PWM_USE_TIM5
if (&PWMD5 == pwmp) {
RCC->APB1ENR |= RCC_APB1ENR_TIM5EN;
RCC->APB1RSTR = RCC_APB1RSTR_TIM5RST;
RCC->APB1RSTR = 0;
NVICEnableVector(TIM5_IRQn,
CORTEX_PRIORITY_MASK(STM32_PWM_TIM5_IRQ_PRIORITY));
}
#endif
/* All channels configured in PWM1 mode with preload enabled and will /* All channels configured in PWM1 mode with preload enabled and will
stay that way until the driver is stopped.*/ stay that way until the driver is stopped.*/
pwmp->pd_tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | pwmp->pd_tim->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 |
@ -439,6 +488,12 @@ void pwm_lld_stop(PWMDriver *pwmp) {
NVICDisableVector(TIM4_IRQn); NVICDisableVector(TIM4_IRQn);
RCC->APB1ENR &= ~RCC_APB1ENR_TIM4EN; RCC->APB1ENR &= ~RCC_APB1ENR_TIM4EN;
} }
#endif
#if STM32_PWM_USE_TIM5
if (&PWMD5 == pwmp) {
NVICDisableVector(TIM5_IRQn);
RCC->APB1ENR &= ~RCC_APB1ENR_TIM5EN;
}
#endif #endif
} }
} }
@ -462,7 +517,7 @@ void pwm_lld_enable_channel(PWMDriver *pwmp,
pwmp->pd_enabled_channels |= (1 << channel); pwmp->pd_enabled_channels |= (1 << channel);
/* If there is a callback associated to the channel then the proper /* If there is a callback associated to the channel then the proper
interrupt is cleared and enabled.*/ interrupt is cleared and enabled.*/
if (pwmp->pd_config->pc_channels[0].pcc_callback) { if (pwmp->pd_config->pc_channels[channel].pcc_callback) {
pwmp->pd_tim->SR = ~(2 << channel); pwmp->pd_tim->SR = ~(2 << channel);
pwmp->pd_tim->DIER |= (2 << channel); pwmp->pd_tim->DIER |= (2 << channel);
} }

43
os/hal/platforms/STM32/pwm_lld.h
View File

@ -79,32 +79,48 @@
#define STM32_PWM_USE_TIM4 TRUE #define STM32_PWM_USE_TIM4 TRUE
#endif #endif
/**
* @brief PWM5 driver enable switch.
* @details If set to @p TRUE the support for PWM5 is included.
* @note The default is @p TRUE.
*/
#if !defined(STM32_PWM_USE_TIM5) || defined(__DOXYGEN__)
#define STM32_PWM_USE_TIM5 TRUE
#endif
/** /**
* @brief PWM1 interrupt priority level setting. * @brief PWM1 interrupt priority level setting.
*/ */
#if !defined(STM32_PWM_PWM1_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_PWM_TIM1_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#endif #endif
/** /**
* @brief PWM2 interrupt priority level setting. * @brief PWM2 interrupt priority level setting.
*/ */
#if !defined(STM32_PWM_PWM2_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_PWM_TIM2_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#endif #endif
/** /**
* @brief PWM3 interrupt priority level setting. * @brief PWM3 interrupt priority level setting.
*/ */
#if !defined(STM32_PWM_PWM3_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_PWM_TIM3_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#endif #endif
/** /**
* @brief PWM4 interrupt priority level setting. * @brief PWM4 interrupt priority level setting.
*/ */
#if !defined(STM32_PWM_PWM4_IRQ_PRIORITY) || defined(__DOXYGEN__) #if !defined(STM32_PWM_TIM4_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM4_IRQ_PRIORITY 7
#endif
/**
* @brief PWM5 interrupt priority level setting.
*/
#if !defined(STM32_PWM_TIM5_IRQ_PRIORITY) || defined(__DOXYGEN__)
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
#endif #endif
/*===========================================================================*/ /*===========================================================================*/
@ -127,8 +143,13 @@
#error "TIM4 not present in the selected device" #error "TIM4 not present in the selected device"
#endif #endif
#if STM32_PWM_USE_TIM5 && !STM32_HAS_TIM5
#error "TIM5 not present in the selected device"
#endif
#if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \ #if !STM32_PWM_USE_TIM1 && !STM32_PWM_USE_TIM2 && \
!STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 !STM32_PWM_USE_TIM3 && !STM32_PWM_USE_TIM4 && \
!STM32_PWM_USE_TIM5
#error "PWM driver activated but no TIM peripheral assigned" #error "PWM driver activated but no TIM peripheral assigned"
#endif #endif
@ -338,6 +359,10 @@ extern PWMDriver PWMD3;
extern PWMDriver PWMD4; extern PWMDriver PWMD4;
#endif #endif
#if defined(STM32_PWM_USE_TIM5) && !defined(__DOXYGEN__)
extern PWMDriver PWMD5;
#endif
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif

4
os/kernel/include/ch.h
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@ -39,7 +39,7 @@
/** /**
* @brief Kernel version string. * @brief Kernel version string.
*/ */
#define CH_KERNEL_VERSION "2.1.4unstable" #define CH_KERNEL_VERSION "2.1.5unstable"
/** /**
* @brief Kernel version major number. * @brief Kernel version major number.
@ -54,7 +54,7 @@
/** /**
* @brief Kernel version patch number. * @brief Kernel version patch number.
*/ */
#define CH_KERNEL_PATCH 4 #define CH_KERNEL_PATCH 5
/* /*
* Common values. * Common values.

7
readme.txt
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@ -64,6 +64,13 @@
*** Releases *** *** Releases ***
***************************************************************************** *****************************************************************************
*** 2.1.5 ***
- FIX: Fixed problem with PWM channel callbacks (bug 3120785).
- NEW: Added support for TIM5 in the STM32 PWM driver.
- CHANGE: Modified the STM32_PWM_PWMx_IRQ_PRIORITY macros in the STM32
PWM driver (and all the STM32 mcuconf.h files) and renamed them in
STM32_PWM_TIMx_IRQ_PRIORITY for consistency.
*** 2.1.4 *** *** 2.1.4 ***
- FIX: Fixed failed memory recovery by registry scan, improved the related - FIX: Fixed failed memory recovery by registry scan, improved the related
test case (bug 3116888)(backported to 2.0.8). test case (bug 3116888)(backported to 2.0.8).

10
testhal/STM32/ADC/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
testhal/STM32/CAN/mcuconf.h
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@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
testhal/STM32/PWM/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
testhal/STM32/SPI/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.

10
testhal/STM32/UART/mcuconf.h
View File

@ -65,10 +65,12 @@
#define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 FALSE
#define STM32_PWM_PWM1_IRQ_PRIORITY 7 #define STM32_PWM_USE_TIM5 FALSE
#define STM32_PWM_PWM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_PWM3_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7
#define STM32_PWM_PWM4_IRQ_PRIORITY 7 #define STM32_PWM_TIM3_IRQ_PRIORITY 7
#define STM32_PWM_TIM4_IRQ_PRIORITY 7
#define STM32_PWM_TIM5_IRQ_PRIORITY 7
/* /*
* SERIAL driver system settings. * SERIAL driver system settings.