git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7010 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -39,6 +39,11 @@
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/* Driver constants. */
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/*===========================================================================*/
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/**
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* @brief Base year of the calendar.
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*/
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#define RTC_BASE_YEAR 1980
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/**
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* @name Date/Time bit masks for FAT format
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* @{
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@ -86,12 +91,12 @@ typedef struct RTCDriver RTCDriver;
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* @brief Type of a structure representing an RTC date/time stamp.
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*/
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typedef struct {
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uint32_t year:8;
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uint32_t month: 4;
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uint32_t dstflag: 1;
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uint32_t dayofweek: 3;
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uint32_t day: 5;
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uint32_t millisecond: 27;
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uint32_t year:8; /**< @brief Years since 1980. */
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uint32_t month: 4; /**< @brief Months 1..12. */
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uint32_t dstflag: 1; /**< @brief DST correction flag. */
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uint32_t dayofweek: 3; /**< @brief Day of week 1..7. */
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uint32_t day: 5; /**< @brief Day of the month 1..31. */
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uint32_t millisecond: 27; /**< @brief Milliseconds since midnight.*/
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} RTCDateTime;
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#include "rtc_lld.h"
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@ -108,7 +113,8 @@ typedef struct {
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*
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* @iclass
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*/
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#define rtcSetTimeI(rtcp, timespec) rtc_lld_set_time(rtcp, timespec)
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#define rtcSetTimeI(rtcp, timespec) \
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rtc_lld_set_time(rtcp, timespec)
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/**
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* @brief Get current time.
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@ -118,7 +124,8 @@ typedef struct {
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*
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* @iclass
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*/
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#define rtcGetTimeI(rtcp, timespec) rtc_lld_get_time(rtcp, timespec)
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#define rtcGetTimeI(rtcp, timespec) \
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rtc_lld_get_time(rtcp, timespec)
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#if (RTC_ALARMS > 0) || defined(__DOXYGEN__)
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/**
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@ -159,7 +166,8 @@ typedef struct {
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*
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* @iclass
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*/
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#define rtcSetCallbackI(rtcp, callback) rtc_lld_set_callback(rtcp, callback)
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#define rtcSetCallbackI(rtcp, callback) \
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rtc_lld_set_callback(rtcp, callback)
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#endif /* RTC_SUPPORTS_CALLBACKS */
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/*===========================================================================*/
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@ -34,6 +34,22 @@
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/* Driver local definitions. */
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/*===========================================================================*/
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#define RTC_TR_PM_OFFSET 22
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#define RTC_TR_HT_OFFSET 20
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#define RTC_TR_HU_OFFSET 16
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#define RTC_TR_MNT_OFFSET 12
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#define RTC_TR_MNU_OFFSET 8
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#define RTC_TR_ST_OFFSET 4
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#define RTC_TR_SU_OFFSET 0
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#define RTC_DR_YT_OFFSET 20
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#define RTC_DR_YU_OFFSET 16
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#define RTC_DR_WDU_OFFSET 13
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#define RTC_DR_MT_OFFSET 12
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#define RTC_DR_MU_OFFSET 8
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#define RTC_DR_DT_OFFSET 4
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#define RTC_DR_DU_OFFSET 0
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/*===========================================================================*/
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/* Driver exported variables. */
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/*===========================================================================*/
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@ -95,7 +111,15 @@ static inline void rtc_exit_init(void) {
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* @notapi
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*/
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static void rtc_decode_time(uint32_t tr, RTCDateTime *timespec) {
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uint32_t n;
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n = ((tr >> RTC_TR_HT_OFFSET) & 3) * 36000000;
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n += ((tr >> RTC_TR_HU_OFFSET) & 15) * 3600000;
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n += ((tr >> RTC_TR_MNT_OFFSET) & 7) * 600000;
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n += ((tr >> RTC_TR_MNU_OFFSET) & 15) * 60000;
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n += ((tr >> RTC_TR_ST_OFFSET) & 7) * 10000;
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n += ((tr >> RTC_TR_SU_OFFSET) & 15) * 1000;
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timespec->millisecond = n;
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}
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/**
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@ -156,7 +180,7 @@ static uint32_t rtc_encode_date(const RTCDateTime *timespec) {
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uint32_t n, dr = 0;
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/* Year conversion. Note, only years last two digits are considered.*/
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n = 1980 + timespec->year;
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n = RTC_BASE_YEAR + timespec->year;
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dr = dr | ((n % 10) << RTC_DR_YU_OFFSET);
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n /= 10;
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dr = dr | ((n % 10) << RTC_DR_YT_OFFSET);
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@ -207,8 +231,9 @@ void rtc_lld_init(void) {
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rtc_enter_init();
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RTCD1.rtc->CR = 0;
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RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE;
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RTCD1.rtc->PRER = STM32_RTC_PRES_VALUE;
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RTCD1.rtc->ISR = 0;
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RTCD1.rtc->PRER = STM32_RTC_PRER_BITS;
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RTCD1.rtc->PRER = STM32_RTC_PRER_BITS;
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rtc_exit_init();
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}
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@ -253,14 +278,21 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec) {
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rtc_regs_sync();
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/* Decoding day time, this starts the atomic read sequence, see "Reading
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the calendar" in the RTC documentation.*/
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rtc_decode_time(rtcp->rtc->TR, timespec);
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/* If the RTC is capable of sub-second counting then the value is
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normalized in milliseconds and added to the time.*/
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#if STM32_RTC_HAS_SUBSECONDS
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subs = (1000 * ((rtcp->rtc->PRER & 0x7FFF) - rtcp->rtc->SSR)) /
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((rtcp->rtc->PRER & 0x7FFF) + 1);
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subs = (((rtcp->rtc->SSR << 16) / STM32_RTC_PRESS_VALUE) * 1000) >> 16);
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#else
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subs = 0;
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#endif /* STM32_RTC_HAS_SUBSECONDS */
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/* timespec->tv_time = rtcp->rtc->TR;
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timespec->tv_date = rtcp->rtc->DR;*/
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timespec->millisecond += subs;
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/* Decoding date, this concludes the atomic read sequence.*/
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rtc_decode_date(rtcp->rtc->DR, timespec);
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}
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#if (STM32_RTC_NUM_ALARMS > 0) || defined(__DOXYGEN__)
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@ -279,6 +311,7 @@ void rtc_lld_get_time(RTCDriver *rtcp, RTCDateTime *timespec) {
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void rtc_lld_set_alarm(RTCDriver *rtcp,
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rtcalarm_t alarm,
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const RTCAlarm *alarmspec) {
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if (alarm == 1){
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if (alarmspec != NULL){
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rtcp->id_rtc->CR &= ~RTC_CR_ALRAE;
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@ -41,30 +41,9 @@
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#define RTC_SUPPORTS_CALLBACKS STM32_RTC_HAS_INTERRUPTS
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/**
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* @name Data offsets in RTC date and time registers
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* @{
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* @brief RTC PRER register initializer.
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*/
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#define RTC_TR_PM_OFFSET 22
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#define RTC_TR_HT_OFFSET 20
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#define RTC_TR_HU_OFFSET 16
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#define RTC_TR_MNT_OFFSET 12
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#define RTC_TR_MNU_OFFSET 8
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#define RTC_TR_ST_OFFSET 4
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#define RTC_TR_SU_OFFSET 0
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#define RTC_DR_YT_OFFSET 20
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#define RTC_DR_YU_OFFSET 16
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#define RTC_DR_WDU_OFFSET 13
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#define RTC_DR_MT_OFFSET 12
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#define RTC_DR_MU_OFFSET 8
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#define RTC_DR_DT_OFFSET 4
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#define RTC_DR_DU_OFFSET 0
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/** @} */
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/**
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* @brief RTC PRES register initializer.
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*/
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#define RTC_PRES(a, s) ((((a) - 1) << 16) | ((s) - 1))
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#define RTC_PRER(a, s) ((((a) - 1) << 16) | ((s) - 1))
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/*===========================================================================*/
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/* Driver pre-compile time settings. */
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* @brief RTC PRES register initialization.
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* @note The default is calculated for a 32768Hz clock.
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*/
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#if !defined(STM32_RTC_PRES_VALUE) || defined(__DOXYGEN__)
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#define STM32_RTC_PRES_VALUE RTC_PRES(32, 1024)
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#if !defined(STM32_RTC_PRESA_VALUE) || defined(__DOXYGEN__)
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#define STM32_RTC_PRESA_VALUE 32
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#endif
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/**
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* @brief RTC PRESS divider initialization.
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* @note The default is calculated for a 32768Hz clock.
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*/
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#if !defined(STM32_RTC_PRESS_VALUE) || defined(__DOXYGEN__)
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#define STM32_RTC_PRESS_VALUE 1024
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#endif
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/** @} */
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/*===========================================================================*/
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/* Derived constants and error checks. */
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/*===========================================================================*/
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#error "STM32_PCLK1 frequency is too low"
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#endif
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/**
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* @brief Initialization for the RTC_PRER register.
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*/
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#define STM32_RTC_PRER_BITS RTC_PRER(STM32_RTC_PRESA_VALUE, \
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STM32_RTC_PRESS_VALUE)
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/*===========================================================================*/
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/* Driver data structures and types. */
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/*===========================================================================*/
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@ -27,7 +27,7 @@
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<link>
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<name>board</name>
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<type>2</type>
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<locationURI>CHIBIOS/boards/ST_STM32F4_DISCOVERY</locationURI>
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<locationURI>CHIBIOS/os/hal/boards/ST_STM32F4_DISCOVERY</locationURI>
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</link>
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<link>
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<name>os</name>
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