From 9bb5c3825d584dadb1f0e102b09003946deae904 Mon Sep 17 00:00:00 2001 From: cinsights Date: Tue, 20 Apr 2021 15:20:59 +0000 Subject: [PATCH] RP - more DMA INTx0/1 register block changes git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14243 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/common/ext/RP/RP2040/rp2040.h | 17 ++++++++++++----- os/hal/ports/RP/LLD/DMAv1/rp_dma.c | 8 ++++---- 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/os/common/ext/RP/RP2040/rp2040.h b/os/common/ext/RP/RP2040/rp2040.h index 3ee1335ea..a2d6eecc5 100644 --- a/os/common/ext/RP/RP2040/rp2040.h +++ b/os/common/ext/RP/RP2040/rp2040.h @@ -114,12 +114,19 @@ typedef struct { DMA_Channel_Typedef CH[12]; __I uint32_t resvd300[64]; __IO uint32_t INTR; - struct { - __IO uint32_t INTE; - __IO uint32_t INTF; - __IO uint32_t INTS; +// struct { +// __IO uint32_t INTE; +// __IO uint32_t INTF; +// __IO uint32_t INTS; +// __I uint32_t resvd10; +// } C[2]; + __IO uint32_t INTE0; + __IO uint32_t INTF0; + __IO uint32_t INTS0; __I uint32_t resvd10; - } C[2]; + __IO uint32_t INTE1; + __IO uint32_t INTF1; + __IO uint32_t INTS1; __IO uint32_t TIMER[4]; __IO uint32_t MULTI_CHAN_TRIGGER; __IO uint32_t SNIFF_CTRL; diff --git a/os/hal/ports/RP/LLD/DMAv1/rp_dma.c b/os/hal/ports/RP/LLD/DMAv1/rp_dma.c index 9979680e6..442d7116f 100644 --- a/os/hal/ports/RP/LLD/DMAv1/rp_dma.c +++ b/os/hal/ports/RP/LLD/DMAv1/rp_dma.c @@ -122,8 +122,8 @@ OSAL_IRQ_HANDLER(RP_DMA_IRQ_0_HANDLER) { OSAL_IRQ_PROLOGUE(); /* Getting and clearing pending interrupts for core 0.*/ - ints = DMA->C[0].INTS; - DMA->C[0].INTS = ints; + ints = DMA->INTS0; + DMA->INTS0 = ints; /* Scanning sources.*/ dmachp = __rp_dma_channels; @@ -150,8 +150,8 @@ OSAL_IRQ_HANDLER(RP_DMA_IRQ_1_HANDLER) { OSAL_IRQ_PROLOGUE(); /* Getting and clearing pending interrupts for core 1.*/ - ints = DMA->C[1].INTS; - DMA->C[1].INTS = ints; + ints = DMA->INTS1; + DMA->INTS1 = ints; /* Scanning sources.*/ dmachp = __rp_dma_channels;