git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10784 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2017-10-06 07:36:08 +00:00
parent 4d82132a47
commit 9c9ff7082a
2 changed files with 31 additions and 16 deletions

View File

@ -183,9 +183,18 @@ dma_isr_redir_t _stm32_dma_isr_redir[STM32_DMA_STREAMS];
/*===========================================================================*/ /*===========================================================================*/
/** /**
* @brief Mask of the allocated streams. * @brief Masks regarding the allocated streams.
*/ */
static uint32_t dma_streams_mask; static struct {
/**
* @brief Mask of the enabled streams.
*/
uint32_t streams_mask;
/**
* @brief Mask of the enabled stream ISRs.
*/
uint32_t isr_mask;
} dma;
/*===========================================================================*/ /*===========================================================================*/
/* Driver local functions. */ /* Driver local functions. */
@ -431,7 +440,8 @@ OSAL_IRQ_HANDLER(STM32_DMA2_CH7_HANDLER) {
void dmaInit(void) { void dmaInit(void) {
int i; int i;
dma_streams_mask = 0U; dma.streams_mask = 0U;
dma.isr_mask = 0U;
for (i = 0; i < STM32_DMA_STREAMS; i++) { for (i = 0; i < STM32_DMA_STREAMS; i++) {
_stm32_dma_streams[i].channel->CCR = 0U; _stm32_dma_streams[i].channel->CCR = 0U;
_stm32_dma_isr_redir[i].dma_func = NULL; _stm32_dma_isr_redir[i].dma_func = NULL;
@ -474,7 +484,7 @@ bool dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
osalDbgCheck(dmastp != NULL); osalDbgCheck(dmastp != NULL);
/* Checks if the stream is already taken.*/ /* Checks if the stream is already taken.*/
if ((dma_streams_mask & (1U << dmastp->selfindex)) != 0U) if ((dma.streams_mask & (1U << dmastp->selfindex)) != 0U)
return true; return true;
/* Installs the DMA handler.*/ /* Installs the DMA handler.*/
@ -482,11 +492,11 @@ bool dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
_stm32_dma_isr_redir[dmastp->selfindex].dma_param = param; _stm32_dma_isr_redir[dmastp->selfindex].dma_param = param;
/* Enabling DMA clocks required by the current streams set.*/ /* Enabling DMA clocks required by the current streams set.*/
if ((dma_streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) { if ((dma.streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) {
rccEnableDMA1(false); rccEnableDMA1(false);
} }
#if STM32_DMA2_NUM_CHANNELS > 0 #if STM32_DMA2_NUM_CHANNELS > 0
if ((dma_streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) { if ((dma.streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) {
rccEnableDMA2(false); rccEnableDMA2(false);
} }
#endif #endif
@ -495,15 +505,17 @@ bool dmaStreamAllocate(const stm32_dma_stream_t *dmastp,
dmaStreamDisable(dmastp); dmaStreamDisable(dmastp);
dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE; dmastp->channel->CCR = STM32_DMA_CCR_RESET_VALUE;
/* Enables the associated IRQ vector if not alread enabled and if a /* Enables the associated IRQ vector if not already enabled and if a
callback is defined.*/ callback is defined.*/
if (((dma_streams_mask & dmastp->cmask) == 0U) && if (func != NULL) {
(func != NULL)) { if ((dma.isr_mask & dmastp->cmask) == 0U) {
nvicEnableVector(dmastp->vector, priority); nvicEnableVector(dmastp->vector, priority);
} }
dma.isr_mask |= (1U << dmastp->selfindex);
}
/* Marks the stream as allocated.*/ /* Marks the stream as allocated.*/
dma_streams_mask |= (1U << dmastp->selfindex); dma.streams_mask |= (1U << dmastp->selfindex);
return false; return false;
} }
@ -526,14 +538,15 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
osalDbgCheck(dmastp != NULL); osalDbgCheck(dmastp != NULL);
/* Check if the streams is not taken.*/ /* Check if the streams is not taken.*/
osalDbgAssert((dma_streams_mask & (1 << dmastp->selfindex)) != 0U, osalDbgAssert((dma.streams_mask & (1 << dmastp->selfindex)) != 0U,
"not allocated"); "not allocated");
/* Marks the stream as not allocated.*/ /* Marks the stream as not allocated.*/
dma_streams_mask &= ~(1U << dmastp->selfindex); dma.streams_mask &= ~(1U << dmastp->selfindex);
dma.isr_mask &= ~(1U << dmastp->selfindex);
/* Disables the associated IRQ vector if it is no more in use.*/ /* Disables the associated IRQ vector if it is no more in use.*/
if ((dma_streams_mask & dmastp->cmask) == 0U) { if ((dma.streams_mask & dmastp->cmask) == 0U) {
nvicDisableVector(dmastp->vector); nvicDisableVector(dmastp->vector);
} }
@ -542,11 +555,11 @@ void dmaStreamRelease(const stm32_dma_stream_t *dmastp) {
_stm32_dma_isr_redir[dmastp->selfindex].dma_param = NULL; _stm32_dma_isr_redir[dmastp->selfindex].dma_param = NULL;
/* Shutting down clocks that are no more required, if any.*/ /* Shutting down clocks that are no more required, if any.*/
if ((dma_streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) { if ((dma.streams_mask & STM32_DMA1_STREAMS_MASK) == 0U) {
rccDisableDMA1(false); rccDisableDMA1(false);
} }
#if STM32_DMA2_NUM_CHANNELS > 0 #if STM32_DMA2_NUM_CHANNELS > 0
if ((dma_streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) { if ((dma.streams_mask & STM32_DMA2_STREAMS_MASK) == 0U) {
rccDisableDMA2(false); rccDisableDMA2(false);
} }
#endif #endif

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@ -133,6 +133,8 @@
dependencies and configuration directories. This makes possible dependencies and configuration directories. This makes possible
to have multiple non-conflicting makefiles in the same project. to have multiple non-conflicting makefiles in the same project.
Updated the various platform.mk implementing "smart build" mode. Updated the various platform.mk implementing "smart build" mode.
- HAL: Fixed IRQ sharing issue in STM32 DMAv1 driver (bug #891)(backported
to 17.6.3 and 16.1.10).
- HAL: Fixed various STM32 registry problems (bug #889)(backported to 17.6.2 - HAL: Fixed various STM32 registry problems (bug #889)(backported to 17.6.2
and 16.1.10). and 16.1.10).
- LIB: Fixed heap allocator returning unaligned blocks (bug #888)(backported - LIB: Fixed heap allocator returning unaligned blocks (bug #888)(backported