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Removed extra brackets. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9744 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2016-08-26 09:17:42 +00:00
parent 81fe590a94
commit 9d85c23ac8
1 changed files with 8 additions and 8 deletions
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16
os/hal/ports/STM32/STM32F0xx/stm32_registry.h
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@ -1922,7 +1922,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART1_RX_DMA_CHN 0x00880888 #define STM32_USART1_RX_DMA_CHN 0x00880888
#define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_USART1_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -1938,7 +1938,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART2_RX_DMA_CHN 0x00990999 #define STM32_USART2_RX_DMA_CHN 0x00990999
#define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_USART2_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -1954,7 +1954,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART3_RX_DMA_CHN 0x00AA0AAA #define STM32_USART3_RX_DMA_CHN 0x00AA0AAA
#define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_USART3_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -1970,7 +1970,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART4_RX_DMA_CHN 0x00BB0BBB #define STM32_UART4_RX_DMA_CHN 0x00BB0BBB
#define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_UART4_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -1986,7 +1986,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART5_RX_DMA_CHN 0x00CC0CCC #define STM32_UART5_RX_DMA_CHN 0x00CC0CCC
#define STM32_UART5_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_UART5_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -2002,7 +2002,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_USART6_RX_DMA_CHN 0x00DD0DDD #define STM32_USART6_RX_DMA_CHN 0x00DD0DDD
#define STM32_USART6_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_USART6_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -2018,7 +2018,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART7_RX_DMA_CHN 0x00EE0EEE #define STM32_UART7_RX_DMA_CHN 0x00EE0EEE
#define STM32_UART7_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_UART7_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\
@ -2034,7 +2034,7 @@
STM32_DMA_STREAM_ID_MSK(1, 5) |\ STM32_DMA_STREAM_ID_MSK(1, 5) |\
STM32_DMA_STREAM_ID_MSK(1, 6) |\ STM32_DMA_STREAM_ID_MSK(1, 6) |\
STM32_DMA_STREAM_ID_MSK(2, 2) |\ STM32_DMA_STREAM_ID_MSK(2, 2) |\
STM32_DMA_STREAM_ID_MSK(2, 3))) STM32_DMA_STREAM_ID_MSK(2, 3))
#define STM32_UART8_RX_DMA_CHN 0x00FF0FFF #define STM32_UART8_RX_DMA_CHN 0x00FF0FFF
#define STM32_UART8_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\ #define STM32_UART8_TX_DMA_MSK (STM32_DMA_STREAM_ID_MSK(1, 2) |\
STM32_DMA_STREAM_ID_MSK(1, 4) |\ STM32_DMA_STREAM_ID_MSK(1, 4) |\