* add serial support for the AT91SAM7 DBGU peripheral

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1888 35acf78f-673a-0410-8e92-d51de3d6d3f4

boards/OLIMEX_SAM7_EX256/board.c

@@ -33,8 +33,14 @@ static CH_IRQ_HANDLER(SYSIrqHandler) {
     chSysTimerHandlerI();
     chSysUnlockFromIsr();
   }
-  AT91C_BASE_AIC->AIC_EOICR = 0;
   
+#if USE_SAM7_DBGU_UART
+  if (AT91C_BASE_DBGU->DBGU_CSR & 
+    (AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
+    sd_lld_serve_interrupt(&SD3);
+  }
+#endif  
+  AT91C_BASE_AIC->AIC_EOICR = 0;
   CH_IRQ_EPILOGUE();
 }
 

os/hal/platforms/AT91SAM7/serial_lld.c

@@ -36,6 +36,8 @@
 #define SAM7_USART0_TX    AT91C_PA6_TXD0
 #define SAM7_USART1_RX    AT91C_PA21_RXD1
 #define SAM7_USART1_TX    AT91C_PA22_TXD1
+#define SAM7_DBGU_RX      AT91C_PA9_DRXD
+#define SAM7_DBGU_TX      AT91C_PA10_DTXD
 
 #elif SAM7_PLATFORM == SAM7X256
 
@@ -43,6 +45,8 @@
 #define SAM7_USART0_TX    AT91C_PA1_TXD0
 #define SAM7_USART1_RX    AT91C_PA5_RXD1
 #define SAM7_USART1_TX    AT91C_PA6_TXD1
+#define SAM7_DBGU_RX      AT91C_PA27_DRXD
+#define SAM7_DBGU_TX      AT91C_PA28_DTXD
 
 #else
 #error "serial lines not defined for this SAM7 version"
@@ -62,6 +66,11 @@ SerialDriver SD1;
 SerialDriver SD2;
 #endif
 
+#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
+/** @brief DBGU_UART serial driver identifier.*/
+SerialDriver SD3;
+#endif
+
 /*===========================================================================*/
 /* Driver local variables.                                                   */
 /*===========================================================================*/
@@ -145,12 +154,15 @@ static void set_error(SerialDriver *sdp, AT91_REG csr) {
 #if defined(__GNU__)
 __attribute__((noinline))
 #endif
+#if !USE_SAM7_DBGU_UART
+static
+#endif
 /**
  * @brief   Common IRQ handler.
  *
  * @param[in] sdp       communication channel associated to the USART
  */
-static void serve_interrupt(SerialDriver *sdp) {
+void sd_lld_serve_interrupt(SerialDriver *sdp) {
   uint32_t csr;
   AT91PS_USART u = sdp->usart;
 
@@ -195,6 +207,13 @@ static void notify2(void) {
 }
 #endif
 
+#if USE_SAM7_DBGU_UART || defined(__DOXYGEN__)
+static void notify3(void) {
+
+  AT91C_BASE_DBGU->DBGU_IER = AT91C_US_TXRDY;
+}
+#endif
+
 /*===========================================================================*/
 /* Driver interrupt handlers.                                                */
 /*===========================================================================*/
@@ -203,9 +222,8 @@ static void notify2(void) {
 CH_IRQ_HANDLER(USART0IrqHandler) {
 
   CH_IRQ_PROLOGUE();
-
+  sd_lld_serve_interrupt(&SD1);
-  serve_interrupt(&SD1);
+  AT91C_BASE_AIC->AIC_EOICR = 0;
-
   CH_IRQ_EPILOGUE();
 }
 #endif
@@ -214,13 +232,15 @@ CH_IRQ_HANDLER(USART0IrqHandler) {
 CH_IRQ_HANDLER(USART1IrqHandler) {
 
   CH_IRQ_PROLOGUE();
-
+  sd_lld_serve_interrupt(&SD2);
-  serve_interrupt(&SD2);
+  AT91C_BASE_AIC->AIC_EOICR = 0;
-
   CH_IRQ_EPILOGUE();
 }
 #endif
 
+// note - DBGU_UART IRQ is the SysIrq in board.c
+// since it's not vectored separately by the AIC
+
 /*===========================================================================*/
 /* Driver exported functions.                                                */
 /*===========================================================================*/
@@ -251,6 +271,17 @@ void sd_lld_init(void) {
                   AT91C_AIC_SRCTYPE_HIGH_LEVEL | SAM7_USART1_PRIORITY,
                   USART1IrqHandler);
 #endif
+
+#if USE_SAM7_DBGU_UART
+  sdObjectInit(&SD3, NULL, notify3);
+  // this is a little cheap, but OK for now since there's enough overlap
+  // between dbgu and usart register maps.  it means we can reuse all the
+  // same usart interrupt handling and config that already exists
+  SD3.usart = (AT91PS_USART)AT91C_BASE_DBGU;
+  AT91C_BASE_PIOA->PIO_PDR   = SAM7_DBGU_RX | SAM7_DBGU_TX;
+  AT91C_BASE_PIOA->PIO_ASR   = SAM7_DBGU_RX | SAM7_DBGU_TX;
+  AT91C_BASE_PIOA->PIO_PPUDR = SAM7_DBGU_RX | SAM7_DBGU_TX;
+#endif
 }
 
 /**
@@ -283,6 +314,7 @@ void sd_lld_start(SerialDriver *sdp, const SerialConfig *config) {
       AIC_EnableIT(AT91C_ID_US1);
     }
 #endif
+  // note - no explicit start for SD3 (DBGU_UART) since it's not included in the AIC or PMC
   }
   usart_init(sdp, config);
 }
@@ -311,6 +343,12 @@ void sd_lld_stop(SerialDriver *sdp) {
       AIC_DisableIT(AT91C_ID_US1);
       return;
     }
+#endif
+#if USE_SAM7_DBGU_UART
+    if (&SD3 == sdp) {
+      AT91C_BASE_DBGU->DBGU_IDR = 0xFFFFFFFF;
+      return;
+    }
 #endif
   }
 }

os/hal/platforms/AT91SAM7/serial_lld.h

@@ -56,6 +56,15 @@
 #define USE_SAM7_USART1             TRUE
 #endif
 
+/**
+ * @brief   DBGU UART driver enable switch.
+ * @details If set to @p TRUE the support for the DBGU UART is included.
+ * @note    The default is @p TRUE.
+ */
+#if !defined(USE_SAM7_DBGU_UART) || defined(__DOXYGEN__)
+#define USE_SAM7_DBGU_UART             TRUE
+#endif
+
 /**
  * @brief   UART1 interrupt priority level setting.
  */
@@ -70,6 +79,13 @@
 #define SAM7_USART1_PRIORITY        (AT91C_AIC_PRIOR_HIGHEST - 2)
 #endif
 
+/**
+ * @brief   DBGU_UART interrupt priority level setting.
+ */
+#if !defined(SAM7_DBGU_UART_PRIORITY) || defined(__DOXYGEN__)
+#define SAM7_DBGU_UART_PRIORITY        (AT91C_AIC_PRIOR_HIGHEST - 2)
+#endif
+
 /*===========================================================================*/
 /* Derived constants and error checks.                                       */
 /*===========================================================================*/
@@ -138,6 +154,9 @@ extern SerialDriver SD1;
 #if USE_SAM7_USART1 && !defined(__DOXYGEN__)
 extern SerialDriver SD2;
 #endif
+#if USE_SAM7_DBGU_UART
+extern SerialDriver SD3;
+#endif
 
 #ifdef __cplusplus
 extern "C" {
@@ -145,6 +164,9 @@ extern "C" {
   void sd_lld_init(void);
   void sd_lld_start(SerialDriver *sdp, const SerialConfig *config);
   void sd_lld_stop(SerialDriver *sdp);
+#if USE_SAM7_DBGU_UART
+  void sd_lld_serve_interrupt(SerialDriver *sdp);
+#endif
 #ifdef __cplusplus
 }
 #endif