diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
index 27a3544b5..dc187a5ff 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.c
@@ -88,19 +88,26 @@
  * @retval false        Peripheral is secured.
  *
  */
-bool mtxConfigPeriphSecurity(Matrix *mtxp, uint8_t id, bool mode) {
+bool mtxConfigPeriphSecurity(Matrix *mtxp, uint32_t id, bool mode) {
 
-  mtxDisableWP(mtxp);
-  if (mode) {
-    mtxp->MATRIX_SPSELR[id / 32] |= (MATRIX_SPSELR_NSECP0 << id);
+  uint32_t mask;
+  if (id < 74) {
+    mask = id & 0x1F;
   }
   else {
-    mtxp->MATRIX_SPSELR[id / 32] &= ~(MATRIX_SPSELR_NSECP0 << id);
+    mask = (id & 0x1F) - 1;
+  }
+  mtxDisableWP(mtxp);
+  if (mode) {
+    mtxp->MATRIX_SPSELR[id / 32] |= (MATRIX_SPSELR_NSECP0 << mask);
+  }
+  else {
+    mtxp->MATRIX_SPSELR[id / 32] &= ~(MATRIX_SPSELR_NSECP0 << mask);
   }
   mtxEnableWP(mtxp);
 
-  return (MATRIX0->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << id)) &
-         (MATRIX1->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << id));
+  return (MATRIX0->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << mask)) &
+         (MATRIX1->MATRIX_SPSELR[id / 32] & (MATRIX_SPSELR_NSECP0 << mask));
 }
 
 /**
diff --git a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
index a29be16da..11d6e8e85 100644
--- a/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
+++ b/os/hal/ports/SAMA/SAMA5D2x/sama_matrix.h
@@ -320,7 +320,7 @@
 #ifdef __cplusplus
 extern "C" {
 #endif
- bool mtxConfigPeriphSecurity(Matrix *mtxp, uint8_t id, bool mode);
+ bool mtxConfigPeriphSecurity(Matrix *mtxp, uint32_t id, bool mode);
  void mtxConfigDefaultMaster(Matrix *mtxp, uint8_t slaveID,
                              uint8_t type, uint8_t masterID);
  void mtxConfigSlaveSec(Matrix *mtxp, uint8_t slaveID,