IAR CM4 FPU support verified.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3667 35acf78f-673a-0410-8e92-d51de3d6d3f4

os/ports/IAR/ARMCMx/chcore_v7m.c

@@ -116,8 +116,6 @@ void _port_init(void) {
 
 #if CORTEX_USE_FPU
   {
-    uint32_t reg;
-
     /* Initializing the FPU context save in lazy mode.*/
     SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
 
@@ -125,7 +123,7 @@ void _port_init(void) {
     SCB_CPACR |= 0x00F00000;
 
     /* Enables FPU context save/restore on exception entry/exit (FPCA bit).*/
-    __set_control(__get_control() | 4);
+    __set_CONTROL(__get_CONTROL() | 4);
 
     /* FPSCR and FPDSCR initially zero.*/
     __set_FPSCR(0);

readme.txt

@@ -84,10 +84,8 @@
   the duplicated instances under the GCC, IAR and Keil ports. Function names
   prefixes changed from "NVIC" to "nvic" because style conventions.
 - NEW: Added voltage regulator initialization to the STM32F4xx HAL.
-- NEW: Modified the STM32F4-Discovery demo to put critical kernel data
-  structures and stacks in the CCM RAM instead normal RAM. It is done using
-  a special .ld file that can be customized to decide how to allocate data
-  in the various RAM sections.
+- NEW: Added a linker script that demonstrates how to put stacks and other
+  critical structures in the CCM RAM instead normal RAM.
 - NEW: Added experimental support for the Cortex-M4 FPU (default when the
   FPU is present).
 - NEW: Improved I2C driver model and STM32 implementation by Barthess.

testhal/STM32F4xx/IRQ_STORM_FPU/main.c

@@ -301,5 +301,4 @@ int main(void) {
   while (TRUE) {
     chThdSleepMilliseconds(5000);
   }
-  return 0;
 }