git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6183 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-08-19 15:07:47 +00:00
parent 79ad42bc2b
commit a042a8234a
17 changed files with 66 additions and 67 deletions

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@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

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@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

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@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

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@ -32,16 +32,16 @@ static const CANConfig cancfg = {
*/ */
static WORKING_AREA(can_rx_wa, 256); static WORKING_AREA(can_rx_wa, 256);
static msg_t can_rx(void *p) { static msg_t can_rx(void *p) {
EventListener el; event_listener_t el;
CANRxFrame rxmsg; CANRxFrame rxmsg;
(void)p; (void)p;
chRegSetThreadName("receiver"); chRegSetThreadName("receiver");
chEvtRegister(&CAND1.rxfull_event, &el, 0); chEvtRegister(&CAND1.rxfull_event, &el, 0);
while(!chThdShouldTerminate()) { while(!chThdShouldTerminateX()) {
if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0) if (chEvtWaitAnyTimeout(ALL_EVENTS, MS2ST(100)) == 0)
continue; continue;
while (canReceive(&CAND1, CAN_ANY_MAILBOX, &rxmsg, TIME_IMMEDIATE) == RDY_OK) { while (canReceive(&CAND1, CAN_ANY_MAILBOX, &rxmsg, TIME_IMMEDIATE) == MSG_OK) {
/* Process message.*/ /* Process message.*/
palTogglePad(GPIOE, GPIOE_LED3_RED); palTogglePad(GPIOE, GPIOE_LED3_RED);
} }
@ -66,7 +66,7 @@ static msg_t can_tx(void * p) {
txmsg.data32[0] = 0x55AA55AA; txmsg.data32[0] = 0x55AA55AA;
txmsg.data32[1] = 0x00FF00FF; txmsg.data32[1] = 0x00FF00FF;
while (!chThdShouldTerminate()) { while (!chThdShouldTerminateX()) {
canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100)); canTransmit(&CAND1, CAN_ANY_MAILBOX, &txmsg, MS2ST(100));
chThdSleepMilliseconds(500); chThdSleepMilliseconds(500);
} }

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@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

View File

@ -25,19 +25,20 @@ static void led5off(void *arg) {
/* Triggered when the button is pressed or released. The LED5 is set to ON.*/ /* Triggered when the button is pressed or released. The LED5 is set to ON.*/
static void extcb1(EXTDriver *extp, expchannel_t channel) { static void extcb1(EXTDriver *extp, expchannel_t channel) {
static VirtualTimer vt4; static virtual_timer_t vt4;
(void)extp; (void)extp;
(void)channel; (void)channel;
palSetPad(GPIOE, GPIOE_LED10_RED); palSetPad(GPIOE, GPIOE_LED10_RED);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt4))
chVTResetI(&vt4); /* Timer reset, if still active.*/
chVTResetI(&vt4);
/* LED4 set to OFF after 200mS.*/ /* LED4 set to OFF after 200mS.*/
chVTSetI(&vt4, MS2ST(200), led5off, NULL); chVTSetI(&vt4, MS2ST(200), led5off, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
static const EXTConfig extcfg = { static const EXTConfig extcfg = {

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@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

View File

@ -357,7 +357,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__) #if !defined(CH_DBG_STATISTICS) || defined(__DOXYGEN__)
#define CH_DBG_STATISTICS TRUE #define CH_DBG_STATISTICS FALSE
#endif #endif
/** /**
@ -368,7 +368,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__) #if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_SYSTEM_STATE_CHECK TRUE #define CH_DBG_SYSTEM_STATE_CHECK FALSE
#endif #endif
/** /**
@ -379,7 +379,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_CHECKS TRUE #define CH_DBG_ENABLE_CHECKS FALSE
#endif #endif
/** /**
@ -391,7 +391,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_ASSERTS TRUE #define CH_DBG_ENABLE_ASSERTS FALSE
#endif #endif
/** /**
@ -402,7 +402,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_TRACE TRUE #define CH_DBG_ENABLE_TRACE FALSE
#endif #endif
/** /**
@ -416,7 +416,7 @@
* @p panic_msg variable set to @p NULL. * @p panic_msg variable set to @p NULL.
*/ */
#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__) #if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
#define CH_DBG_ENABLE_STACK_CHECK TRUE #define CH_DBG_ENABLE_STACK_CHECK FALSE
#endif #endif
/** /**
@ -428,7 +428,7 @@
* @note The default is @p FALSE. * @note The default is @p FALSE.
*/ */
#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__) #if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
#define CH_DBG_FILL_THREADS TRUE #define CH_DBG_FILL_THREADS FALSE
#endif #endif
/** /**

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@ -46,12 +46,12 @@
#define MSG_SEND_LEFT 0 #define MSG_SEND_LEFT 0
#define MSG_SEND_RIGHT 1 #define MSG_SEND_RIGHT 1
static bool_t saturated; static bool saturated;
/* /*
* Mailboxes and buffers. * Mailboxes and buffers.
*/ */
static Mailbox mb[NUM_THREADS]; static mailbox_t mb[NUM_THREADS];
static msg_t b[NUM_THREADS][MAILBOX_SIZE]; static msg_t b[NUM_THREADS][MAILBOX_SIZE];
/* /*
@ -101,7 +101,7 @@ static msg_t WorkerThread(void *arg) {
/* If this thread is not at the end of a chain re-sending the message, /* If this thread is not at the end of a chain re-sending the message,
note this check works because the variable target is unsigned.*/ note this check works because the variable target is unsigned.*/
msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE); msg = chMBPost(&mb[target], msg, TIME_IMMEDIATE);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
} }
else { else {
@ -121,11 +121,11 @@ static void gpt2cb(GPTDriver *gptp) {
msg_t msg; msg_t msg;
(void)gptp; (void)gptp;
chSysLockFromIsr(); chSysLockFromISR();
msg = chMBPostI(&mb[0], MSG_SEND_RIGHT); msg = chMBPostI(&mb[0], MSG_SEND_RIGHT);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -135,11 +135,11 @@ static void gpt3cb(GPTDriver *gptp) {
msg_t msg; msg_t msg;
(void)gptp; (void)gptp;
chSysLockFromIsr(); chSysLockFromISR();
msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT); msg = chMBPostI(&mb[NUM_THREADS - 1], MSG_SEND_LEFT);
if (msg != RDY_OK) if (msg != MSG_OK)
saturated = TRUE; saturated = TRUE;
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -221,14 +221,14 @@ int main(void) {
/* /*
* Activates GPTs. * Activates GPTs.
*/ */
gptStart(&GPTD2, &gpt2cfg); gptStart(&GPTD4, &gpt2cfg);
gptStart(&GPTD3, &gpt3cfg); gptStart(&GPTD3, &gpt3cfg);
/* /*
* Initializes the mailboxes and creates the worker threads. * Initializes the mailboxes and creates the worker threads.
*/ */
for (i = 0; i < NUM_THREADS; i++) { for (i = 0; i < NUM_THREADS; i++) {
chMBInit(&mb[i], b[i], MAILBOX_SIZE); chMBObjectInit(&mb[i], b[i], MAILBOX_SIZE);
chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i], chThdCreateStatic(waWorkerThread[i], sizeof waWorkerThread[i],
NORMALPRIO - 20, WorkerThread, (void *)i); NORMALPRIO - 20, WorkerThread, (void *)i);
} }
@ -291,10 +291,10 @@ int main(void) {
saturated = FALSE; saturated = FALSE;
threshold = 0; threshold = 0;
for (interval = 2000; interval >= 10; interval -= interval / 10) { for (interval = 2000; interval >= 10; interval -= interval / 10) {
gptStartContinuous(&GPTD2, interval - 1); /* Slightly out of phase.*/ gptStartContinuous(&GPTD4, interval - 1); /* Slightly out of phase.*/
gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/ gptStartContinuous(&GPTD3, interval + 1); /* Slightly out of phase.*/
chThdSleepMilliseconds(1000); chThdSleepMilliseconds(1000);
gptStopTimer(&GPTD2); gptStopTimer(&GPTD4);
gptStopTimer(&GPTD3); gptStopTimer(&GPTD3);
if (!saturated) if (!saturated)
print("."); print(".");
@ -315,7 +315,7 @@ int main(void) {
if (threshold > worst) if (threshold > worst)
worst = threshold; worst = threshold;
} }
gptStopTimer(&GPTD2); gptStopTimer(&GPTD4);
gptStopTimer(&GPTD3); gptStopTimer(&GPTD3);
print("Worst case at "); print("Worst case at ");

View File

@ -107,16 +107,16 @@
* GPT driver system settings. * GPT driver system settings.
*/ */
#define STM32_GPT_USE_TIM1 TRUE #define STM32_GPT_USE_TIM1 TRUE
#define STM32_GPT_USE_TIM2 TRUE #define STM32_GPT_USE_TIM2 FALSE
#define STM32_GPT_USE_TIM3 TRUE #define STM32_GPT_USE_TIM3 TRUE
#define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM4 TRUE
#define STM32_GPT_USE_TIM6 TRUE #define STM32_GPT_USE_TIM6 TRUE
#define STM32_GPT_USE_TIM7 TRUE #define STM32_GPT_USE_TIM7 TRUE
#define STM32_GPT_USE_TIM8 TRUE #define STM32_GPT_USE_TIM8 TRUE
#define STM32_GPT_TIM1_IRQ_PRIORITY 7 #define STM32_GPT_TIM1_IRQ_PRIORITY 7
#define STM32_GPT_TIM2_IRQ_PRIORITY 6 #define STM32_GPT_TIM2_IRQ_PRIORITY 7
#define STM32_GPT_TIM3_IRQ_PRIORITY 10 #define STM32_GPT_TIM3_IRQ_PRIORITY 10
#define STM32_GPT_TIM4_IRQ_PRIORITY 7 #define STM32_GPT_TIM4_IRQ_PRIORITY 6
#define STM32_GPT_TIM6_IRQ_PRIORITY 7 #define STM32_GPT_TIM6_IRQ_PRIORITY 7
#define STM32_GPT_TIM7_IRQ_PRIORITY 7 #define STM32_GPT_TIM7_IRQ_PRIORITY 7
#define STM32_GPT_TIM8_IRQ_PRIORITY 7 #define STM32_GPT_TIM8_IRQ_PRIORITY 7

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@ -27,7 +27,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

View File

@ -83,13 +83,13 @@ int main(void) {
chSysInit(); chSysInit();
/* /*
* Initializes the PWM driver 2 and ICU driver 3. * Initializes the PWM driver 4 and ICU driver 3.
* GPIOA15 is the PWM output. * GPIOD12 is the PWM output channel 0.
* GPIOC6 is the ICU input. * GPIOC6 is the ICU input ICU_CHANNEL_1.
* The two pins have to be externally connected together. * The two pins have to be externally connected together.
*/ */
pwmStart(&PWMD2, &pwmcfg); pwmStart(&PWMD4, &pwmcfg);
palSetPadMode(GPIOA, 15, PAL_MODE_ALTERNATE(1)); palSetPadMode(GPIOD, 12, PAL_MODE_ALTERNATE(2));
icuStart(&ICUD3, &icucfg); icuStart(&ICUD3, &icucfg);
palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2)); palSetPadMode(GPIOC, 6, PAL_MODE_ALTERNATE(2));
icuEnable(&ICUD3); icuEnable(&ICUD3);
@ -98,33 +98,33 @@ int main(void) {
/* /*
* Starts the PWM channel 0 using 75% duty cycle. * Starts the PWM channel 0 using 75% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 7500)); pwmEnableChannel(&PWMD4, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD4, 7500));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes the PWM channel 0 to 50% duty cycle. * Changes the PWM channel 0 to 50% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 5000)); pwmEnableChannel(&PWMD4, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD4, 5000));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes the PWM channel 0 to 25% duty cycle. * Changes the PWM channel 0 to 25% duty cycle.
*/ */
pwmEnableChannel(&PWMD2, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD2, 2500)); pwmEnableChannel(&PWMD4, 0, PWM_PERCENTAGE_TO_WIDTH(&PWMD4, 2500));
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Changes PWM period to half second the duty cycle becomes 50% * Changes PWM period to half second the duty cycle becomes 50%
* implicitly. * implicitly.
*/ */
pwmChangePeriod(&PWMD2, 5000); pwmChangePeriod(&PWMD4, 5000);
chThdSleepMilliseconds(5000); chThdSleepMilliseconds(5000);
/* /*
* Disables channel 0 and stops the drivers. * Disables channel 0 and stops the drivers.
*/ */
pwmDisableChannel(&PWMD2, 0); pwmDisableChannel(&PWMD4, 0);
pwmStop(&PWMD2); pwmStop(&PWMD4);
icuDisable(&ICUD3); icuDisable(&ICUD3);
icuStop(&ICUD3); icuStop(&ICUD3);
palClearPad(GPIOE, GPIOE_LED4_BLUE); palClearPad(GPIOE, GPIOE_LED4_BLUE);

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@ -139,7 +139,7 @@
#define STM32_ICU_USE_TIM1 TRUE #define STM32_ICU_USE_TIM1 TRUE
#define STM32_ICU_USE_TIM2 FALSE #define STM32_ICU_USE_TIM2 FALSE
#define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM3 TRUE
#define STM32_ICU_USE_TIM4 TRUE #define STM32_ICU_USE_TIM4 FALSE
#define STM32_ICU_USE_TIM8 TRUE #define STM32_ICU_USE_TIM8 TRUE
#define STM32_ICU_TIM1_IRQ_PRIORITY 7 #define STM32_ICU_TIM1_IRQ_PRIORITY 7
#define STM32_ICU_TIM2_IRQ_PRIORITY 7 #define STM32_ICU_TIM2_IRQ_PRIORITY 7
@ -152,9 +152,9 @@
*/ */
#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_ADVANCED FALSE
#define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM1 FALSE
#define STM32_PWM_USE_TIM2 TRUE #define STM32_PWM_USE_TIM2 FALSE
#define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM3 FALSE
#define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM4 TRUE
#define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM8 FALSE
#define STM32_PWM_TIM1_IRQ_PRIORITY 7 #define STM32_PWM_TIM1_IRQ_PRIORITY 7
#define STM32_PWM_TIM2_IRQ_PRIORITY 7 #define STM32_PWM_TIM2_IRQ_PRIORITY 7

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@ -12,7 +12,7 @@ The application demonstrates the use of the STM32F30x PWM-ICU drivers.
** Board Setup ** ** Board Setup **
- Connect PA15 and PC6 together. - Connect PD12 (PWM output) and PC6 (ICU input) together.
** Build Procedure ** ** Build Procedure **

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@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

View File

@ -79,7 +79,7 @@
<link> <link>
<name>board</name> <name>board</name>
<type>2</type> <type>2</type>
<locationURI>CHIBIOS/boards/ST_STM32F3_DISCOVERY</locationURI> <locationURI>CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY</locationURI>
</link> </link>
<link> <link>
<name>os</name> <name>os</name>

View File

@ -17,15 +17,15 @@
#include "ch.h" #include "ch.h"
#include "hal.h" #include "hal.h"
static VirtualTimer vt1, vt2; static virtual_timer_t vt1, vt2;
static void restart(void *p) { static void restart(void *p) {
(void)p; (void)p;
chSysLockFromIsr(); chSysLockFromISR();
uartStartSendI(&UARTD1, 14, "Hello World!\r\n"); uartStartSendI(&UARTD1, 14, "Hello World!\r\n");
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
static void ledoff(void *p) { static void ledoff(void *p) {
@ -51,11 +51,10 @@ static void txend2(UARTDriver *uartp) {
(void)uartp; (void)uartp;
palClearPad(GPIOE, GPIOE_LED3_RED); palClearPad(GPIOE, GPIOE_LED3_RED);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt1)) chVTResetI(&vt1);
chVTResetI(&vt1);
chVTSetI(&vt1, MS2ST(5000), restart, NULL); chVTSetI(&vt1, MS2ST(5000), restart, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*
@ -78,11 +77,10 @@ static void rxchar(UARTDriver *uartp, uint16_t c) {
(void)c; (void)c;
/* Flashing the LED each time a character is received.*/ /* Flashing the LED each time a character is received.*/
palSetPad(GPIOE, GPIOE_LED3_RED); palSetPad(GPIOE, GPIOE_LED3_RED);
chSysLockFromIsr(); chSysLockFromISR();
if (chVTIsArmedI(&vt2)) chVTResetI(&vt2);
chVTResetI(&vt2);
chVTSetI(&vt2, MS2ST(200), ledoff, NULL); chVTSetI(&vt2, MS2ST(200), ledoff, NULL);
chSysUnlockFromIsr(); chSysUnlockFromISR();
} }
/* /*