ARMv7-M compact kernel mode working.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2968 35acf78f-673a-0410-8e92-d51de3d6d3f4

demos/ARMCM3-STM32F103/chconf.h

@@ -520,6 +520,8 @@
 /* Port-specific settings (override port settings defaulted in chcore.h).    */
 /*===========================================================================*/
 
+/*#define CORTEX_SIMPLIFIED_PRIORITY      TRUE*/
+
 #endif  /* _CHCONF_H_ */
 
 /** @} */

docs/reports/STM32F103-72-GCC.txt

@@ -9,7 +9,7 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 *** Compiler:     GCC 4.5.2
 *** Architecture: ARMv7-M
 *** Core Variant: Cortex-M3
-*** Port Info:    Advanced kernel mode
+*** Port Info:    Normal kernel mode
 *** Platform:     STM32 Performance Line Medium Density
 *** Test Board:   Olimex STM32-P103
 
@@ -99,51 +99,51 @@ Settings: SYSCLK=72, ACR=0x12 (2 wait states)
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.1 (Benchmark, messages #1)
---- Score : 248569 msgs/S, 497138 ctxswc/S
+--- Score : 258426 msgs/S, 516852 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.2 (Benchmark, messages #2)
---- Score : 198998 msgs/S, 397996 ctxswc/S
+--- Score : 204682 msgs/S, 409364 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.3 (Benchmark, messages #3)
---- Score : 198998 msgs/S, 397996 ctxswc/S
+--- Score : 204682 msgs/S, 409364 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.4 (Benchmark, context switch)
---- Score : 839008 ctxswc/S
+--- Score : 831792 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.5 (Benchmark, threads, full cycle)
---- Score : 156856 threads/S
+--- Score : 161453 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.6 (Benchmark, threads, create only)
---- Score : 235543 threads/S
+--- Score : 238693 threads/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
---- Score : 61138 reschedules/S, 366828 ctxswc/S
+--- Score : 62418 reschedules/S, 374508 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.8 (Benchmark, round robin context switching)
---- Score : 478124 ctxswc/S
+--- Score : 481380 ctxswc/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.9 (Benchmark, I/O Queues throughput)
---- Score : 479776 bytes/S
+--- Score : 476632 bytes/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.10 (Benchmark, virtual timers set/reset)
---- Score : 647262 timers/S
+--- Score : 641534 timers/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.11 (Benchmark, semaphores wait/signal)
---- Score : 787368 wait+signal/S
+--- Score : 842840 wait+signal/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.12 (Benchmark, mutexes lock/unlock)
---- Score : 586492 lock+unlock/S
+--- Score : 611492 lock+unlock/S
 --- Result: SUCCESS
 ----------------------------------------------------------------------------
 --- Test Case 11.13 (Benchmark, RAM footprint)

os/ports/GCC/ARMCMx/chcore_v7m.c

@@ -96,7 +96,7 @@ void SVCallVector(void) {
  * @brief   PendSV vector.
  * @details The PendSV vector is used for exception mode re-entering after a
  *          context switch.
- * @note    The PendSV vector is only used in normal kernel mode.
+ * @note    The PendSV vector is only used in compact kernel mode.
  */
 void PendSVVector(void) {
   register struct extctx *ctxp;

os/ports/GCC/ARMCMx/chcore_v7m.h

@@ -39,7 +39,7 @@
 
 /**
  * @brief   Simplified priority handling flag.
- * @details Activating this option will make the Kernel work in normal mode.
+ * @details Activating this option will make the Kernel work in compact mode.
  */
 #ifndef CORTEX_SIMPLIFIED_PRIORITY
 #define CORTEX_SIMPLIFIED_PRIORITY      FALSE
@@ -67,7 +67,7 @@
 
 /**
  * @brief   BASEPRI level within kernel lock.
- * @note    In normal kernel mode this constant value is enforced to zero.
+ * @note    In compact kernel mode this constant value is enforced to zero.
  */
 #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
 #define CORTEX_BASEPRI_KERNEL                                               \
@@ -113,7 +113,7 @@
 #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
 #define CH_PORT_INFO                    "Advanced kernel mode"
 #else
-#define CH_PORT_INFO                    "Normal kernel mode"
+#define CH_PORT_INFO                    "Compact kernel mode"
 #endif
 
 /*===========================================================================*/

os/ports/GCC/ARMCMx/port.dox

@@ -28,25 +28,25 @@
  *
  * @section ARMCMx_MODES Kernel Modes
  * The Cortex-Mx port supports two distinct kernel modes:
- * - <b>Normal Kernel</b> mode. In this mode the kernel handles IRQ priorities
- *   in a simplified way, all interrupt sources are disabled when the kernel
- *   enters into a critical zone and re-enabled on exit. This is simple and
- *   adequate for most applications, this mode results in a more compact and
- *   faster kernel.
  * - <b>Advanced Kernel</b> mode. In this mode the kernel only masks
  *   interrupt sources with priorities below or equal to the
  *   @p CORTEX_BASEPRI_KERNEL level. Higher priorities are not affected by
  *   the kernel critical sections and can be used for fast interrupts.
  *   This mode is not available in the ARMv6-M architecture which does not
  *   support priority masking.
+ * - <b>Compact Kernel</b> mode. In this mode the kernel handles IRQ priorities
+ *   in a simplified way, all interrupt sources are disabled when the kernel
+ *   enters into a critical zone and re-enabled on exit. This is simple and
+ *   adequate for most applications, this mode results in a more compact and
+ *   faster kernel.
  * .
  * The selection of the mode is performed using the port configuration option
  * @p CORTEX_SIMPLIFIED_PRIORITY. Apart from the different handling of
  * interrupts there are no other differences between the two modes. The
  * kernel API is exactly the same.
  *
- * @section ARMCMx_STATES_A System logical states in Normal Kernel mode
- * The ChibiOS/RT logical @ref system_states are mapped as follow in Normal
+ * @section ARMCMx_STATES_A System logical states in Compact Kernel mode
+ * The ChibiOS/RT logical @ref system_states are mapped as follow in Compact
  * Kernel mode:
  * - <b>Init</b>. This state is represented by the startup code and the
  *   initialization code before @p chSysInit() is executed. It has not a

readme.txt

@@ -75,6 +75,10 @@
   (backported to 2.2.4).
 - NEW: Reorganization of the Cortex-Mx ports in order to reduced code and
   comments duplication in the various headers.
+- NEW: Improved the ARMv7-M port now there are two modes: Compact and Advanced.
+  The advanced mode is equivalent to the previous versions, the compact mode
+  is new and makes the kernel *much* smaller and faster but does not support
+  fast interrupts, see reports.
 - CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK
   to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency.
 - CHANGE: Removed the "old" Cortex-M3 port from the code, the current port