git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2821 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -324,7 +324,6 @@
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#if STM32_ACTIVATE_PLL2 && \
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(STM32_PREDIV1SRC != STM32_PREDIV1SRC_PLL2) && \
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(STM32_MCO != STM32_MCO_PLL2)
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#error "PLL2 activated but not used"
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#endif
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@ -442,10 +441,15 @@
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#endif
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#endif /* STM32_ACTIVATE_PLL3 */
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/* The following values are only used if PLL1 is activated */
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#if STM32_ACTIVATE_PLL1
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/**
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* @brief PREDIV1 input frequency.
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*/
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#if (STM32_PREDIV1SRC == STM32_PREDIV1SRC_PLL2) || defined(__DOXYGEN__)
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#if !STM32_ACTIVATE_PLL2
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#error "PLL2 selected as clock source for STM32_PREDIV1SRC but not activated"
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#endif
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#define STM32_PREDIV1CLK STM32_PLL2CLKOUT
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#elif STM32_PREDIV1SRC == STM32_PREDIV1SRC_HSE
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#define STM32_PREDIV1CLK STM32_HSECLK
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@ -483,11 +487,15 @@
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#if (STM32_PLLVCO < 36000000) || (STM32_PLLVCO > 144000000)
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#error "STM32_PLLVCO outside acceptable range (36...144MHz)"
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#endif
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#endif /* STM32_ACTIVATE_PLL1 */
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/**
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* @brief System clock source.
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*/
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#if (STM32_SW == STM32_SW_PLL) || defined(__DOXYGEN__)
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#if !STM32_ACTIVATE_PLL1
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#error "PLL1 selected as clock source for STM32_SYSCLK but not activated"
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#endif
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#define STM32_SYSCLK STM32_PLLCLKOUT
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#elif (STM32_SW == STM32_SW_HSI)
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#define STM32_SYSCLK STM32_HSICLK
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