Fixed bug 3016619 and final AVR report.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_2.0.x@2022 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2010-06-15 17:36:35 +00:00
parent ae9220b029
commit a1614fbc07
7 changed files with 29 additions and 32 deletions

View File

@ -353,7 +353,7 @@
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#define CH_USE_DYNAMIC FALSE
#endif
/*===========================================================================*/

View File

@ -117,7 +117,7 @@
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
#define SERIAL_BUFFERS_SIZE 16
/*===========================================================================*/
/* SPI driver related settings. */

View File

@ -353,7 +353,7 @@
* @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
*/
#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
#define CH_USE_DYNAMIC TRUE
#define CH_USE_DYNAMIC FALSE
#endif
/*===========================================================================*/

View File

@ -117,7 +117,7 @@
* Default SERIAL settings overrides (uncomment to override).
*/
/*#define SERIAL_DEFAULT_BITRATE 38400*/
/*#define SERIAL_BUFFERS_SIZE 64*/
#define SERIAL_BUFFERS_SIZE 16
/*===========================================================================*/
/* SPI driver related settings. */

View File

@ -5,9 +5,12 @@ Settings: F_CPU=16000000
*** ChibiOS/RT test suite
***
*** Kernel: 1.3.5unstable
*** Architecture: AVR
*** Kernel: 2.0.0
*** GCC Version: 4.3.0
*** Architecture: AVR
*** Core Variant: MegaAVR
*** Platform: ATmega128
*** Test Board: Olimex AVR-MT-128
----------------------------------------------------------------------------
--- Test Case 1.1 (Threads, enqueuing test #1)
@ -76,12 +79,6 @@ Settings: F_CPU=16000000
--- Test Case 8.1 (Memory Pools, queue/dequeue)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.1 (Dynamic APIs, threads creation from heap)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 9.2 (Dynamic APIs, threads creation from memory pool)
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 10.1 (Queues, input queues)
--- Result: SUCCESS
----------------------------------------------------------------------------
@ -89,56 +86,56 @@ Settings: F_CPU=16000000
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.1 (Benchmark, messages #1)
--- Score : 30808 msgs/S, 61616 ctxswc/S
--- Score : 31248 msgs/S, 62496 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.2 (Benchmark, messages #2)
--- Score : 24579 msgs/S, 49158 ctxswc/S
--- Score : 25058 msgs/S, 50116 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.3 (Benchmark, messages #3)
--- Score : 24579 msgs/S, 49158 ctxswc/S
--- Score : 25058 msgs/S, 50116 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.4 (Benchmark, context switch)
--- Score : 88608 ctxswc/S
--- Score : 89904 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.5 (Benchmark, threads, full cycle)
--- Score : 20741 threads/S
--- Score : 20805 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.6 (Benchmark, threads, create only)
--- Score : 26561 threads/S
--- Score : 26709 threads/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.7 (Benchmark, mass reschedulation, 5 threads)
--- Score : 7786 reschedulations/S, 46716 ctxswc/S
--- Test Case 11.7 (Benchmark, mass reschedule, 5 threads)
--- Score : 7970 reschedules/S, 47820 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.8 (Benchmark, round robin context switching)
--- Score : 67756 reschedulations/S, 67756 ctxswc/S
--- Score : 60760 ctxswc/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.9 (Benchmark, I/O Queues throughput)
--- Score : 82224 bytes/S
--- Score : 82696 bytes/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.10 (Benchmark, virtual timers set/reset)
--- Score : 81482 timers/S
--- Score : 81522 timers/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.11 (Benchmark, semaphores wait/signal)
--- Score : 224224 wait+signal/S
--- Score : 227560 wait+signal/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.12 (Benchmark, mutexes lock/unlock)
--- Score : 119304 lock+unlock/S
--- Score : 117588 lock+unlock/S
--- Result: SUCCESS
----------------------------------------------------------------------------
--- Test Case 11.13 (Benchmark, RAM footprint)
--- System: 220 bytes
--- Thread: 27 bytes
--- System: 230 bytes
--- Thread: 29 bytes
--- Timer : 10 bytes
--- Semaph: 5 bytes
--- EventS: 2 bytes

View File

@ -5,7 +5,7 @@ Settings: SYSCLK=80, optimal wait states, prefetching enabled
*** ChibiOS/RT test suite
***
*** Kernel: 2.0.0unstable
*** Kernel: 2.0.0
*** GCC Version: 4.4.1
*** Architecture: PowerPC
*** Core Variant: e200z3

View File

@ -74,14 +74,14 @@ void port_switch(Thread *ntp, Thread *otp) {
asm volatile ("movw r30, r22");
asm volatile ("in r0, 0x3d");
asm volatile ("std Z+6, r0");
asm volatile ("std Z+5, r0");
asm volatile ("in r0, 0x3e");
asm volatile ("std Z+7, r0");
asm volatile ("std Z+6, r0");
asm volatile ("movw r30, r24");
asm volatile ("ldd r0, Z+6");
asm volatile ("ldd r0, Z+5");
asm volatile ("out 0x3d, r0");
asm volatile ("ldd r0, Z+7");
asm volatile ("ldd r0, Z+6");
asm volatile ("out 0x3e, r0");
asm volatile ("pop r29");