From a22f68d2e621a7d7cf354357fdde980cc1e690f5 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 28 Apr 2020 09:34:42 +0000 Subject: [PATCH] Fixed bug #1089. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13600 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c | 18 +++++++++--------- os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h | 6 ------ readme.txt | 2 ++ 3 files changed, 11 insertions(+), 15 deletions(-) diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c index cc4e5eec7..9078ba95d 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c @@ -514,7 +514,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) { uint32_t dmamode, cfgr; const ADCConversionGroup *grpp = adcp->grpp; #if STM32_ADC_DUAL_MODE - uint32_t ccr = grpp->ccr & ~(ADC_CCR_CKMODE_MASK | ADC_CCR_MDMA_MASK); + uint32_t ccr = grpp->ccr & ~(ADC_CCR_CKMODE_MASK | ADC_CCR_DUAL_MASK); #endif osalDbgAssert(!STM32_ADC_DUAL_MODE || ((grpp->num_channels & 1) == 0), @@ -557,7 +557,7 @@ void adc_lld_start_conversion(ADCDriver *adcp) { in the conversion group configuration structure, static settings are preserved.*/ adcp->adcc->CCR = (adcp->adcc->CCR & - (ADC_CCR_CKMODE_MASK | ADC_CCR_MDMA_MASK)) | ccr; + (ADC_CCR_CKMODE_MASK | ADC_CCR_DUAL_MASK)) | ccr; adcp->adcm->CFGR2 = grpp->cfgr2; adcp->adcm->PCSEL = grpp->pcsel; @@ -574,13 +574,13 @@ void adc_lld_start_conversion(ADCDriver *adcp) { adcp->adcm->SQR3 = grpp->sqr[2]; adcp->adcm->SQR4 = grpp->sqr[3]; adcp->adcs->CFGR2 = grpp->cfgr2; - adcp->adcs->PCSEL = grpp->spcsel; - adcp->adcs->LTR1 = grpp->sltr1; - adcp->adcs->HTR1 = grpp->shtr1; - adcp->adcs->LTR1 = grpp->sltr2; - adcp->adcs->HTR1 = grpp->shtr2; - adcp->adcs->LTR1 = grpp->sltr3; - adcp->adcs->HTR1 = grpp->shtr3; + adcp->adcs->PCSEL = grpp->pcsel; + adcp->adcs->LTR1 = grpp->ltr1; + adcp->adcs->HTR1 = grpp->htr1; + adcp->adcs->LTR1 = grpp->ltr2; + adcp->adcs->HTR1 = grpp->htr2; + adcp->adcs->LTR1 = grpp->ltr3; + adcp->adcs->HTR1 = grpp->htr3; adcp->adcs->SMPR1 = grpp->ssmpr[0]; adcp->adcs->SMPR2 = grpp->ssmpr[1]; adcp->adcs->SQR1 = grpp->ssqr[0] | ADC_SQR1_NUM_CH(grpp->num_channels / 2); diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h index 7812cfad9..0e22517ba 100644 --- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h +++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.h @@ -289,11 +289,6 @@ #error "STM32_ADC3_NUMBER not defined in registry" #endif -/* Units checks related to dual mode.*/ -#if STM32_ADC_DUAL_MODE && STM32_ADC_USE_ADC1 && !STM32_HAS_ADC2 -#error "ADC2 not present in the selected device, required for dual mode" -#endif - /* At least one ADC must be assigned.*/ #if !STM32_ADC_USE_ADC12 && !STM32_ADC_USE_ADC3 #error "ADC driver activated but no ADC peripheral assigned" @@ -525,7 +520,6 @@ typedef union { uint32_t cfgr2; \ uint32_t ccr; \ uint32_t pcsel; \ - uint32_t difsel; \ uint32_t ltr1; \ uint32_t htr1; \ uint32_t ltr2; \ diff --git a/readme.txt b/readme.txt index 1eebbc515..defd4157d 100644 --- a/readme.txt +++ b/readme.txt @@ -86,6 +86,8 @@ MEMS Accelerometers. - NEW: Safer messages mechanism for sandboxes (to be backported to 20.3.1). - NEW: Added latency measurement test application. +- FIX: Fixed STM32H7xx ADC problem in dual mode (bug #1089) + (backported to 20.3.1)(backported to 19.1.4). - FIX: Fixed invalid CHSEL DMA setting in STM32 UART drivers (bug #1088) (backported to 20.3.1)(backported to 19.1.4). - FIX: Fixed wrong arguments for the cacheBufferInvalidate in the STM32 SPI