diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.cproject b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.cproject
deleted file mode 100644
index 644f14e3e..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.cproject
+++ /dev/null
@@ -1,55 +0,0 @@
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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-
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.project b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.project
deleted file mode 100644
index ad9b8488d..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/.project
+++ /dev/null
@@ -1,43 +0,0 @@
-
-
- RT-STM32F303-DISCOVERY-REVC
-
-
-
-
-
- org.eclipse.cdt.managedbuilder.core.genmakebuilder
- clean,full,incremental,
-
-
-
-
- org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder
- full,incremental,
-
-
-
-
-
- org.eclipse.cdt.core.cnature
- org.eclipse.cdt.managedbuilder.core.managedBuildNature
- org.eclipse.cdt.managedbuilder.core.ScannerConfigNature
-
-
-
- board
- 2
- CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY_REVC
-
-
- os
- 2
- CHIBIOS/os
-
-
- test
- 2
- CHIBIOS/test
-
-
-
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/Makefile b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/Makefile
deleted file mode 100644
index 31810aa4c..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/Makefile
+++ /dev/null
@@ -1,220 +0,0 @@
-##############################################################################
-# Build global options
-# NOTE: Can be overridden externally.
-#
-
-# Compiler options here.
-ifeq ($(USE_OPT),)
- USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16
-endif
-
-# C specific options here (added to USE_OPT).
-ifeq ($(USE_COPT),)
- USE_COPT =
-endif
-
-# C++ specific options here (added to USE_OPT).
-ifeq ($(USE_CPPOPT),)
- USE_CPPOPT = -fno-rtti
-endif
-
-# Enable this if you want the linker to remove unused code and data
-ifeq ($(USE_LINK_GC),)
- USE_LINK_GC = yes
-endif
-
-# Linker extra options here.
-ifeq ($(USE_LDOPT),)
- USE_LDOPT =
-endif
-
-# Enable this if you want link time optimizations (LTO)
-ifeq ($(USE_LTO),)
- USE_LTO = yes
-endif
-
-# If enabled, this option allows to compile the application in THUMB mode.
-ifeq ($(USE_THUMB),)
- USE_THUMB = yes
-endif
-
-# Enable this if you want to see the full log while compiling.
-ifeq ($(USE_VERBOSE_COMPILE),)
- USE_VERBOSE_COMPILE = no
-endif
-
-# If enabled, this option makes the build process faster by not compiling
-# modules not used in the current configuration.
-ifeq ($(USE_SMART_BUILD),)
- USE_SMART_BUILD = yes
-endif
-
-#
-# Build global options
-##############################################################################
-
-##############################################################################
-# Architecture or project specific options
-#
-
-# Stack size to be allocated to the Cortex-M process stack. This stack is
-# the stack used by the main() thread.
-ifeq ($(USE_PROCESS_STACKSIZE),)
- USE_PROCESS_STACKSIZE = 0x400
-endif
-
-# Stack size to the allocated to the Cortex-M main/exceptions stack. This
-# stack is used for processing interrupts and exceptions.
-ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
- USE_EXCEPTIONS_STACKSIZE = 0x400
-endif
-
-# Enables the use of FPU (no, softfp, hard).
-ifeq ($(USE_FPU),)
- USE_FPU = no
-endif
-
-#
-# Architecture or project specific options
-##############################################################################
-
-##############################################################################
-# Project, sources and paths
-#
-
-# Define project name here
-PROJECT = ch
-
-# Imported source files and paths
-CHIBIOS = ../../..
-# Startup files.
-include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32f3xx.mk
-# HAL-OSAL files (optional).
-include $(CHIBIOS)/os/hal/hal.mk
-include $(CHIBIOS)/os/hal/ports/STM32/STM32F3xx/platform.mk
-include $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk
-include $(CHIBIOS)/os/hal/osal/rt/osal.mk
-# RTOS files (optional).
-include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
-# Other files (optional).
-include $(CHIBIOS)/test/lib/test.mk
-include $(CHIBIOS)/test/rt/rt_test.mk
-include $(CHIBIOS)/test/oslib/oslib_test.mk
-
-# Define linker script file here
-LDSCRIPT= $(STARTUPLD)/STM32F303xC.ld
-
-# C sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CSRC = $(STARTUPSRC) \
- $(KERNSRC) \
- $(PORTSRC) \
- $(OSALSRC) \
- $(HALSRC) \
- $(PLATFORMSRC) \
- $(BOARDSRC) \
- $(TESTSRC) \
- main.c
-
-# C++ sources that can be compiled in ARM or THUMB mode depending on the global
-# setting.
-CPPSRC =
-
-# C sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACSRC =
-
-# C++ sources to be compiled in ARM mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-ACPPSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCSRC =
-
-# C sources to be compiled in THUMB mode regardless of the global setting.
-# NOTE: Mixing ARM and THUMB mode enables the -mthumb-interwork compiler
-# option that results in lower performance and larger code size.
-TCPPSRC =
-
-# List ASM source files here
-ASMSRC =
-ASMXSRC = $(STARTUPASM) $(PORTASM) $(OSALASM)
-
-INCDIR = $(CHIBIOS)/os/license \
- $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \
- $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \
- $(CHIBIOS)/os/various
-
-#
-# Project, sources and paths
-##############################################################################
-
-##############################################################################
-# Compiler settings
-#
-
-MCU = cortex-m4
-
-#TRGT = arm-elf-
-TRGT = arm-none-eabi-
-CC = $(TRGT)gcc
-CPPC = $(TRGT)g++
-# Enable loading with g++ only if you need C++ runtime support.
-# NOTE: You can use C++ even without C++ support if you are careful. C++
-# runtime support makes code size explode.
-LD = $(TRGT)gcc
-#LD = $(TRGT)g++
-CP = $(TRGT)objcopy
-AS = $(TRGT)gcc -x assembler-with-cpp
-AR = $(TRGT)ar
-OD = $(TRGT)objdump
-SZ = $(TRGT)size
-HEX = $(CP) -O ihex
-BIN = $(CP) -O binary
-
-# ARM-specific options here
-AOPT =
-
-# THUMB-specific options here
-TOPT = -mthumb -DTHUMB
-
-# Define C warning options here
-CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
-
-# Define C++ warning options here
-CPPWARN = -Wall -Wextra -Wundef
-
-#
-# Compiler settings
-##############################################################################
-
-##############################################################################
-# Start of user section
-#
-
-# List all user C define here, like -D_DEBUG=1
-UDEFS =
-
-# Define ASM defines here
-UADEFS =
-
-# List all user directories here
-UINCDIR =
-
-# List the user directory to look for the libraries here
-ULIBDIR =
-
-# List all user libraries here
-ULIBS =
-
-#
-# End of user defines
-##############################################################################
-
-RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC
-include $(RULESPATH)/rules.mk
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/chconf.h b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/chconf.h
deleted file mode 100644
index 899a292ef..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/chconf.h
+++ /dev/null
@@ -1,608 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file templates/chconf.h
- * @brief Configuration file template.
- * @details A copy of this file must be placed in each project directory, it
- * contains the application specific kernel settings.
- *
- * @addtogroup config
- * @details Kernel related settings and hooks.
- * @{
- */
-
-#ifndef CHCONF_H
-#define CHCONF_H
-
-#define _CHIBIOS_RT_CONF_
-#define _CHIBIOS_RT_CONF_VER_5_0_
-
-/*===========================================================================*/
-/**
- * @name System timers settings
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief System time counter resolution.
- * @note Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_ST_RESOLUTION 32
-
-/**
- * @brief System tick frequency.
- * @details Frequency of the system timer that drives the system ticks. This
- * setting also defines the system tick time unit.
- */
-#define CH_CFG_ST_FREQUENCY 10000
-
-/**
- * @brief Time intervals data size.
- * @note Allowed values are 16, 32 or 64 bits.
- */
-#define CH_CFG_INTERVALS_SIZE 32
-
-/**
- * @brief Time types data size.
- * @note Allowed values are 16 or 32 bits.
- */
-#define CH_CFG_TIME_TYPES_SIZE 32
-
-/**
- * @brief Time delta constant for the tick-less mode.
- * @note If this value is zero then the system uses the classic
- * periodic tick. This value represents the minimum number
- * of ticks that is safe to specify in a timeout directive.
- * The value one is not valid, timeouts are rounded up to
- * this value.
- */
-#define CH_CFG_ST_TIMEDELTA 2
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel parameters and options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief Round robin interval.
- * @details This constant is the number of system ticks allowed for the
- * threads before preemption occurs. Setting this value to zero
- * disables the preemption for threads with equal priority and the
- * round robin becomes cooperative. Note that higher priority
- * threads can still preempt, the kernel is always preemptive.
- * @note Disabling the round robin preemption makes the kernel more compact
- * and generally faster.
- * @note The round robin preemption is not supported in tickless mode and
- * must be set to zero in that case.
- */
-#define CH_CFG_TIME_QUANTUM 0
-
-/**
- * @brief Managed RAM size.
- * @details Size of the RAM area to be managed by the OS. If set to zero
- * then the whole available RAM is used. The core memory is made
- * available to the heap allocator and/or can be used directly through
- * the simplified core memory allocator.
- *
- * @note In order to let the OS manage the whole RAM the linker script must
- * provide the @p __heap_base__ and @p __heap_end__ symbols.
- * @note Requires @p CH_CFG_USE_MEMCORE.
- */
-#define CH_CFG_MEMCORE_SIZE 0
-
-/**
- * @brief Idle thread automatic spawn suppression.
- * @details When this option is activated the function @p chSysInit()
- * does not spawn the idle thread. The application @p main()
- * function becomes the idle thread and must implement an
- * infinite loop.
- */
-#define CH_CFG_NO_IDLE_THREAD FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Performance options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief OS optimization.
- * @details If enabled then time efficient rather than space efficient code
- * is used when two possible implementations exist.
- *
- * @note This is not related to the compiler optimization options.
- * @note The default is @p TRUE.
- */
-#define CH_CFG_OPTIMIZE_SPEED TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Subsystem options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief Time Measurement APIs.
- * @details If enabled then the time measurement APIs are included in
- * the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_TM TRUE
-
-/**
- * @brief Threads registry APIs.
- * @details If enabled then the registry APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_REGISTRY TRUE
-
-/**
- * @brief Threads synchronization APIs.
- * @details If enabled then the @p chThdWait() function is included in
- * the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_WAITEXIT TRUE
-
-/**
- * @brief Semaphores APIs.
- * @details If enabled then the Semaphores APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_SEMAPHORES TRUE
-
-/**
- * @brief Semaphores queuing mode.
- * @details If enabled then the threads are enqueued on semaphores by
- * priority rather than in FIFO order.
- *
- * @note The default is @p FALSE. Enable this if you have special
- * requirements.
- * @note Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
-
-/**
- * @brief Mutexes APIs.
- * @details If enabled then the mutexes APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_MUTEXES TRUE
-
-/**
- * @brief Enables recursive behavior on mutexes.
- * @note Recursive mutexes are heavier and have an increased
- * memory footprint.
- *
- * @note The default is @p FALSE.
- * @note Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
-
-/**
- * @brief Conditional Variables APIs.
- * @details If enabled then the conditional variables APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_MUTEXES.
- */
-#define CH_CFG_USE_CONDVARS TRUE
-
-/**
- * @brief Conditional Variables APIs with timeout.
- * @details If enabled then the conditional variables APIs with timeout
- * specification are included in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_CONDVARS.
- */
-#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
-
-/**
- * @brief Events Flags APIs.
- * @details If enabled then the event flags APIs are included in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_EVENTS TRUE
-
-/**
- * @brief Events Flags APIs with timeout.
- * @details If enabled then the events APIs with timeout specification
- * are included in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_EVENTS.
- */
-#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
-
-/**
- * @brief Synchronous Messages APIs.
- * @details If enabled then the synchronous messages APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_MESSAGES TRUE
-
-/**
- * @brief Synchronous Messages queuing mode.
- * @details If enabled then messages are served by priority rather than in
- * FIFO order.
- *
- * @note The default is @p FALSE. Enable this if you have special
- * requirements.
- * @note Requires @p CH_CFG_USE_MESSAGES.
- */
-#define CH_CFG_USE_MESSAGES_PRIORITY FALSE
-
-/**
- * @brief Mailboxes APIs.
- * @details If enabled then the asynchronous messages (mailboxes) APIs are
- * included in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_SEMAPHORES.
- */
-#define CH_CFG_USE_MAILBOXES TRUE
-
-/**
- * @brief Core Memory Manager APIs.
- * @details If enabled then the core memory manager APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMCORE TRUE
-
-/**
- * @brief Heap Allocator APIs.
- * @details If enabled then the memory heap allocator APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
- * @p CH_CFG_USE_SEMAPHORES.
- * @note Mutexes are recommended.
- */
-#define CH_CFG_USE_HEAP TRUE
-
-/**
- * @brief Memory Pools Allocator APIs.
- * @details If enabled then the memory pools allocator APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_MEMPOOLS TRUE
-
-/**
- * @brief Objects FIFOs APIs.
- * @details If enabled then the objects FIFOs APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- */
-#define CH_CFG_USE_OBJ_FIFOS TRUE
-
-/**
- * @brief Dynamic Threads APIs.
- * @details If enabled then the dynamic threads creation APIs are included
- * in the kernel.
- *
- * @note The default is @p TRUE.
- * @note Requires @p CH_CFG_USE_WAITEXIT.
- * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
- */
-#define CH_CFG_USE_DYNAMIC TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Objects factory options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief Objects Factory APIs.
- * @details If enabled then the objects factory APIs are included in the
- * kernel.
- *
- * @note The default is @p FALSE.
- */
-#define CH_CFG_USE_FACTORY TRUE
-
-/**
- * @brief Maximum length for object names.
- * @details If the specified length is zero then the name is stored by
- * pointer but this could have unintended side effects.
- */
-#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8
-
-/**
- * @brief Enables the registry of generic objects.
- */
-#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE
-
-/**
- * @brief Enables factory for generic buffers.
- */
-#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE
-
-/**
- * @brief Enables factory for semaphores.
- */
-#define CH_CFG_FACTORY_SEMAPHORES TRUE
-
-/**
- * @brief Enables factory for mailboxes.
- */
-#define CH_CFG_FACTORY_MAILBOXES TRUE
-
-/**
- * @brief Enables factory for objects FIFOs.
- */
-#define CH_CFG_FACTORY_OBJ_FIFOS TRUE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Debug options
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief Debug option, kernel statistics.
- *
- * @note The default is @p FALSE.
- */
-#define CH_DBG_STATISTICS FALSE
-
-/**
- * @brief Debug option, system state check.
- * @details If enabled the correct call protocol for system APIs is checked
- * at runtime.
- *
- * @note The default is @p FALSE.
- */
-#define CH_DBG_SYSTEM_STATE_CHECK FALSE
-
-/**
- * @brief Debug option, parameters checks.
- * @details If enabled then the checks on the API functions input
- * parameters are activated.
- *
- * @note The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_CHECKS FALSE
-
-/**
- * @brief Debug option, consistency checks.
- * @details If enabled then all the assertions in the kernel code are
- * activated. This includes consistency checks inside the kernel,
- * runtime anomalies and port-defined checks.
- *
- * @note The default is @p FALSE.
- */
-#define CH_DBG_ENABLE_ASSERTS FALSE
-
-/**
- * @brief Debug option, trace buffer.
- * @details If enabled then the trace buffer is activated.
- *
- * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
-
-/**
- * @brief Trace buffer entries.
- * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
- * different from @p CH_DBG_TRACE_MASK_DISABLED.
- */
-#define CH_DBG_TRACE_BUFFER_SIZE 128
-
-/**
- * @brief Debug option, stack checks.
- * @details If enabled then a runtime stack check is performed.
- *
- * @note The default is @p FALSE.
- * @note The stack check is performed in a architecture/port dependent way.
- * It may not be implemented or some ports.
- * @note The default failure mode is to halt the system with the global
- * @p panic_msg variable set to @p NULL.
- */
-#define CH_DBG_ENABLE_STACK_CHECK FALSE
-
-/**
- * @brief Debug option, stacks initialization.
- * @details If enabled then the threads working area is filled with a byte
- * value when a thread is created. This can be useful for the
- * runtime measurement of the used stack.
- *
- * @note The default is @p FALSE.
- */
-#define CH_DBG_FILL_THREADS FALSE
-
-/**
- * @brief Debug option, threads profiling.
- * @details If enabled then a field is added to the @p thread_t structure that
- * counts the system ticks occurred while executing the thread.
- *
- * @note The default is @p FALSE.
- * @note This debug option is not currently compatible with the
- * tickless mode.
- */
-#define CH_DBG_THREADS_PROFILING FALSE
-
-/** @} */
-
-/*===========================================================================*/
-/**
- * @name Kernel hooks
- * @{
- */
-/*===========================================================================*/
-
-/**
- * @brief System structure extension.
- * @details User fields added to the end of the @p ch_system_t structure.
- */
-#define CH_CFG_SYSTEM_EXTRA_FIELDS \
- /* Add threads custom fields here.*/
-
-/**
- * @brief System initialization hook.
- * @details User initialization code added to the @p chSysInit() function
- * just before interrupts are enabled globally.
- */
-#define CH_CFG_SYSTEM_INIT_HOOK(tp) { \
- /* Add threads initialization code here.*/ \
-}
-
-/**
- * @brief Threads descriptor structure extension.
- * @details User fields added to the end of the @p thread_t structure.
- */
-#define CH_CFG_THREAD_EXTRA_FIELDS \
- /* Add threads custom fields here.*/
-
-/**
- * @brief Threads initialization hook.
- * @details User initialization code added to the @p _thread_init() function.
- *
- * @note It is invoked from within @p _thread_init() and implicitly from all
- * the threads creation APIs.
- */
-#define CH_CFG_THREAD_INIT_HOOK(tp) { \
- /* Add threads initialization code here.*/ \
-}
-
-/**
- * @brief Threads finalization hook.
- * @details User finalization code added to the @p chThdExit() API.
- */
-#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
- /* Add threads finalization code here.*/ \
-}
-
-/**
- * @brief Context switch hook.
- * @details This hook is invoked just before switching between threads.
- */
-#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
- /* Context switch code here.*/ \
-}
-
-/**
- * @brief ISR enter hook.
- */
-#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
- /* IRQ prologue code here.*/ \
-}
-
-/**
- * @brief ISR exit hook.
- */
-#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
- /* IRQ epilogue code here.*/ \
-}
-
-/**
- * @brief Idle thread enter hook.
- * @note This hook is invoked within a critical zone, no OS functions
- * should be invoked from here.
- * @note This macro can be used to activate a power saving mode.
- */
-#define CH_CFG_IDLE_ENTER_HOOK() { \
- /* Idle-enter code here.*/ \
-}
-
-/**
- * @brief Idle thread leave hook.
- * @note This hook is invoked within a critical zone, no OS functions
- * should be invoked from here.
- * @note This macro can be used to deactivate a power saving mode.
- */
-#define CH_CFG_IDLE_LEAVE_HOOK() { \
- /* Idle-leave code here.*/ \
-}
-
-/**
- * @brief Idle Loop hook.
- * @details This hook is continuously invoked by the idle thread loop.
- */
-#define CH_CFG_IDLE_LOOP_HOOK() { \
- /* Idle loop code here.*/ \
-}
-
-/**
- * @brief System tick event hook.
- * @details This hook is invoked in the system tick handler immediately
- * after processing the virtual timers queue.
- */
-#define CH_CFG_SYSTEM_TICK_HOOK() { \
- /* System tick event code here.*/ \
-}
-
-/**
- * @brief System halt hook.
- * @details This hook is invoked in case to a system halting error before
- * the system is halted.
- */
-#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
- /* System halt code here.*/ \
-}
-
-/**
- * @brief Trace hook.
- * @details This hook is invoked each time a new record is written in the
- * trace buffer.
- */
-#define CH_CFG_TRACE_HOOK(tep) { \
- /* Trace code here.*/ \
-}
-
-/** @} */
-
-/*===========================================================================*/
-/* Port-specific settings (override port settings defaulted in chcore.h). */
-/*===========================================================================*/
-
-#endif /* CHCONF_H */
-
-/** @} */
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/debug/RT-STM32F303-DISCOVERY-REVC (OpenOCD, Flash and Run).launch b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/debug/RT-STM32F303-DISCOVERY-REVC (OpenOCD, Flash and Run).launch
deleted file mode 100644
index 32878baf8..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/debug/RT-STM32F303-DISCOVERY-REVC (OpenOCD, Flash and Run).launch
+++ /dev/null
@@ -1,52 +0,0 @@
-
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diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/halconf.h b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/halconf.h
deleted file mode 100644
index 3bbdf547f..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/halconf.h
+++ /dev/null
@@ -1,417 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/**
- * @file templates/halconf.h
- * @brief HAL configuration header.
- * @details HAL configuration file, this file allows to enable or disable the
- * various device drivers from your application. You may also use
- * this file in order to override the device drivers default settings.
- *
- * @addtogroup HAL_CONF
- * @{
- */
-
-#ifndef HALCONF_H
-#define HALCONF_H
-
-#include "mcuconf.h"
-
-/**
- * @brief Enables the PAL subsystem.
- */
-#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
-#define HAL_USE_PAL TRUE
-#endif
-
-/**
- * @brief Enables the ADC subsystem.
- */
-#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
-#define HAL_USE_ADC FALSE
-#endif
-
-/**
- * @brief Enables the CAN subsystem.
- */
-#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
-#define HAL_USE_CAN FALSE
-#endif
-
-/**
- * @brief Enables the cryptographic subsystem.
- */
-#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__)
-#define HAL_USE_CRY FALSE
-#endif
-
-/**
- * @brief Enables the DAC subsystem.
- */
-#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
-#define HAL_USE_DAC FALSE
-#endif
-
-/**
- * @brief Enables the EXT subsystem.
- */
-#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
-#define HAL_USE_EXT FALSE
-#endif
-
-/**
- * @brief Enables the GPT subsystem.
- */
-#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
-#define HAL_USE_GPT FALSE
-#endif
-
-/**
- * @brief Enables the I2C subsystem.
- */
-#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
-#define HAL_USE_I2C FALSE
-#endif
-
-/**
- * @brief Enables the I2S subsystem.
- */
-#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
-#define HAL_USE_I2S FALSE
-#endif
-
-/**
- * @brief Enables the ICU subsystem.
- */
-#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
-#define HAL_USE_ICU FALSE
-#endif
-
-/**
- * @brief Enables the MAC subsystem.
- */
-#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
-#define HAL_USE_MAC FALSE
-#endif
-
-/**
- * @brief Enables the MMC_SPI subsystem.
- */
-#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_MMC_SPI FALSE
-#endif
-
-/**
- * @brief Enables the PWM subsystem.
- */
-#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
-#define HAL_USE_PWM FALSE
-#endif
-
-/**
- * @brief Enables the QSPI subsystem.
- */
-#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
-#define HAL_USE_QSPI FALSE
-#endif
-
-/**
- * @brief Enables the RTC subsystem.
- */
-#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
-#define HAL_USE_RTC FALSE
-#endif
-
-/**
- * @brief Enables the SDC subsystem.
- */
-#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
-#define HAL_USE_SDC FALSE
-#endif
-
-/**
- * @brief Enables the SERIAL subsystem.
- */
-#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL TRUE
-#endif
-
-/**
- * @brief Enables the SERIAL over USB subsystem.
- */
-#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
-#define HAL_USE_SERIAL_USB FALSE
-#endif
-
-/**
- * @brief Enables the SPI subsystem.
- */
-#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
-#define HAL_USE_SPI FALSE
-#endif
-
-/**
- * @brief Enables the UART subsystem.
- */
-#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
-#define HAL_USE_UART FALSE
-#endif
-
-/**
- * @brief Enables the USB subsystem.
- */
-#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
-#define HAL_USE_USB FALSE
-#endif
-
-/**
- * @brief Enables the WDG subsystem.
- */
-#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
-#define HAL_USE_WDG FALSE
-#endif
-
-/*===========================================================================*/
-/* ADC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
-#define ADC_USE_WAIT TRUE
-#endif
-
-/**
- * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define ADC_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* CAN driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Sleep mode related APIs inclusion switch.
- */
-#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
-#define CAN_USE_SLEEP_MODE TRUE
-#endif
-
-/*===========================================================================*/
-/* CRY driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the SW fall-back of the cryptographic driver.
- * @details When enabled, this option, activates a fall-back software
- * implementation for algorithms not supported by the underlying
- * hardware.
- * @note Fall-back implementations may not be present for all algorithms.
- */
-#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__)
-#define HAL_CRY_USE_FALLBACK FALSE
-#endif
-
-/**
- * @brief Makes the driver forcibly use the fall-back implementations.
- */
-#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__)
-#define HAL_CRY_ENFORCE_FALLBACK FALSE
-#endif
-
-/*===========================================================================*/
-/* I2C driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables the mutual exclusion APIs on the I2C bus.
- */
-#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define I2C_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* MAC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
-#define MAC_USE_ZERO_COPY FALSE
-#endif
-
-/**
- * @brief Enables an event sources for incoming packets.
- */
-#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
-#define MAC_USE_EVENTS TRUE
-#endif
-
-/*===========================================================================*/
-/* MMC_SPI driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- * routines releasing some extra CPU time for the threads with
- * lower priority, this may slow down the driver a bit however.
- * This option is recommended also if the SPI driver does not
- * use a DMA channel and heavily loads the CPU.
- */
-#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
-#define MMC_NICE_WAITING TRUE
-#endif
-
-/*===========================================================================*/
-/* SDC driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Number of initialization attempts before rejecting the card.
- * @note Attempts are performed at 10mS intervals.
- */
-#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
-#define SDC_INIT_RETRY 100
-#endif
-
-/**
- * @brief Include support for MMC cards.
- * @note MMC support is not yet implemented so this option must be kept
- * at @p FALSE.
- */
-#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
-#define SDC_MMC_SUPPORT FALSE
-#endif
-
-/**
- * @brief Delays insertions.
- * @details If enabled this options inserts delays into the MMC waiting
- * routines releasing some extra CPU time for the threads with
- * lower priority, this may slow down the driver a bit however.
- */
-#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
-#define SDC_NICE_WAITING TRUE
-#endif
-
-/*===========================================================================*/
-/* SERIAL driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Default bit rate.
- * @details Configuration parameter, this is the baud rate selected for the
- * default configuration.
- */
-#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
-#define SERIAL_DEFAULT_BITRATE 38400
-#endif
-
-/**
- * @brief Serial buffers size.
- * @details Configuration parameter, you can change the depth of the queue
- * buffers depending on the requirements of your application.
- * @note The default is 16 bytes for both the transmission and receive
- * buffers.
- */
-#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_BUFFERS_SIZE 16
-#endif
-
-/*===========================================================================*/
-/* SERIAL_USB driver related setting. */
-/*===========================================================================*/
-
-/**
- * @brief Serial over USB buffers size.
- * @details Configuration parameter, the buffer size must be a multiple of
- * the USB data endpoint maximum packet size.
- * @note The default is 256 bytes for both the transmission and receive
- * buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_SIZE 256
-#endif
-
-/**
- * @brief Serial over USB number of buffers.
- * @note The default is 2 buffers.
- */
-#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
-#define SERIAL_USB_BUFFERS_NUMBER 2
-#endif
-
-/*===========================================================================*/
-/* SPI driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
-#define SPI_USE_WAIT TRUE
-#endif
-
-/**
- * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define SPI_USE_MUTUAL_EXCLUSION TRUE
-#endif
-
-/*===========================================================================*/
-/* UART driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
-#define UART_USE_WAIT FALSE
-#endif
-
-/**
- * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
-#define UART_USE_MUTUAL_EXCLUSION FALSE
-#endif
-
-/*===========================================================================*/
-/* USB driver related settings. */
-/*===========================================================================*/
-
-/**
- * @brief Enables synchronous APIs.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
-#define USB_USE_WAIT FALSE
-#endif
-
-#endif /* HALCONF_H */
-
-/** @} */
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.ewp b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.ewp
deleted file mode 100644
index 2d049cd0f..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.ewp
+++ /dev/null
@@ -1,2658 +0,0 @@
-
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-
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-
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-
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-
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-
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-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_pal.h
-
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-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_queues.h
-
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-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_sdc.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_serial.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_serial_usb.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_spi.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_st.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_streams.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_uart.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_usb.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_usb_cdc.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\include\hal_wdg.h
-
-
-
- lib
-
- streams
-
- $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\chprintf.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\lib\streams\memstreams.h
-
-
-
-
- port
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3\hal_adc_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\ADCv3\hal_adc_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1\hal_can_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\CANv1\hal_can_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DACv1\hal_dac_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DACv1\hal_dac_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1\hal_ext_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\EXTIv1\hal_ext_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_ext_lld_isr.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_ext_lld_isr.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_gpt_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_gpt_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\hal_i2c_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\I2Cv2\hal_i2c_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_i2s_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_i2s_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_icu_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_icu_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\hal_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\hal_pal_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\GPIOv2\hal_pal_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_pwm_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_pwm_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\hal_rtc_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\RTCv2\hal_rtc_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SDMMCv1\hal_sdc_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SDMMCv1\hal_sdc_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_serial_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_serial_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_spi_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\SPIv2\hal_spi_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_st_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\hal_st_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_uart_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USARTv2\hal_uart_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\hal_usb_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\hal_usb_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1\hal_wdg_lld.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\xWDGv1\hal_wdg_lld.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\common\ARMCMx\nvic.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1\stm32_dma.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\DMAv1\stm32_dma.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_isr.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_rcc.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\STM32F3xx\stm32_registry.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\TIMv1\stm32_tim.h
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\ports\STM32\LLD\USBv1\stm32_usb.h
-
-
-
- src
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_adc.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_buffers.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_can.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_dac.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_ext.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_gpt.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_i2c.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_i2s.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_icu.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mac.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mmc_spi.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_mmcsd.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_pal.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_pwm.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_queues.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_rtc.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_sdc.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_serial.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_serial_usb.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_spi.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_st.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_uart.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_usb.c
-
-
- $PROJ_DIR$\..\..\..\..\os\hal\src\hal_wdg.c
-
-
-
-
- rt
-
- include
-
- $PROJ_DIR$\..\..\..\..\os\rt\include\ch.h
-
-
- $PROJ_DIR$\..\..\..\..\os\rt\include\chalign.h
-
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-
-
-
-
- $PROJ_DIR$\..\chconf.h
-
-
- $PROJ_DIR$\..\halconf.h
-
-
- $PROJ_DIR$\..\main.c
-
-
- $PROJ_DIR$\..\mcuconf.h
-
-
-
-
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.eww b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.eww
deleted file mode 100644
index f9b3b2000..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.eww
+++ /dev/null
@@ -1,10 +0,0 @@
-
-
-
-
- $WS_DIR$\ch.ewp
-
-
-
-
-
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.icf b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.icf
deleted file mode 100644
index 1f3964240..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/iar/ch.icf
+++ /dev/null
@@ -1,52 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
-define symbol __ICFEDIT_region_ROM_end__ = 0x0803FFFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__ = 0x20009FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x400; /* Size of the process stack */
-define symbol __ICFEDIT_size_heap__ = 0x100; /* Used to mark heap (heap + sysheap) maximum size limit */
-/**** End of ICF editor section. ###ICF###*/
-
-/* Size of the IRQ Stack (Main Stack).*/
-define symbol __ICFEDIT_size_irqstack__ = 0x400;
-
-define memory mem with size = 4G;
-define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
-define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__];
-
-define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__, fixed order { };
-define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__, fixed order {section CSTACK};
-define block DATABSS with alignment = 8, fixed order {readwrite, zeroinit};
-define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__, fixed order {section HEAP};
-define block SYSHEAP with alignment = 8 {section SYSHEAP};
-
-initialize by copy {readwrite};
-do not initialize {section .noinit};
-
-keep { section .intvec };
-
-place at address mem:__ICFEDIT_intvec_start__ {readonly section .intvec};
-
-place in ROM_region {readonly};
-
-place at start of RAM_region {block IRQSTACK}; /* Main stack which becomes IRQ stack */
-place in RAM_region {block CSTACK}; /* Process stack */
-place in RAM_region {block DATABSS}; /* Textdata region */
-place in RAM_region {block HEAP}; /* Sys Heap size limit marker */
-place at end of RAM_region {block SYSHEAP}; /* Sys Heap available for allocations */
-
-/* Define stack and memory addresses for kernel usage */
-define exported symbol __main_stack_base__ = __ICFEDIT_region_RAM_start__;
-define exported symbol __main_stack_end__ = __main_stack_base__ + __ICFEDIT_size_irqstack__; /* Note: End refers to empty stack */
-define exported symbol __process_stack_base__ = __main_stack_end__;
-define exported symbol __main_thread_stack_base__ = __process_stack_base__; /* Note: Main thread uses process stack */
-define exported symbol __process_stack_end__ = __process_stack_base__ + __ICFEDIT_size_cstack__;
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/keil/ch.uvprojx b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/keil/ch.uvprojx
deleted file mode 100644
index 8dcc10785..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/keil/ch.uvprojx
+++ /dev/null
@@ -1,1396 +0,0 @@
-
-
-
- 2.1
-
- ### uVision Project, (C) Keil Software
-
-
-
- Demo
- 0x4
- ARM-ADS
-
-
- STM32F303VC
- STMicroelectronics
- Keil.STM32F3xx_DFP.1.3.0
- http://www.keil.com/pack/
- IROM(0x08000000,0x40000) IRAM(0x20000000,0xC000) IRAM2(0x10000000,0x2000) CPUTYPE("Cortex-M4") FPU2 CLOCK(72000000) ELITTLE
-
-
- UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32F3xx_256 -FS08000000 -FL040000 -FP0($$Device:STM32F303VC$Flash\STM32F3xx_256.FLM))
- 6331
- $$Device:STM32F303VC$Device\Include\STM32F3xx.h
-
-
-
-
-
-
-
-
-
- $$Device:STM32F303VC$SVD\STM32F3xx.svd
- 0
- 0
-
-
-
-
-
-
- 0
- 0
- 0
- 0
- 1
-
- .\obj\
- ch
- 1
- 0
- 1
- 1
- 1
- .\lst\
- 1
- 0
- 0
-
- 0
- 0
-
-
- 0
- 0
- 0
- 0
-
-
- 0
- 0
-
-
- 0
- 0
- 0
- 0
-
-
- 0
- 0
-
-
- 0
- 0
- 0
- 0
-
- 0
-
-
-
- 0
- 0
- 0
- 0
- 0
- 1
- 0
- 0
- 0
- 0
- 3
-
-
- 1
-
-
- SARMCM3.DLL
- -REMAP -MPU
- DCM.DLL
- -pCM4
- SARMCM3.DLL
- -MPU
- TCM.DLL
- -pCM4
-
-
-
- 1
- 0
- 0
- 0
- 16
-
-
- 0
- 1
- 1
- 1
- 1
- 1
- 1
- 1
- 0
- 1
-
-
- 1
- 1
- 1
- 1
- 1
- 1
- 0
- 1
- 1
- 1
-
- 0
- 11
-
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-
-
- testheap.h
- 5
- ..\..\..\..\test\rt\testheap.h
-
-
- testmbox.c
- 1
- ..\..\..\..\test\rt\testmbox.c
-
-
- testmbox.h
- 5
- ..\..\..\..\test\rt\testmbox.h
-
-
- testmsg.c
- 1
- ..\..\..\..\test\rt\testmsg.c
-
-
- testmsg.h
- 5
- ..\..\..\..\test\rt\testmsg.h
-
-
- testmtx.c
- 1
- ..\..\..\..\test\rt\testmtx.c
-
-
- testmtx.h
- 5
- ..\..\..\..\test\rt\testmtx.h
-
-
- testpools.c
- 1
- ..\..\..\..\test\rt\testpools.c
-
-
- testpools.h
- 5
- ..\..\..\..\test\rt\testpools.h
-
-
- testqueues.c
- 1
- ..\..\..\..\test\rt\testqueues.c
-
-
- testqueues.h
- 5
- ..\..\..\..\test\rt\testqueues.h
-
-
- testsem.c
- 1
- ..\..\..\..\test\rt\testsem.c
-
-
- testsem.h
- 5
- ..\..\..\..\test\rt\testsem.h
-
-
- testthd.c
- 1
- ..\..\..\..\test\rt\testthd.c
-
-
- testsys.c
- 1
- ..\..\..\..\test\rt\testsys.c
-
-
- testsys.h
- 5
- ..\..\..\..\test\rt\testsys.h
-
-
-
-
- demo
-
-
- main.c
- 1
- ..\main.c
-
-
- mcuconf.h
- 5
- ..\mcuconf.h
-
-
- chconf.h
- 5
- ..\chconf.h
-
-
- halconf.h
- 5
- ..\halconf.h
-
-
-
-
-
-
-
-
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/main.c b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/main.c
deleted file mode 100644
index 1231cd275..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/main.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#include "ch.h"
-#include "hal.h"
-#include "rt_test_root.h"
-#include "oslib_test_root.h"
-
-/*
- * Blinker thread #1.
- */
-THD_WORKING_AREA(waThread1, 128);
-THD_FUNCTION(Thread1, arg) {
-
- (void)arg;
-
- chRegSetThreadName("blinker 1");
- while (true) {
- palToggleLine(LINE_LED3_RED);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED7_GREEN);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED10_RED);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED6_GREEN);
- chThdSleepMilliseconds(100);
- }
-}
-
-/*
- * Blinker thread #2.
- */
-THD_WORKING_AREA(waThread2, 128);
-THD_FUNCTION(Thread2, arg) {
-
- (void)arg;
-
- chRegSetThreadName("blinker 2");
- while (true) {
- chThdSleepMilliseconds(50);
- palToggleLine(LINE_LED5_ORANGE);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED9_BLUE);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED8_ORANGE);
- chThdSleepMilliseconds(100);
- palToggleLine(LINE_LED4_BLUE);
- chThdSleepMilliseconds(50);
- }
-}
-
-/*
- * Application entry point.
- */
-int main(void) {
-
- /*
- * System initializations.
- * - HAL initialization, this also initializes the configured device drivers
- * and performs the board-specific initializations.
- * - Kernel initialization, the main() function becomes a thread and the
- * RTOS is active.
- */
- halInit();
- chSysInit();
-
- /*
- * Activates the serial driver 1 using the driver default configuration.
- */
- sdStart(&SD1, NULL);
-
- /*
- * Creates the example threads.
- */
- chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO+1, Thread1, NULL);
- chThdCreateStatic(waThread2, sizeof(waThread2), NORMALPRIO+1, Thread2, NULL);
-
- /*
- * Normal main() thread activity, in this demo it does nothing except
- * sleeping in a loop and check the button state, when the button is
- * pressed the test procedure is launched.
- */
- while (true) {
- if (palReadPad(GPIOA, GPIOA_BUTTON)) {
- test_execute((BaseSequentialStream *)&SD1, &rt_test_suite);
- test_execute((BaseSequentialStream *)&SD1, &oslib_test_suite);
- }
- chThdSleepMilliseconds(500);
- }
-}
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/mcuconf.h b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/mcuconf.h
deleted file mode 100644
index 6c9c3ffe0..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/mcuconf.h
+++ /dev/null
@@ -1,253 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
-/*
- * STM32F3xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
- *
- * IRQ priorities:
- * 15...0 Lowest...Highest.
- *
- * DMA priorities:
- * 0...3 Lowest...Highest.
- */
-
-#define STM32F3xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT FALSE
-#define STM32_PVD_ENABLE FALSE
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_HSI_ENABLED TRUE
-#define STM32_LSI_ENABLED TRUE
-#define STM32_HSE_ENABLED TRUE
-#define STM32_LSE_ENABLED FALSE
-#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSE
-#define STM32_PREDIV_VALUE 1
-#define STM32_PLLMUL_VALUE 9
-#define STM32_HPRE STM32_HPRE_DIV1
-#define STM32_PPRE1 STM32_PPRE1_DIV2
-#define STM32_PPRE2 STM32_PPRE2_DIV2
-#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
-#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
-#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
-#define STM32_USART1SW STM32_USART1SW_PCLK
-#define STM32_USART2SW STM32_USART2SW_PCLK
-#define STM32_USART3SW STM32_USART3SW_PCLK
-#define STM32_UART4SW STM32_UART4SW_PCLK
-#define STM32_UART5SW STM32_UART5SW_PCLK
-#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
-#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
-#define STM32_TIM1SW STM32_TIM1SW_PCLK2
-#define STM32_TIM8SW STM32_TIM8SW_PCLK2
-#define STM32_RTCSEL STM32_RTCSEL_LSI
-#define STM32_USB_CLOCK_REQUIRED TRUE
-#define STM32_USBPRE STM32_USBPRE_DIV1P5
-
-/*
- * IRQ system settings.
- */
-#define STM32_IRQ_EXTI0_PRIORITY 6
-#define STM32_IRQ_EXTI1_PRIORITY 6
-#define STM32_IRQ_EXTI2_PRIORITY 6
-#define STM32_IRQ_EXTI3_PRIORITY 6
-#define STM32_IRQ_EXTI4_PRIORITY 6
-#define STM32_IRQ_EXTI5_9_PRIORITY 6
-#define STM32_IRQ_EXTI10_15_PRIORITY 6
-#define STM32_IRQ_EXTI16_PRIORITY 6
-#define STM32_IRQ_EXTI17_PRIORITY 6
-#define STM32_IRQ_EXTI18_PRIORITY 6
-#define STM32_IRQ_EXTI19_PRIORITY 6
-#define STM32_IRQ_EXTI20_PRIORITY 6
-#define STM32_IRQ_EXTI21_22_29_PRIORITY 6
-#define STM32_IRQ_EXTI30_32_PRIORITY 6
-#define STM32_IRQ_EXTI33_PRIORITY 6
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_DUAL_MODE FALSE
-#define STM32_ADC_COMPACT_SAMPLES FALSE
-#define STM32_ADC_USE_ADC1 FALSE
-#define STM32_ADC_USE_ADC2 FALSE
-#define STM32_ADC_USE_ADC3 FALSE
-#define STM32_ADC_USE_ADC4 FALSE
-#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
-#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
-#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
-#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
-#define STM32_ADC_ADC1_DMA_PRIORITY 2
-#define STM32_ADC_ADC2_DMA_PRIORITY 2
-#define STM32_ADC_ADC3_DMA_PRIORITY 2
-#define STM32_ADC_ADC4_DMA_PRIORITY 2
-#define STM32_ADC_ADC12_IRQ_PRIORITY 5
-#define STM32_ADC_ADC3_IRQ_PRIORITY 5
-#define STM32_ADC_ADC4_IRQ_PRIORITY 5
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
-#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
-#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
-#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
-#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
-#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
-
-/*
- * CAN driver system settings.
- */
-#define STM32_CAN_USE_CAN1 FALSE
-#define STM32_CAN_CAN1_IRQ_PRIORITY 11
-
-/*
- * DAC driver system settings.
- */
-#define STM32_DAC_DUAL_MODE FALSE
-#define STM32_DAC_USE_DAC1_CH1 TRUE
-#define STM32_DAC_USE_DAC1_CH2 TRUE
-#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
-#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
-#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
-#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1 FALSE
-#define STM32_GPT_USE_TIM2 FALSE
-#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_USE_TIM4 FALSE
-#define STM32_GPT_USE_TIM6 FALSE
-#define STM32_GPT_USE_TIM7 FALSE
-#define STM32_GPT_USE_TIM8 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY 7
-#define STM32_GPT_TIM2_IRQ_PRIORITY 7
-#define STM32_GPT_TIM3_IRQ_PRIORITY 7
-#define STM32_GPT_TIM4_IRQ_PRIORITY 7
-#define STM32_GPT_TIM6_IRQ_PRIORITY 7
-#define STM32_GPT_TIM7_IRQ_PRIORITY 7
-#define STM32_GPT_TIM8_IRQ_PRIORITY 7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1 FALSE
-#define STM32_I2C_USE_I2C2 FALSE
-#define STM32_I2C_BUSY_TIMEOUT 50
-#define STM32_I2C_I2C1_IRQ_PRIORITY 10
-#define STM32_I2C_I2C2_IRQ_PRIORITY 10
-#define STM32_I2C_USE_DMA TRUE
-#define STM32_I2C_I2C1_DMA_PRIORITY 1
-#define STM32_I2C_I2C2_DMA_PRIORITY 1
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1 FALSE
-#define STM32_ICU_USE_TIM2 FALSE
-#define STM32_ICU_USE_TIM3 FALSE
-#define STM32_ICU_USE_TIM4 FALSE
-#define STM32_ICU_USE_TIM8 FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY 7
-#define STM32_ICU_TIM2_IRQ_PRIORITY 7
-#define STM32_ICU_TIM3_IRQ_PRIORITY 7
-#define STM32_ICU_TIM4_IRQ_PRIORITY 7
-#define STM32_ICU_TIM8_IRQ_PRIORITY 7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED FALSE
-#define STM32_PWM_USE_TIM1 FALSE
-#define STM32_PWM_USE_TIM2 FALSE
-#define STM32_PWM_USE_TIM3 FALSE
-#define STM32_PWM_USE_TIM4 FALSE
-#define STM32_PWM_USE_TIM8 FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY 7
-#define STM32_PWM_TIM2_IRQ_PRIORITY 7
-#define STM32_PWM_TIM3_IRQ_PRIORITY 7
-#define STM32_PWM_TIM4_IRQ_PRIORITY 7
-#define STM32_PWM_TIM8_IRQ_PRIORITY 7
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1 TRUE
-#define STM32_SERIAL_USE_USART2 FALSE
-#define STM32_SERIAL_USE_USART3 FALSE
-#define STM32_SERIAL_USE_UART4 FALSE
-#define STM32_SERIAL_USE_UART5 FALSE
-#define STM32_SERIAL_USART1_PRIORITY 12
-#define STM32_SERIAL_USART2_PRIORITY 12
-#define STM32_SERIAL_USART3_PRIORITY 12
-#define STM32_SERIAL_UART4_PRIORITY 12
-#define STM32_SERIAL_UART5_PRIORITY 12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1 FALSE
-#define STM32_SPI_USE_SPI2 FALSE
-#define STM32_SPI_USE_SPI3 FALSE
-#define STM32_SPI_SPI1_DMA_PRIORITY 1
-#define STM32_SPI_SPI2_DMA_PRIORITY 1
-#define STM32_SPI_SPI3_DMA_PRIORITY 1
-#define STM32_SPI_SPI1_IRQ_PRIORITY 10
-#define STM32_SPI_SPI2_IRQ_PRIORITY 10
-#define STM32_SPI_SPI3_IRQ_PRIORITY 10
-#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY 8
-#define STM32_ST_USE_TIMER 2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1 FALSE
-#define STM32_UART_USE_USART2 FALSE
-#define STM32_UART_USE_USART3 FALSE
-#define STM32_UART_USART1_IRQ_PRIORITY 12
-#define STM32_UART_USART2_IRQ_PRIORITY 12
-#define STM32_UART_USART3_IRQ_PRIORITY 12
-#define STM32_UART_USART1_DMA_PRIORITY 0
-#define STM32_UART_USART2_DMA_PRIORITY 0
-#define STM32_UART_USART3_DMA_PRIORITY 0
-#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
- */
-#define STM32_USB_USE_USB1 FALSE
-#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
-#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
-#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
-
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG FALSE
-
-#endif /* MCUCONF_H */
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/readme.txt b/demos/STM32/RT-STM32F303-DISCOVERY-REVC/readme.txt
deleted file mode 100644
index 5e3202b7b..000000000
--- a/demos/STM32/RT-STM32F303-DISCOVERY-REVC/readme.txt
+++ /dev/null
@@ -1,25 +0,0 @@
-*****************************************************************************
-** ChibiOS/RT port for ARM-Cortex-M4 STM32F303. **
-*****************************************************************************
-
-** TARGET **
-
-The demo runs on an ST STM32F3-Discovery board REV C or higher.
-
-** The Demo **
-
-
-** Build Procedure **
-
-The demo has been tested by using the free Codesourcery GCC-based toolchain
-and YAGARTO. just modify the TRGT line in the makefile in order to use
-different GCC toolchains.
-
-** Notes **
-
-Some files used by the demo are not part of ChibiOS/RT but are copyright of
-ST Microelectronics and are licensed under a different license.
-Also note that not all the files present in the ST library are distributed
-with ChibiOS/RT, you can find the whole library on the ST web site:
-
- http://www.st.com
diff --git a/demos/STM32/RT-STM32F303-DISCOVERY/main.c b/demos/STM32/RT-STM32F303-DISCOVERY/main.c
index 3c8767cf2..1231cd275 100644
--- a/demos/STM32/RT-STM32F303-DISCOVERY/main.c
+++ b/demos/STM32/RT-STM32F303-DISCOVERY/main.c
@@ -79,11 +79,8 @@ int main(void) {
/*
* Activates the serial driver 1 using the driver default configuration.
- * PA9(TX) and PA10(RX) are routed to USART1.
*/
sdStart(&SD1, NULL);
- palSetPadMode(GPIOA, 9, PAL_MODE_ALTERNATE(7));
- palSetPadMode(GPIOA, 10, PAL_MODE_ALTERNATE(7));
/*
* Creates the example threads.
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.c b/os/hal/boards/ST_STM32F3_DISCOVERY/board.c
deleted file mode 100644
index da54370c1..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of STM32 GPIO port setup.
- */
-typedef struct {
- uint32_t moder;
- uint32_t otyper;
- uint32_t ospeedr;
- uint32_t pupdr;
- uint32_t odr;
- uint32_t afrl;
- uint32_t afrh;
-} gpio_setup_t;
-
-/**
- * @brief Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- gpio_setup_t PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
- VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
- VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
- VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
- VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
- VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
- VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
- VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
- VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
- VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
-#endif
-#if STM32_HAS_GPIOJ
- {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
- VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
-#endif
-#if STM32_HAS_GPIOK
- {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
- VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
-
- gpiop->OTYPER = config->otyper;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
-}
-
-static void stm32_gpio_init(void) {
-
- /* Enabling GPIO-related clocks, the mask comes from the
- registry header file.*/
- rccResetAHB(STM32_GPIO_EN_MASK);
- rccEnableAHB(STM32_GPIO_EN_MASK, true);
-
- /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
- gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
- gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
- gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
- gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
- gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
- gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
- gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
- gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
- gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
- gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
- gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- * else.
- */
-void __early_init(void) {
-
- stm32_gpio_init();
- stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-
-}
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY/board.h
deleted file mode 100644
index fa58d2017..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.h
+++ /dev/null
@@ -1,1232 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#ifndef BOARD_H
-#define BOARD_H
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*
- * Setup for STMicroelectronics STM32F3-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F3_DISCOVERY
-#define BOARD_NAME "STMicroelectronics STM32F3-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK 0U
-#endif
-
-#define STM32_LSEDRV (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 8000000U
-#endif
-
-#define STM32_HSE_BYPASS
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F303xC
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON 0U
-#define GPIOA_PIN1 1U
-#define GPIOA_PIN2 2U
-#define GPIOA_PIN3 3U
-#define GPIOA_PIN4 4U
-#define GPIOA_SPI1_SCK 5U
-#define GPIOA_L3GD20_SCL 5U
-#define GPIOA_SPI1_MISO 6U
-#define GPIOA_L3GD20_SDO 6U
-#define GPIOA_SPI1_MOSI 7U
-#define GPIOA_L3GD20_SDI 7U
-#define GPIOA_PIN8 8U
-#define GPIOA_PIN9 9U
-#define GPIOA_PIN10 10U
-#define GPIOA_USB_DM 11U
-#define GPIOA_USB_DP 12U
-#define GPIOA_SWDIO 13U
-#define GPIOA_SWCLK 14U
-#define GPIOA_PIN15 15U
-
-#define GPIOB_PIN0 0U
-#define GPIOB_PIN1 1U
-#define GPIOB_PIN2 2U
-#define GPIOB_SWO 3U
-#define GPIOB_PIN4 4U
-#define GPIOB_PIN5 5U
-#define GPIOB_I2C1_SCL 6U
-#define GPIOB_LSM303DLHC_SCL 6U
-#define GPIOB_I2C1_SDA 7U
-#define GPIOB_LSM303DLHC_SDA 7U
-#define GPIOB_PIN8 8U
-#define GPIOB_PIN9 9U
-#define GPIOB_PIN10 10U
-#define GPIOB_PIN11 11U
-#define GPIOB_PIN12 12U
-#define GPIOB_PIN13 13U
-#define GPIOB_PIN14 14U
-#define GPIOB_PIN15 15U
-
-#define GPIOC_PIN0 0U
-#define GPIOC_PIN1 1U
-#define GPIOC_PIN2 2U
-#define GPIOC_PIN3 3U
-#define GPIOC_PIN4 4U
-#define GPIOC_PIN5 5U
-#define GPIOC_PIN6 6U
-#define GPIOC_PIN7 7U
-#define GPIOC_PIN8 8U
-#define GPIOC_PIN9 9U
-#define GPIOC_PIN10 10U
-#define GPIOC_PIN11 11U
-#define GPIOC_PIN12 12U
-#define GPIOC_PIN13 13U
-#define GPIOC_OSC32_IN 14U
-#define GPIOC_OSC32_OUT 15U
-
-#define GPIOD_PIN0 0U
-#define GPIOD_PIN1 1U
-#define GPIOD_PIN2 2U
-#define GPIOD_PIN3 3U
-#define GPIOD_PIN4 4U
-#define GPIOD_PIN5 5U
-#define GPIOD_PIN6 6U
-#define GPIOD_PIN7 7U
-#define GPIOD_PIN8 8U
-#define GPIOD_PIN9 9U
-#define GPIOD_PIN10 10U
-#define GPIOD_PIN11 11U
-#define GPIOD_PIN12 12U
-#define GPIOD_PIN13 13U
-#define GPIOD_PIN14 14U
-#define GPIOD_PIN15 15U
-
-#define GPIOE_L3GD20_INT1 0U
-#define GPIOE_L3GD20_INT2 1U
-#define GPIOE_LSM303DLHC_DRDY 2U
-#define GPIOE_SPI1_CS 3U
-#define GPIOE_L3GD20_CS 3U
-#define GPIOE_LSM303DLHC_INT1 4U
-#define GPIOE_LSM303DLHC_INT2 5U
-#define GPIOE_PIN6 6U
-#define GPIOE_PIN7 7U
-#define GPIOE_LED4_BLUE 8U
-#define GPIOE_LED3_RED 9U
-#define GPIOE_LED5_ORANGE 10U
-#define GPIOE_LED7_GREEN 11U
-#define GPIOE_LED9_BLUE 12U
-#define GPIOE_LED10_RED 13U
-#define GPIOE_LED8_ORANGE 14U
-#define GPIOE_LED6_GREEN 15U
-
-#define GPIOF_OSC_IN 0U
-#define GPIOF_OSC_OUT 1U
-#define GPIOF_PIN2 2U
-#define GPIOF_PIN3 3U
-#define GPIOF_PIN4 4U
-#define GPIOF_PIN5 5U
-#define GPIOF_PIN6 6U
-#define GPIOF_PIN7 7U
-#define GPIOF_PIN8 8U
-#define GPIOF_PIN9 9U
-#define GPIOF_PIN10 10U
-#define GPIOF_PIN11 11U
-#define GPIOF_PIN12 12U
-#define GPIOF_PIN13 13U
-#define GPIOF_PIN14 14U
-#define GPIOF_PIN15 15U
-
-#define GPIOG_PIN0 0U
-#define GPIOG_PIN1 1U
-#define GPIOG_PIN2 2U
-#define GPIOG_PIN3 3U
-#define GPIOG_PIN4 4U
-#define GPIOG_PIN5 5U
-#define GPIOG_PIN6 6U
-#define GPIOG_PIN7 7U
-#define GPIOG_PIN8 8U
-#define GPIOG_PIN9 9U
-#define GPIOG_PIN10 10U
-#define GPIOG_PIN11 11U
-#define GPIOG_PIN12 12U
-#define GPIOG_PIN13 13U
-#define GPIOG_PIN14 14U
-#define GPIOG_PIN15 15U
-
-#define GPIOH_PIN0 0U
-#define GPIOH_PIN1 1U
-#define GPIOH_PIN2 2U
-#define GPIOH_PIN3 3U
-#define GPIOH_PIN4 4U
-#define GPIOH_PIN5 5U
-#define GPIOH_PIN6 6U
-#define GPIOH_PIN7 7U
-#define GPIOH_PIN8 8U
-#define GPIOH_PIN9 9U
-#define GPIOH_PIN10 10U
-#define GPIOH_PIN11 11U
-#define GPIOH_PIN12 12U
-#define GPIOH_PIN13 13U
-#define GPIOH_PIN14 14U
-#define GPIOH_PIN15 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
-#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U)
-#define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U)
-#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U)
-#define LINE_L3GD20_SDO PAL_LINE(GPIOA, 6U)
-#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U)
-#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
-#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
-#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
-#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
-#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
-#define LINE_SWO PAL_LINE(GPIOB, 3U)
-#define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U)
-#define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U)
-#define LINE_I2C1_SDA PAL_LINE(GPIOB, 7U)
-#define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 7U)
-#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
-#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
-#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U)
-#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U)
-#define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U)
-#define LINE_SPI1_CS PAL_LINE(GPIOE, 3U)
-#define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U)
-#define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U)
-#define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U)
-#define LINE_LED4_BLUE PAL_LINE(GPIOE, 8U)
-#define LINE_LED3_RED PAL_LINE(GPIOE, 9U)
-#define LINE_LED5_ORANGE PAL_LINE(GPIOE, 10U)
-#define LINE_LED7_GREEN PAL_LINE(GPIOE, 11U)
-#define LINE_LED9_BLUE PAL_LINE(GPIOE, 12U)
-#define LINE_LED10_RED PAL_LINE(GPIOE, 13U)
-#define LINE_LED8_ORANGE PAL_LINE(GPIOE, 14U)
-#define LINE_LED6_GREEN PAL_LINE(GPIOE, 15U)
-#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
-#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n) (0U << (n))
-#define PIN_ODR_HIGH(n) (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
-#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0 - BUTTON (input floating).
- * PA1 - PIN1 (input pullup).
- * PA2 - PIN2 (input pullup).
- * PA3 - PIN3 (input pullup).
- * PA4 - PIN4 (input pullup).
- * PA5 - SPI1_SCK L3GD20_SCL (alternate 5).
- * PA6 - SPI1_MISO L3GD20_SDO (alternate 5).
- * PA7 - SPI1_MOSI L3GD20_SDI (alternate 5).
- * PA8 - PIN8 (input pullup).
- * PA9 - PIN9 (input pullup).
- * PA10 - PIN10 (input pullup).
- * PA11 - USB_DM (alternate 14).
- * PA12 - USB_DP (alternate 14).
- * PA13 - SWDIO (alternate 0).
- * PA14 - SWCLK (alternate 0).
- * PA15 - PIN15 (input pullup).
- */
-#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
- PIN_MODE_INPUT(GPIOA_PIN1) | \
- PIN_MODE_INPUT(GPIOA_PIN2) | \
- PIN_MODE_INPUT(GPIOA_PIN3) | \
- PIN_MODE_INPUT(GPIOA_PIN4) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_SCK) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_MISO) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_MOSI) | \
- PIN_MODE_INPUT(GPIOA_PIN8) | \
- PIN_MODE_INPUT(GPIOA_PIN9) | \
- PIN_MODE_INPUT(GPIOA_PIN10) | \
- PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
- PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
- PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
- PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
- PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_SCK) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MISO) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MOSI) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
- PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_SCK) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_MISO) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_MOSI) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
- PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
- PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
- PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
- PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
- PIN_PUPDR_FLOATING(GPIOA_SPI1_SCK) | \
- PIN_PUPDR_PULLUP(GPIOA_SPI1_MISO) | \
- PIN_PUPDR_FLOATING(GPIOA_SPI1_MOSI) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
- PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
- PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
- PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
- PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
- PIN_ODR_HIGH(GPIOA_PIN1) | \
- PIN_ODR_HIGH(GPIOA_PIN2) | \
- PIN_ODR_HIGH(GPIOA_PIN3) | \
- PIN_ODR_HIGH(GPIOA_PIN4) | \
- PIN_ODR_HIGH(GPIOA_SPI1_SCK) | \
- PIN_ODR_HIGH(GPIOA_SPI1_MISO) | \
- PIN_ODR_HIGH(GPIOA_SPI1_MOSI) | \
- PIN_ODR_HIGH(GPIOA_PIN8) | \
- PIN_ODR_HIGH(GPIOA_PIN9) | \
- PIN_ODR_HIGH(GPIOA_PIN10) | \
- PIN_ODR_HIGH(GPIOA_USB_DM) | \
- PIN_ODR_HIGH(GPIOA_USB_DP) | \
- PIN_ODR_HIGH(GPIOA_SWDIO) | \
- PIN_ODR_HIGH(GPIOA_SWCLK) | \
- PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOA_SPI1_SCK, 5U) | \
- PIN_AFIO_AF(GPIOA_SPI1_MISO, 5U) | \
- PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5U))
-#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOA_USB_DM, 14U) | \
- PIN_AFIO_AF(GPIOA_USB_DP, 14U) | \
- PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
- PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN15, 0U))
-
-/*
- * GPIOB setup:
- *
- * PB0 - PIN0 (input pullup).
- * PB1 - PIN1 (input pullup).
- * PB2 - PIN2 (input pullup).
- * PB3 - SWO (alternate 0).
- * PB4 - PIN4 (input pullup).
- * PB5 - PIN5 (input pullup).
- * PB6 - I2C1_SCL LSM303DLHC_SCL (alternate 4).
- * PB7 - I2C1_SDA LSM303DLHC_SDA (alternate 4).
- * PB8 - PIN8 (input pullup).
- * PB9 - PIN9 (input pullup).
- * PB10 - PIN10 (input pullup).
- * PB11 - PIN11 (input pullup).
- * PB12 - PIN12 (input pullup).
- * PB13 - PIN13 (input pullup).
- * PB14 - PIN14 (input pullup).
- * PB15 - PIN15 (input pullup).
- */
-#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
- PIN_MODE_INPUT(GPIOB_PIN1) | \
- PIN_MODE_INPUT(GPIOB_PIN2) | \
- PIN_MODE_ALTERNATE(GPIOB_SWO) | \
- PIN_MODE_INPUT(GPIOB_PIN4) | \
- PIN_MODE_INPUT(GPIOB_PIN5) | \
- PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \
- PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \
- PIN_MODE_INPUT(GPIOB_PIN8) | \
- PIN_MODE_INPUT(GPIOB_PIN9) | \
- PIN_MODE_INPUT(GPIOB_PIN10) | \
- PIN_MODE_INPUT(GPIOB_PIN11) | \
- PIN_MODE_INPUT(GPIOB_PIN12) | \
- PIN_MODE_INPUT(GPIOB_PIN13) | \
- PIN_MODE_INPUT(GPIOB_PIN14) | \
- PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
- PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \
- PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
- PIN_OSPEED_HIGH(GPIOB_SWO) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
- PIN_OSPEED_HIGH(GPIOB_I2C1_SCL) | \
- PIN_OSPEED_HIGH(GPIOB_I2C1_SDA) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
- PIN_PUPDR_FLOATING(GPIOB_SWO) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
- PIN_PUPDR_FLOATING(GPIOB_I2C1_SCL) | \
- PIN_PUPDR_FLOATING(GPIOB_I2C1_SDA) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
- PIN_ODR_HIGH(GPIOB_PIN1) | \
- PIN_ODR_HIGH(GPIOB_PIN2) | \
- PIN_ODR_HIGH(GPIOB_SWO) | \
- PIN_ODR_HIGH(GPIOB_PIN4) | \
- PIN_ODR_HIGH(GPIOB_PIN5) | \
- PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \
- PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \
- PIN_ODR_HIGH(GPIOB_PIN8) | \
- PIN_ODR_HIGH(GPIOB_PIN9) | \
- PIN_ODR_HIGH(GPIOB_PIN10) | \
- PIN_ODR_HIGH(GPIOB_PIN11) | \
- PIN_ODR_HIGH(GPIOB_PIN12) | \
- PIN_ODR_HIGH(GPIOB_PIN13) | \
- PIN_ODR_HIGH(GPIOB_PIN14) | \
- PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOB_SWO, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \
- PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U))
-#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN15, 0U))
-
-/*
- * GPIOC setup:
- *
- * PC0 - PIN0 (input pullup).
- * PC1 - PIN1 (input pullup).
- * PC2 - PIN2 (input pullup).
- * PC3 - PIN3 (input pullup).
- * PC4 - PIN4 (input pullup).
- * PC5 - PIN5 (input pullup).
- * PC6 - PIN6 (input pullup).
- * PC7 - PIN7 (input pullup).
- * PC8 - PIN8 (input pullup).
- * PC9 - PIN9 (input pullup).
- * PC10 - PIN10 (input pullup).
- * PC11 - PIN11 (input pullup).
- * PC12 - PIN12 (input pullup).
- * PC13 - PIN13 (input pullup).
- * PC14 - OSC32_IN (input floating).
- * PC15 - OSC32_OUT (input floating).
- */
-#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
- PIN_MODE_INPUT(GPIOC_PIN1) | \
- PIN_MODE_INPUT(GPIOC_PIN2) | \
- PIN_MODE_INPUT(GPIOC_PIN3) | \
- PIN_MODE_INPUT(GPIOC_PIN4) | \
- PIN_MODE_INPUT(GPIOC_PIN5) | \
- PIN_MODE_INPUT(GPIOC_PIN6) | \
- PIN_MODE_INPUT(GPIOC_PIN7) | \
- PIN_MODE_INPUT(GPIOC_PIN8) | \
- PIN_MODE_INPUT(GPIOC_PIN9) | \
- PIN_MODE_INPUT(GPIOC_PIN10) | \
- PIN_MODE_INPUT(GPIOC_PIN11) | \
- PIN_MODE_INPUT(GPIOC_PIN12) | \
- PIN_MODE_INPUT(GPIOC_PIN13) | \
- PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
- PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
- PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
- PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
- PIN_ODR_HIGH(GPIOC_PIN1) | \
- PIN_ODR_HIGH(GPIOC_PIN2) | \
- PIN_ODR_HIGH(GPIOC_PIN3) | \
- PIN_ODR_HIGH(GPIOC_PIN4) | \
- PIN_ODR_HIGH(GPIOC_PIN5) | \
- PIN_ODR_HIGH(GPIOC_PIN6) | \
- PIN_ODR_HIGH(GPIOC_PIN7) | \
- PIN_ODR_HIGH(GPIOC_PIN8) | \
- PIN_ODR_HIGH(GPIOC_PIN9) | \
- PIN_ODR_HIGH(GPIOC_PIN10) | \
- PIN_ODR_HIGH(GPIOC_PIN11) | \
- PIN_ODR_HIGH(GPIOC_PIN12) | \
- PIN_ODR_HIGH(GPIOC_PIN13) | \
- PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
- PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN7, 0U))
-#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
- PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
-
-/*
- * GPIOD setup:
- *
- * PD0 - PIN0 (input pullup).
- * PD1 - PIN1 (input pullup).
- * PD2 - PIN2 (input pullup).
- * PD3 - PIN3 (input pullup).
- * PD4 - PIN4 (input pullup).
- * PD5 - PIN5 (input pullup).
- * PD6 - PIN6 (input pullup).
- * PD7 - PIN7 (input pullup).
- * PD8 - PIN8 (input pullup).
- * PD9 - PIN9 (input pullup).
- * PD10 - PIN10 (input pullup).
- * PD11 - PIN11 (input pullup).
- * PD12 - PIN12 (input pullup).
- * PD13 - PIN13 (input pullup).
- * PD14 - PIN14 (input pullup).
- * PD15 - PIN15 (input pullup).
- */
-#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
- PIN_MODE_INPUT(GPIOD_PIN1) | \
- PIN_MODE_INPUT(GPIOD_PIN2) | \
- PIN_MODE_INPUT(GPIOD_PIN3) | \
- PIN_MODE_INPUT(GPIOD_PIN4) | \
- PIN_MODE_INPUT(GPIOD_PIN5) | \
- PIN_MODE_INPUT(GPIOD_PIN6) | \
- PIN_MODE_INPUT(GPIOD_PIN7) | \
- PIN_MODE_INPUT(GPIOD_PIN8) | \
- PIN_MODE_INPUT(GPIOD_PIN9) | \
- PIN_MODE_INPUT(GPIOD_PIN10) | \
- PIN_MODE_INPUT(GPIOD_PIN11) | \
- PIN_MODE_INPUT(GPIOD_PIN12) | \
- PIN_MODE_INPUT(GPIOD_PIN13) | \
- PIN_MODE_INPUT(GPIOD_PIN14) | \
- PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
- PIN_ODR_HIGH(GPIOD_PIN1) | \
- PIN_ODR_HIGH(GPIOD_PIN2) | \
- PIN_ODR_HIGH(GPIOD_PIN3) | \
- PIN_ODR_HIGH(GPIOD_PIN4) | \
- PIN_ODR_HIGH(GPIOD_PIN5) | \
- PIN_ODR_HIGH(GPIOD_PIN6) | \
- PIN_ODR_HIGH(GPIOD_PIN7) | \
- PIN_ODR_HIGH(GPIOD_PIN8) | \
- PIN_ODR_HIGH(GPIOD_PIN9) | \
- PIN_ODR_HIGH(GPIOD_PIN10) | \
- PIN_ODR_HIGH(GPIOD_PIN11) | \
- PIN_ODR_HIGH(GPIOD_PIN12) | \
- PIN_ODR_HIGH(GPIOD_PIN13) | \
- PIN_ODR_HIGH(GPIOD_PIN14) | \
- PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN7, 0U))
-#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN15, 0U))
-
-/*
- * GPIOE setup:
- *
- * PE0 - L3GD20_INT1 (input pullup).
- * PE1 - L3GD20_INT2 (input pullup).
- * PE2 - LSM303DLHC_DRDY (input pullup).
- * PE3 - SPI1_CS L3GD20_CS (output pushpull maximum).
- * PE4 - LSM303DLHC_INT1 (input pullup).
- * PE5 - LSM303DLHC_INT2 (input pullup).
- * PE6 - PIN6 (input pullup).
- * PE7 - PIN7 (input pullup).
- * PE8 - LED4_BLUE (output pushpull maximum).
- * PE9 - LED3_RED (output pushpull maximum).
- * PE10 - LED5_ORANGE (output pushpull maximum).
- * PE11 - LED7_GREEN (output pushpull maximum).
- * PE12 - LED9_BLUE (output pushpull maximum).
- * PE13 - LED10_RED (output pushpull maximum).
- * PE14 - LED8_ORANGE (output pushpull maximum).
- * PE15 - LED6_GREEN (output pushpull maximum).
- */
-#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | \
- PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | \
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) |\
- PIN_MODE_OUTPUT(GPIOE_SPI1_CS) | \
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_INT1) |\
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_INT2) |\
- PIN_MODE_INPUT(GPIOE_PIN6) | \
- PIN_MODE_INPUT(GPIOE_PIN7) | \
- PIN_MODE_OUTPUT(GPIOE_LED4_BLUE) | \
- PIN_MODE_OUTPUT(GPIOE_LED3_RED) | \
- PIN_MODE_OUTPUT(GPIOE_LED5_ORANGE) | \
- PIN_MODE_OUTPUT(GPIOE_LED7_GREEN) | \
- PIN_MODE_OUTPUT(GPIOE_LED9_BLUE) | \
- PIN_MODE_OUTPUT(GPIOE_LED10_RED) | \
- PIN_MODE_OUTPUT(GPIOE_LED8_ORANGE) | \
- PIN_MODE_OUTPUT(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) |\
- PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) |\
- PIN_OTYPE_PUSHPULL(GPIOE_SPI1_CS) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) |\
- PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED4_BLUE) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED3_RED) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED5_ORANGE) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LED7_GREEN) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED9_BLUE) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED10_RED) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED8_ORANGE) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_L3GD20_INT1) |\
- PIN_OSPEED_VERYLOW(GPIOE_L3GD20_INT2) |\
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_DRDY) |\
- PIN_OSPEED_HIGH(GPIOE_SPI1_CS) | \
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_INT1) |\
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_INT2) |\
- PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
- PIN_OSPEED_HIGH(GPIOE_LED4_BLUE) | \
- PIN_OSPEED_HIGH(GPIOE_LED3_RED) | \
- PIN_OSPEED_HIGH(GPIOE_LED5_ORANGE) | \
- PIN_OSPEED_HIGH(GPIOE_LED7_GREEN) | \
- PIN_OSPEED_HIGH(GPIOE_LED9_BLUE) | \
- PIN_OSPEED_HIGH(GPIOE_LED10_RED) | \
- PIN_OSPEED_HIGH(GPIOE_LED8_ORANGE) | \
- PIN_OSPEED_HIGH(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | \
- PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | \
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_DRDY) |\
- PIN_PUPDR_FLOATING(GPIOE_SPI1_CS) | \
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) |\
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) |\
- PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOE_LED4_BLUE) | \
- PIN_PUPDR_PULLUP(GPIOE_LED3_RED) | \
- PIN_PUPDR_PULLUP(GPIOE_LED5_ORANGE) | \
- PIN_PUPDR_FLOATING(GPIOE_LED7_GREEN) | \
- PIN_PUPDR_PULLUP(GPIOE_LED9_BLUE) | \
- PIN_PUPDR_FLOATING(GPIOE_LED10_RED) | \
- PIN_PUPDR_FLOATING(GPIOE_LED8_ORANGE) |\
- PIN_PUPDR_FLOATING(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | \
- PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | \
- PIN_ODR_HIGH(GPIOE_SPI1_CS) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | \
- PIN_ODR_HIGH(GPIOE_PIN6) | \
- PIN_ODR_HIGH(GPIOE_PIN7) | \
- PIN_ODR_LOW(GPIOE_LED4_BLUE) | \
- PIN_ODR_LOW(GPIOE_LED3_RED) | \
- PIN_ODR_LOW(GPIOE_LED5_ORANGE) | \
- PIN_ODR_LOW(GPIOE_LED7_GREEN) | \
- PIN_ODR_LOW(GPIOE_LED9_BLUE) | \
- PIN_ODR_LOW(GPIOE_LED10_RED) | \
- PIN_ODR_LOW(GPIOE_LED8_ORANGE) | \
- PIN_ODR_LOW(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | \
- PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | \
- PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) |\
- PIN_AFIO_AF(GPIOE_SPI1_CS, 0U) | \
- PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) |\
- PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) |\
- PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOE_PIN7, 0U))
-#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_LED4_BLUE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED3_RED, 0U) | \
- PIN_AFIO_AF(GPIOE_LED5_ORANGE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED7_GREEN, 0U) | \
- PIN_AFIO_AF(GPIOE_LED9_BLUE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED10_RED, 0U) | \
- PIN_AFIO_AF(GPIOE_LED8_ORANGE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED6_GREEN, 0U))
-
-/*
- * GPIOF setup:
- *
- * PF0 - OSC_IN (input floating).
- * PF1 - OSC_OUT (input floating).
- * PF2 - PIN2 (input pullup).
- * PF3 - PIN3 (input pullup).
- * PF4 - PIN4 (input pullup).
- * PF5 - PIN5 (input pullup).
- * PF6 - PIN6 (input pullup).
- * PF7 - PIN7 (input pullup).
- * PF8 - PIN8 (input pullup).
- * PF9 - PIN9 (input pullup).
- * PF10 - PIN10 (input pullup).
- * PF11 - PIN11 (input pullup).
- * PF12 - PIN12 (input pullup).
- * PF13 - PIN13 (input pullup).
- * PF14 - PIN14 (input pullup).
- * PF15 - PIN15 (input pullup).
- */
-#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
- PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
- PIN_MODE_INPUT(GPIOF_PIN2) | \
- PIN_MODE_INPUT(GPIOF_PIN3) | \
- PIN_MODE_INPUT(GPIOF_PIN4) | \
- PIN_MODE_INPUT(GPIOF_PIN5) | \
- PIN_MODE_INPUT(GPIOF_PIN6) | \
- PIN_MODE_INPUT(GPIOF_PIN7) | \
- PIN_MODE_INPUT(GPIOF_PIN8) | \
- PIN_MODE_INPUT(GPIOF_PIN9) | \
- PIN_MODE_INPUT(GPIOF_PIN10) | \
- PIN_MODE_INPUT(GPIOF_PIN11) | \
- PIN_MODE_INPUT(GPIOF_PIN12) | \
- PIN_MODE_INPUT(GPIOF_PIN13) | \
- PIN_MODE_INPUT(GPIOF_PIN14) | \
- PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_OSC_IN) | \
- PIN_OSPEED_HIGH(GPIOF_OSC_OUT) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
- PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
- PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
- PIN_ODR_HIGH(GPIOF_PIN2) | \
- PIN_ODR_HIGH(GPIOF_PIN3) | \
- PIN_ODR_HIGH(GPIOF_PIN4) | \
- PIN_ODR_HIGH(GPIOF_PIN5) | \
- PIN_ODR_HIGH(GPIOF_PIN6) | \
- PIN_ODR_HIGH(GPIOF_PIN7) | \
- PIN_ODR_HIGH(GPIOF_PIN8) | \
- PIN_ODR_HIGH(GPIOF_PIN9) | \
- PIN_ODR_HIGH(GPIOF_PIN10) | \
- PIN_ODR_HIGH(GPIOF_PIN11) | \
- PIN_ODR_HIGH(GPIOF_PIN12) | \
- PIN_ODR_HIGH(GPIOF_PIN13) | \
- PIN_ODR_HIGH(GPIOF_PIN14) | \
- PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \
- PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN7, 0U))
-#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN15, 0U))
-
-/*
- * GPIOG setup:
- *
- * PG0 - PIN0 (input pullup).
- * PG1 - PIN1 (input pullup).
- * PG2 - PIN2 (input pullup).
- * PG3 - PIN3 (input pullup).
- * PG4 - PIN4 (input pullup).
- * PG5 - PIN5 (input pullup).
- * PG6 - PIN6 (input pullup).
- * PG7 - PIN7 (input pullup).
- * PG8 - PIN8 (input pullup).
- * PG9 - PIN9 (input pullup).
- * PG10 - PIN10 (input pullup).
- * PG11 - PIN11 (input pullup).
- * PG12 - PIN12 (input pullup).
- * PG13 - PIN13 (input pullup).
- * PG14 - PIN14 (input pullup).
- * PG15 - PIN15 (input pullup).
- */
-#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
- PIN_MODE_INPUT(GPIOG_PIN1) | \
- PIN_MODE_INPUT(GPIOG_PIN2) | \
- PIN_MODE_INPUT(GPIOG_PIN3) | \
- PIN_MODE_INPUT(GPIOG_PIN4) | \
- PIN_MODE_INPUT(GPIOG_PIN5) | \
- PIN_MODE_INPUT(GPIOG_PIN6) | \
- PIN_MODE_INPUT(GPIOG_PIN7) | \
- PIN_MODE_INPUT(GPIOG_PIN8) | \
- PIN_MODE_INPUT(GPIOG_PIN9) | \
- PIN_MODE_INPUT(GPIOG_PIN10) | \
- PIN_MODE_INPUT(GPIOG_PIN11) | \
- PIN_MODE_INPUT(GPIOG_PIN12) | \
- PIN_MODE_INPUT(GPIOG_PIN13) | \
- PIN_MODE_INPUT(GPIOG_PIN14) | \
- PIN_MODE_INPUT(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN15))
-#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
- PIN_ODR_HIGH(GPIOG_PIN1) | \
- PIN_ODR_HIGH(GPIOG_PIN2) | \
- PIN_ODR_HIGH(GPIOG_PIN3) | \
- PIN_ODR_HIGH(GPIOG_PIN4) | \
- PIN_ODR_HIGH(GPIOG_PIN5) | \
- PIN_ODR_HIGH(GPIOG_PIN6) | \
- PIN_ODR_HIGH(GPIOG_PIN7) | \
- PIN_ODR_HIGH(GPIOG_PIN8) | \
- PIN_ODR_HIGH(GPIOG_PIN9) | \
- PIN_ODR_HIGH(GPIOG_PIN10) | \
- PIN_ODR_HIGH(GPIOG_PIN11) | \
- PIN_ODR_HIGH(GPIOG_PIN12) | \
- PIN_ODR_HIGH(GPIOG_PIN13) | \
- PIN_ODR_HIGH(GPIOG_PIN14) | \
- PIN_ODR_HIGH(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN7, 0U))
-#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN15, 0U))
-
-/*
- * GPIOH setup:
- *
- * PH0 - PIN0 (input pullup).
- * PH1 - PIN1 (input pullup).
- * PH2 - PIN2 (input pullup).
- * PH3 - PIN3 (input pullup).
- * PH4 - PIN4 (input pullup).
- * PH5 - PIN5 (input pullup).
- * PH6 - PIN6 (input pullup).
- * PH7 - PIN7 (input pullup).
- * PH8 - PIN8 (input pullup).
- * PH9 - PIN9 (input pullup).
- * PH10 - PIN10 (input pullup).
- * PH11 - PIN11 (input pullup).
- * PH12 - PIN12 (input pullup).
- * PH13 - PIN13 (input pullup).
- * PH14 - PIN14 (input pullup).
- * PH15 - PIN15 (input pullup).
- */
-#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
- PIN_MODE_INPUT(GPIOH_PIN1) | \
- PIN_MODE_INPUT(GPIOH_PIN2) | \
- PIN_MODE_INPUT(GPIOH_PIN3) | \
- PIN_MODE_INPUT(GPIOH_PIN4) | \
- PIN_MODE_INPUT(GPIOH_PIN5) | \
- PIN_MODE_INPUT(GPIOH_PIN6) | \
- PIN_MODE_INPUT(GPIOH_PIN7) | \
- PIN_MODE_INPUT(GPIOH_PIN8) | \
- PIN_MODE_INPUT(GPIOH_PIN9) | \
- PIN_MODE_INPUT(GPIOH_PIN10) | \
- PIN_MODE_INPUT(GPIOH_PIN11) | \
- PIN_MODE_INPUT(GPIOH_PIN12) | \
- PIN_MODE_INPUT(GPIOH_PIN13) | \
- PIN_MODE_INPUT(GPIOH_PIN14) | \
- PIN_MODE_INPUT(GPIOH_PIN15))
-#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
-#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN15))
-#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN15))
-#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
- PIN_ODR_HIGH(GPIOH_PIN1) | \
- PIN_ODR_HIGH(GPIOH_PIN2) | \
- PIN_ODR_HIGH(GPIOH_PIN3) | \
- PIN_ODR_HIGH(GPIOH_PIN4) | \
- PIN_ODR_HIGH(GPIOH_PIN5) | \
- PIN_ODR_HIGH(GPIOH_PIN6) | \
- PIN_ODR_HIGH(GPIOH_PIN7) | \
- PIN_ODR_HIGH(GPIOH_PIN8) | \
- PIN_ODR_HIGH(GPIOH_PIN9) | \
- PIN_ODR_HIGH(GPIOH_PIN10) | \
- PIN_ODR_HIGH(GPIOH_PIN11) | \
- PIN_ODR_HIGH(GPIOH_PIN12) | \
- PIN_ODR_HIGH(GPIOH_PIN13) | \
- PIN_ODR_HIGH(GPIOH_PIN14) | \
- PIN_ODR_HIGH(GPIOH_PIN15))
-#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN7, 0U))
-#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN15, 0U))
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* BOARD_H */
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk b/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
deleted file mode 100644
index 5116e15a0..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-# List of all the board related files.
-BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY/board.c
-
-# Required include directories
-BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY
-
-# Shared variables
-ALLCSRC += $(BOARDSRC)
-ALLINC += $(BOARDINC)
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg
deleted file mode 100644
index f0a94d7f6..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg
+++ /dev/null
@@ -1,1059 +0,0 @@
-
-
-
-
- resources/gencfg/processors/boards/stm32f3xx/templates
- ..
- 5.0.x
-
- STMicroelectronics STM32F3-Discovery
- ST_STM32F3_DISCOVERY
-
- STM32F303xC
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
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diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp b/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp
deleted file mode 100644
index 6967f302d..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.fmpp
+++ /dev/null
@@ -1,15 +0,0 @@
-sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates
-outputRoot: ..
-dataRoot: .
-
-freemarkerLinks: {
- lib: ../../../../../tools/ftl/libs
-}
-
-data : {
- doc1:xml (
- board.chcfg
- {
- }
- )
-}
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c
deleted file mode 100644
index da54370c1..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c
+++ /dev/null
@@ -1,266 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#include "hal.h"
-#include "stm32_gpio.h"
-
-/*===========================================================================*/
-/* Driver local definitions. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported variables. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver local variables and types. */
-/*===========================================================================*/
-
-/**
- * @brief Type of STM32 GPIO port setup.
- */
-typedef struct {
- uint32_t moder;
- uint32_t otyper;
- uint32_t ospeedr;
- uint32_t pupdr;
- uint32_t odr;
- uint32_t afrl;
- uint32_t afrh;
-} gpio_setup_t;
-
-/**
- * @brief Type of STM32 GPIO initialization data.
- */
-typedef struct {
-#if STM32_HAS_GPIOA || defined(__DOXYGEN__)
- gpio_setup_t PAData;
-#endif
-#if STM32_HAS_GPIOB || defined(__DOXYGEN__)
- gpio_setup_t PBData;
-#endif
-#if STM32_HAS_GPIOC || defined(__DOXYGEN__)
- gpio_setup_t PCData;
-#endif
-#if STM32_HAS_GPIOD || defined(__DOXYGEN__)
- gpio_setup_t PDData;
-#endif
-#if STM32_HAS_GPIOE || defined(__DOXYGEN__)
- gpio_setup_t PEData;
-#endif
-#if STM32_HAS_GPIOF || defined(__DOXYGEN__)
- gpio_setup_t PFData;
-#endif
-#if STM32_HAS_GPIOG || defined(__DOXYGEN__)
- gpio_setup_t PGData;
-#endif
-#if STM32_HAS_GPIOH || defined(__DOXYGEN__)
- gpio_setup_t PHData;
-#endif
-#if STM32_HAS_GPIOI || defined(__DOXYGEN__)
- gpio_setup_t PIData;
-#endif
-#if STM32_HAS_GPIOJ || defined(__DOXYGEN__)
- gpio_setup_t PJData;
-#endif
-#if STM32_HAS_GPIOK || defined(__DOXYGEN__)
- gpio_setup_t PKData;
-#endif
-} gpio_config_t;
-
-/**
- * @brief STM32 GPIO static initialization data.
- */
-static const gpio_config_t gpio_default_config = {
-#if STM32_HAS_GPIOA
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
- VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
-#endif
-#if STM32_HAS_GPIOB
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
- VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
-#endif
-#if STM32_HAS_GPIOC
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
- VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
-#endif
-#if STM32_HAS_GPIOD
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
- VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
-#endif
-#if STM32_HAS_GPIOE
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
- VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
-#endif
-#if STM32_HAS_GPIOF
- {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
- VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
-#endif
-#if STM32_HAS_GPIOG
- {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
- VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
-#endif
-#if STM32_HAS_GPIOH
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
- VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
-#endif
-#if STM32_HAS_GPIOI
- {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
- VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH},
-#endif
-#if STM32_HAS_GPIOJ
- {VAL_GPIOJ_MODER, VAL_GPIOJ_OTYPER, VAL_GPIOJ_OSPEEDR, VAL_GPIOJ_PUPDR,
- VAL_GPIOJ_ODR, VAL_GPIOJ_AFRL, VAL_GPIOJ_AFRH},
-#endif
-#if STM32_HAS_GPIOK
- {VAL_GPIOK_MODER, VAL_GPIOK_OTYPER, VAL_GPIOK_OSPEEDR, VAL_GPIOK_PUPDR,
- VAL_GPIOK_ODR, VAL_GPIOK_AFRL, VAL_GPIOK_AFRH}
-#endif
-};
-
-/*===========================================================================*/
-/* Driver local functions. */
-/*===========================================================================*/
-
-static void gpio_init(stm32_gpio_t *gpiop, const gpio_setup_t *config) {
-
- gpiop->OTYPER = config->otyper;
- gpiop->OSPEEDR = config->ospeedr;
- gpiop->PUPDR = config->pupdr;
- gpiop->ODR = config->odr;
- gpiop->AFRL = config->afrl;
- gpiop->AFRH = config->afrh;
- gpiop->MODER = config->moder;
-}
-
-static void stm32_gpio_init(void) {
-
- /* Enabling GPIO-related clocks, the mask comes from the
- registry header file.*/
- rccResetAHB(STM32_GPIO_EN_MASK);
- rccEnableAHB(STM32_GPIO_EN_MASK, true);
-
- /* Initializing all the defined GPIO ports.*/
-#if STM32_HAS_GPIOA
- gpio_init(GPIOA, &gpio_default_config.PAData);
-#endif
-#if STM32_HAS_GPIOB
- gpio_init(GPIOB, &gpio_default_config.PBData);
-#endif
-#if STM32_HAS_GPIOC
- gpio_init(GPIOC, &gpio_default_config.PCData);
-#endif
-#if STM32_HAS_GPIOD
- gpio_init(GPIOD, &gpio_default_config.PDData);
-#endif
-#if STM32_HAS_GPIOE
- gpio_init(GPIOE, &gpio_default_config.PEData);
-#endif
-#if STM32_HAS_GPIOF
- gpio_init(GPIOF, &gpio_default_config.PFData);
-#endif
-#if STM32_HAS_GPIOG
- gpio_init(GPIOG, &gpio_default_config.PGData);
-#endif
-#if STM32_HAS_GPIOH
- gpio_init(GPIOH, &gpio_default_config.PHData);
-#endif
-#if STM32_HAS_GPIOI
- gpio_init(GPIOI, &gpio_default_config.PIData);
-#endif
-#if STM32_HAS_GPIOJ
- gpio_init(GPIOJ, &gpio_default_config.PJData);
-#endif
-#if STM32_HAS_GPIOK
- gpio_init(GPIOK, &gpio_default_config.PKData);
-#endif
-}
-
-/*===========================================================================*/
-/* Driver interrupt handlers. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver exported functions. */
-/*===========================================================================*/
-
-/**
- * @brief Early initialization code.
- * @details GPIO ports and system clocks are initialized before everything
- * else.
- */
-void __early_init(void) {
-
- stm32_gpio_init();
- stm32_clock_init();
-}
-
-#if HAL_USE_SDC || defined(__DOXYGEN__)
-/**
- * @brief SDC card detection.
- */
-bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief SDC card write protection detection.
- */
-bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
-
- (void)sdcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif /* HAL_USE_SDC */
-
-#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
-/**
- * @brief MMC_SPI card detection.
- */
-bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return true;
-}
-
-/**
- * @brief MMC_SPI card write protection detection.
- */
-bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
-
- (void)mmcp;
- /* TODO: Fill the implementation.*/
- return false;
-}
-#endif
-
-/**
- * @brief Board-specific initialization code.
- * @todo Add your board-specific code, if any.
- */
-void boardInit(void) {
-
-}
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h
deleted file mode 100644
index c908f2190..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.h
+++ /dev/null
@@ -1,1234 +0,0 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-/*
- * This file has been automatically generated using ChibiStudio board
- * generator plugin. Do not edit manually.
- */
-
-#ifndef BOARD_H
-#define BOARD_H
-
-/*===========================================================================*/
-/* Driver constants. */
-/*===========================================================================*/
-
-/*
- * Setup for STMicroelectronics STM32F3-Discovery board.
- */
-
-/*
- * Board identifier.
- */
-#define BOARD_ST_STM32F3_DISCOVERY_REVC
-#define BOARD_NAME "STMicroelectronics STM32F3-Discovery"
-
-/*
- * Board oscillators-related settings.
- * NOTE: LSE not fitted.
- */
-#if !defined(STM32_LSECLK)
-#define STM32_LSECLK 0U
-#endif
-
-#define STM32_LSEDRV (3U << 3U)
-
-#if !defined(STM32_HSECLK)
-#define STM32_HSECLK 8000000U
-#endif
-
-#define STM32_HSE_BYPASS
-
-/*
- * MCU type as defined in the ST header.
- */
-#define STM32F303xC
-
-/*
- * IO pins assignments.
- */
-#define GPIOA_BUTTON 0U
-#define GPIOA_PIN1 1U
-#define GPIOA_PIN2 2U
-#define GPIOA_PIN3 3U
-#define GPIOA_PIN4 4U
-#define GPIOA_SPI1_SCK 5U
-#define GPIOA_L3GD20_SCL 5U
-#define GPIOA_SPI1_MISO 6U
-#define GPIOA_L3GD20_SDO 6U
-#define GPIOA_SPI1_MOSI 7U
-#define GPIOA_L3GD20_SDI 7U
-#define GPIOA_PIN8 8U
-#define GPIOA_PIN9 9U
-#define GPIOA_PIN10 10U
-#define GPIOA_USB_DM 11U
-#define GPIOA_USB_DP 12U
-#define GPIOA_SWDIO 13U
-#define GPIOA_SWCLK 14U
-#define GPIOA_PIN15 15U
-
-#define GPIOB_PIN0 0U
-#define GPIOB_PIN1 1U
-#define GPIOB_PIN2 2U
-#define GPIOB_SWO 3U
-#define GPIOB_PIN4 4U
-#define GPIOB_PIN5 5U
-#define GPIOB_I2C1_SCL 6U
-#define GPIOB_LSM303DLHC_SCL 6U
-#define GPIOB_I2C1_SDA 7U
-#define GPIOB_LSM303DLHC_SDA 7U
-#define GPIOB_PIN8 8U
-#define GPIOB_PIN9 9U
-#define GPIOB_PIN10 10U
-#define GPIOB_PIN11 11U
-#define GPIOB_PIN12 12U
-#define GPIOB_PIN13 13U
-#define GPIOB_PIN14 14U
-#define GPIOB_PIN15 15U
-
-#define GPIOC_PIN0 0U
-#define GPIOC_PIN1 1U
-#define GPIOC_PIN2 2U
-#define GPIOC_PIN3 3U
-#define GPIOC_VCP_RX 4U
-#define GPIOC_VCP_TX 5U
-#define GPIOC_PIN6 6U
-#define GPIOC_PIN7 7U
-#define GPIOC_PIN8 8U
-#define GPIOC_PIN9 9U
-#define GPIOC_PIN10 10U
-#define GPIOC_PIN11 11U
-#define GPIOC_PIN12 12U
-#define GPIOC_PIN13 13U
-#define GPIOC_OSC32_IN 14U
-#define GPIOC_OSC32_OUT 15U
-
-#define GPIOD_PIN0 0U
-#define GPIOD_PIN1 1U
-#define GPIOD_PIN2 2U
-#define GPIOD_PIN3 3U
-#define GPIOD_PIN4 4U
-#define GPIOD_PIN5 5U
-#define GPIOD_PIN6 6U
-#define GPIOD_PIN7 7U
-#define GPIOD_PIN8 8U
-#define GPIOD_PIN9 9U
-#define GPIOD_PIN10 10U
-#define GPIOD_PIN11 11U
-#define GPIOD_PIN12 12U
-#define GPIOD_PIN13 13U
-#define GPIOD_PIN14 14U
-#define GPIOD_PIN15 15U
-
-#define GPIOE_L3GD20_INT1 0U
-#define GPIOE_L3GD20_INT2 1U
-#define GPIOE_LSM303DLHC_DRDY 2U
-#define GPIOE_SPI1_CS 3U
-#define GPIOE_L3GD20_CS 3U
-#define GPIOE_LSM303DLHC_INT1 4U
-#define GPIOE_LSM303DLHC_INT2 5U
-#define GPIOE_PIN6 6U
-#define GPIOE_PIN7 7U
-#define GPIOE_LED4_BLUE 8U
-#define GPIOE_LED3_RED 9U
-#define GPIOE_LED5_ORANGE 10U
-#define GPIOE_LED7_GREEN 11U
-#define GPIOE_LED9_BLUE 12U
-#define GPIOE_LED10_RED 13U
-#define GPIOE_LED8_ORANGE 14U
-#define GPIOE_LED6_GREEN 15U
-
-#define GPIOF_OSC_IN 0U
-#define GPIOF_OSC_OUT 1U
-#define GPIOF_PIN2 2U
-#define GPIOF_PIN3 3U
-#define GPIOF_PIN4 4U
-#define GPIOF_PIN5 5U
-#define GPIOF_PIN6 6U
-#define GPIOF_PIN7 7U
-#define GPIOF_PIN8 8U
-#define GPIOF_PIN9 9U
-#define GPIOF_PIN10 10U
-#define GPIOF_PIN11 11U
-#define GPIOF_PIN12 12U
-#define GPIOF_PIN13 13U
-#define GPIOF_PIN14 14U
-#define GPIOF_PIN15 15U
-
-#define GPIOG_PIN0 0U
-#define GPIOG_PIN1 1U
-#define GPIOG_PIN2 2U
-#define GPIOG_PIN3 3U
-#define GPIOG_PIN4 4U
-#define GPIOG_PIN5 5U
-#define GPIOG_PIN6 6U
-#define GPIOG_PIN7 7U
-#define GPIOG_PIN8 8U
-#define GPIOG_PIN9 9U
-#define GPIOG_PIN10 10U
-#define GPIOG_PIN11 11U
-#define GPIOG_PIN12 12U
-#define GPIOG_PIN13 13U
-#define GPIOG_PIN14 14U
-#define GPIOG_PIN15 15U
-
-#define GPIOH_PIN0 0U
-#define GPIOH_PIN1 1U
-#define GPIOH_PIN2 2U
-#define GPIOH_PIN3 3U
-#define GPIOH_PIN4 4U
-#define GPIOH_PIN5 5U
-#define GPIOH_PIN6 6U
-#define GPIOH_PIN7 7U
-#define GPIOH_PIN8 8U
-#define GPIOH_PIN9 9U
-#define GPIOH_PIN10 10U
-#define GPIOH_PIN11 11U
-#define GPIOH_PIN12 12U
-#define GPIOH_PIN13 13U
-#define GPIOH_PIN14 14U
-#define GPIOH_PIN15 15U
-
-/*
- * IO lines assignments.
- */
-#define LINE_BUTTON PAL_LINE(GPIOA, 0U)
-#define LINE_SPI1_SCK PAL_LINE(GPIOA, 5U)
-#define LINE_L3GD20_SCL PAL_LINE(GPIOA, 5U)
-#define LINE_SPI1_MISO PAL_LINE(GPIOA, 6U)
-#define LINE_L3GD20_SDO PAL_LINE(GPIOA, 6U)
-#define LINE_SPI1_MOSI PAL_LINE(GPIOA, 7U)
-#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
-#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
-#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
-#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
-#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
-#define LINE_SWO PAL_LINE(GPIOB, 3U)
-#define LINE_I2C1_SCL PAL_LINE(GPIOB, 6U)
-#define LINE_LSM303DLHC_SCL PAL_LINE(GPIOB, 6U)
-#define LINE_I2C1_SDA PAL_LINE(GPIOB, 7U)
-#define LINE_LSM303DLHC_SDA PAL_LINE(GPIOB, 7U)
-#define LINE_VCP_RX PAL_LINE(GPIOC, 4U)
-#define LINE_VCP_TX PAL_LINE(GPIOC, 5U)
-#define LINE_OSC32_IN PAL_LINE(GPIOC, 14U)
-#define LINE_OSC32_OUT PAL_LINE(GPIOC, 15U)
-#define LINE_L3GD20_INT1 PAL_LINE(GPIOE, 0U)
-#define LINE_L3GD20_INT2 PAL_LINE(GPIOE, 1U)
-#define LINE_LSM303DLHC_DRDY PAL_LINE(GPIOE, 2U)
-#define LINE_SPI1_CS PAL_LINE(GPIOE, 3U)
-#define LINE_L3GD20_CS PAL_LINE(GPIOE, 3U)
-#define LINE_LSM303DLHC_INT1 PAL_LINE(GPIOE, 4U)
-#define LINE_LSM303DLHC_INT2 PAL_LINE(GPIOE, 5U)
-#define LINE_LED4_BLUE PAL_LINE(GPIOE, 8U)
-#define LINE_LED3_RED PAL_LINE(GPIOE, 9U)
-#define LINE_LED5_ORANGE PAL_LINE(GPIOE, 10U)
-#define LINE_LED7_GREEN PAL_LINE(GPIOE, 11U)
-#define LINE_LED9_BLUE PAL_LINE(GPIOE, 12U)
-#define LINE_LED10_RED PAL_LINE(GPIOE, 13U)
-#define LINE_LED8_ORANGE PAL_LINE(GPIOE, 14U)
-#define LINE_LED6_GREEN PAL_LINE(GPIOE, 15U)
-#define LINE_OSC_IN PAL_LINE(GPIOF, 0U)
-#define LINE_OSC_OUT PAL_LINE(GPIOF, 1U)
-
-/*===========================================================================*/
-/* Driver pre-compile time settings. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Derived constants and error checks. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver data structures and types. */
-/*===========================================================================*/
-
-/*===========================================================================*/
-/* Driver macros. */
-/*===========================================================================*/
-
-/*
- * I/O ports initial setup, this configuration is established soon after reset
- * in the initialization code.
- * Please refer to the STM32 Reference Manual for details.
- */
-#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
-#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
-#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
-#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
-#define PIN_ODR_LOW(n) (0U << (n))
-#define PIN_ODR_HIGH(n) (1U << (n))
-#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
-#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
-#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
-#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
-#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
-#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
-#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
-#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
-#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
-#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
-
-/*
- * GPIOA setup:
- *
- * PA0 - BUTTON (input floating).
- * PA1 - PIN1 (input pullup).
- * PA2 - PIN2 (input pullup).
- * PA3 - PIN3 (input pullup).
- * PA4 - PIN4 (input pullup).
- * PA5 - SPI1_SCK L3GD20_SCL (alternate 5).
- * PA6 - SPI1_MISO L3GD20_SDO (alternate 5).
- * PA7 - SPI1_MOSI L3GD20_SDI (alternate 5).
- * PA8 - PIN8 (input pullup).
- * PA9 - PIN9 (input pullup).
- * PA10 - PIN10 (input pullup).
- * PA11 - USB_DM (alternate 14).
- * PA12 - USB_DP (alternate 14).
- * PA13 - SWDIO (alternate 0).
- * PA14 - SWCLK (alternate 0).
- * PA15 - PIN15 (input pullup).
- */
-#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
- PIN_MODE_INPUT(GPIOA_PIN1) | \
- PIN_MODE_INPUT(GPIOA_PIN2) | \
- PIN_MODE_INPUT(GPIOA_PIN3) | \
- PIN_MODE_INPUT(GPIOA_PIN4) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_SCK) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_MISO) | \
- PIN_MODE_ALTERNATE(GPIOA_SPI1_MOSI) | \
- PIN_MODE_INPUT(GPIOA_PIN8) | \
- PIN_MODE_INPUT(GPIOA_PIN9) | \
- PIN_MODE_INPUT(GPIOA_PIN10) | \
- PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
- PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
- PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
- PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
- PIN_MODE_INPUT(GPIOA_PIN15))
-#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_SCK) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MISO) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SPI1_MOSI) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
- PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
- PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
- PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
-#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_BUTTON) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_SCK) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_MISO) | \
- PIN_OSPEED_HIGH(GPIOA_SPI1_MOSI) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
- PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
- PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
- PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
- PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
- PIN_OSPEED_VERYLOW(GPIOA_PIN15))
-#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
- PIN_PUPDR_FLOATING(GPIOA_SPI1_SCK) | \
- PIN_PUPDR_PULLUP(GPIOA_SPI1_MISO) | \
- PIN_PUPDR_FLOATING(GPIOA_SPI1_MOSI) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
- PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
- PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
- PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
- PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
- PIN_PUPDR_PULLUP(GPIOA_PIN15))
-#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
- PIN_ODR_HIGH(GPIOA_PIN1) | \
- PIN_ODR_HIGH(GPIOA_PIN2) | \
- PIN_ODR_HIGH(GPIOA_PIN3) | \
- PIN_ODR_HIGH(GPIOA_PIN4) | \
- PIN_ODR_HIGH(GPIOA_SPI1_SCK) | \
- PIN_ODR_HIGH(GPIOA_SPI1_MISO) | \
- PIN_ODR_HIGH(GPIOA_SPI1_MOSI) | \
- PIN_ODR_HIGH(GPIOA_PIN8) | \
- PIN_ODR_HIGH(GPIOA_PIN9) | \
- PIN_ODR_HIGH(GPIOA_PIN10) | \
- PIN_ODR_HIGH(GPIOA_USB_DM) | \
- PIN_ODR_HIGH(GPIOA_USB_DP) | \
- PIN_ODR_HIGH(GPIOA_SWDIO) | \
- PIN_ODR_HIGH(GPIOA_SWCLK) | \
- PIN_ODR_HIGH(GPIOA_PIN15))
-#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOA_SPI1_SCK, 5U) | \
- PIN_AFIO_AF(GPIOA_SPI1_MISO, 5U) | \
- PIN_AFIO_AF(GPIOA_SPI1_MOSI, 5U))
-#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOA_USB_DM, 14U) | \
- PIN_AFIO_AF(GPIOA_USB_DP, 14U) | \
- PIN_AFIO_AF(GPIOA_SWDIO, 0U) | \
- PIN_AFIO_AF(GPIOA_SWCLK, 0U) | \
- PIN_AFIO_AF(GPIOA_PIN15, 0U))
-
-/*
- * GPIOB setup:
- *
- * PB0 - PIN0 (input pullup).
- * PB1 - PIN1 (input pullup).
- * PB2 - PIN2 (input pullup).
- * PB3 - SWO (alternate 0).
- * PB4 - PIN4 (input pullup).
- * PB5 - PIN5 (input pullup).
- * PB6 - I2C1_SCL LSM303DLHC_SCL (alternate 4).
- * PB7 - I2C1_SDA LSM303DLHC_SDA (alternate 4).
- * PB8 - PIN8 (input pullup).
- * PB9 - PIN9 (input pullup).
- * PB10 - PIN10 (input pullup).
- * PB11 - PIN11 (input pullup).
- * PB12 - PIN12 (input pullup).
- * PB13 - PIN13 (input pullup).
- * PB14 - PIN14 (input pullup).
- * PB15 - PIN15 (input pullup).
- */
-#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
- PIN_MODE_INPUT(GPIOB_PIN1) | \
- PIN_MODE_INPUT(GPIOB_PIN2) | \
- PIN_MODE_ALTERNATE(GPIOB_SWO) | \
- PIN_MODE_INPUT(GPIOB_PIN4) | \
- PIN_MODE_INPUT(GPIOB_PIN5) | \
- PIN_MODE_ALTERNATE(GPIOB_I2C1_SCL) | \
- PIN_MODE_ALTERNATE(GPIOB_I2C1_SDA) | \
- PIN_MODE_INPUT(GPIOB_PIN8) | \
- PIN_MODE_INPUT(GPIOB_PIN9) | \
- PIN_MODE_INPUT(GPIOB_PIN10) | \
- PIN_MODE_INPUT(GPIOB_PIN11) | \
- PIN_MODE_INPUT(GPIOB_PIN12) | \
- PIN_MODE_INPUT(GPIOB_PIN13) | \
- PIN_MODE_INPUT(GPIOB_PIN14) | \
- PIN_MODE_INPUT(GPIOB_PIN15))
-#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
- PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SCL) | \
- PIN_OTYPE_OPENDRAIN(GPIOB_I2C1_SDA) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
-#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
- PIN_OSPEED_HIGH(GPIOB_SWO) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
- PIN_OSPEED_HIGH(GPIOB_I2C1_SCL) | \
- PIN_OSPEED_HIGH(GPIOB_I2C1_SDA) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOB_PIN15))
-#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
- PIN_PUPDR_FLOATING(GPIOB_SWO) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
- PIN_PUPDR_FLOATING(GPIOB_I2C1_SCL) | \
- PIN_PUPDR_FLOATING(GPIOB_I2C1_SDA) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOB_PIN15))
-#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
- PIN_ODR_HIGH(GPIOB_PIN1) | \
- PIN_ODR_HIGH(GPIOB_PIN2) | \
- PIN_ODR_HIGH(GPIOB_SWO) | \
- PIN_ODR_HIGH(GPIOB_PIN4) | \
- PIN_ODR_HIGH(GPIOB_PIN5) | \
- PIN_ODR_HIGH(GPIOB_I2C1_SCL) | \
- PIN_ODR_HIGH(GPIOB_I2C1_SDA) | \
- PIN_ODR_HIGH(GPIOB_PIN8) | \
- PIN_ODR_HIGH(GPIOB_PIN9) | \
- PIN_ODR_HIGH(GPIOB_PIN10) | \
- PIN_ODR_HIGH(GPIOB_PIN11) | \
- PIN_ODR_HIGH(GPIOB_PIN12) | \
- PIN_ODR_HIGH(GPIOB_PIN13) | \
- PIN_ODR_HIGH(GPIOB_PIN14) | \
- PIN_ODR_HIGH(GPIOB_PIN15))
-#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOB_SWO, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOB_I2C1_SCL, 4U) | \
- PIN_AFIO_AF(GPIOB_I2C1_SDA, 4U))
-#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOB_PIN15, 0U))
-
-/*
- * GPIOC setup:
- *
- * PC0 - PIN0 (input pullup).
- * PC1 - PIN1 (input pullup).
- * PC2 - PIN2 (input pullup).
- * PC3 - PIN3 (input pullup).
- * PC4 - VCP_RX (alternate 7).
- * PC5 - VCP_TX (alternate 7).
- * PC6 - PIN6 (input pullup).
- * PC7 - PIN7 (input pullup).
- * PC8 - PIN8 (input pullup).
- * PC9 - PIN9 (input pullup).
- * PC10 - PIN10 (input pullup).
- * PC11 - PIN11 (input pullup).
- * PC12 - PIN12 (input pullup).
- * PC13 - PIN13 (input pullup).
- * PC14 - OSC32_IN (input floating).
- * PC15 - OSC32_OUT (input floating).
- */
-#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
- PIN_MODE_INPUT(GPIOC_PIN1) | \
- PIN_MODE_INPUT(GPIOC_PIN2) | \
- PIN_MODE_INPUT(GPIOC_PIN3) | \
- PIN_MODE_ALTERNATE(GPIOC_VCP_RX) | \
- PIN_MODE_ALTERNATE(GPIOC_VCP_TX) | \
- PIN_MODE_INPUT(GPIOC_PIN6) | \
- PIN_MODE_INPUT(GPIOC_PIN7) | \
- PIN_MODE_INPUT(GPIOC_PIN8) | \
- PIN_MODE_INPUT(GPIOC_PIN9) | \
- PIN_MODE_INPUT(GPIOC_PIN10) | \
- PIN_MODE_INPUT(GPIOC_PIN11) | \
- PIN_MODE_INPUT(GPIOC_PIN12) | \
- PIN_MODE_INPUT(GPIOC_PIN13) | \
- PIN_MODE_INPUT(GPIOC_OSC32_IN) | \
- PIN_MODE_INPUT(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOC_VCP_RX) | \
- PIN_OTYPE_PUSHPULL(GPIOC_VCP_TX) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOC_VCP_RX) | \
- PIN_OSPEED_VERYLOW(GPIOC_VCP_TX) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
- PIN_OSPEED_HIGH(GPIOC_OSC32_IN) | \
- PIN_OSPEED_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOC_VCP_RX) | \
- PIN_PUPDR_PULLUP(GPIOC_VCP_TX) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_IN) | \
- PIN_PUPDR_FLOATING(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
- PIN_ODR_HIGH(GPIOC_PIN1) | \
- PIN_ODR_HIGH(GPIOC_PIN2) | \
- PIN_ODR_HIGH(GPIOC_PIN3) | \
- PIN_ODR_HIGH(GPIOC_VCP_RX) | \
- PIN_ODR_HIGH(GPIOC_VCP_TX) | \
- PIN_ODR_HIGH(GPIOC_PIN6) | \
- PIN_ODR_HIGH(GPIOC_PIN7) | \
- PIN_ODR_HIGH(GPIOC_PIN8) | \
- PIN_ODR_HIGH(GPIOC_PIN9) | \
- PIN_ODR_HIGH(GPIOC_PIN10) | \
- PIN_ODR_HIGH(GPIOC_PIN11) | \
- PIN_ODR_HIGH(GPIOC_PIN12) | \
- PIN_ODR_HIGH(GPIOC_PIN13) | \
- PIN_ODR_HIGH(GPIOC_OSC32_IN) | \
- PIN_ODR_HIGH(GPIOC_OSC32_OUT))
-#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOC_VCP_RX, 7U) | \
- PIN_AFIO_AF(GPIOC_VCP_TX, 7U) | \
- PIN_AFIO_AF(GPIOC_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN7, 0U))
-#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOC_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOC_OSC32_IN, 0U) | \
- PIN_AFIO_AF(GPIOC_OSC32_OUT, 0U))
-
-/*
- * GPIOD setup:
- *
- * PD0 - PIN0 (input pullup).
- * PD1 - PIN1 (input pullup).
- * PD2 - PIN2 (input pullup).
- * PD3 - PIN3 (input pullup).
- * PD4 - PIN4 (input pullup).
- * PD5 - PIN5 (input pullup).
- * PD6 - PIN6 (input pullup).
- * PD7 - PIN7 (input pullup).
- * PD8 - PIN8 (input pullup).
- * PD9 - PIN9 (input pullup).
- * PD10 - PIN10 (input pullup).
- * PD11 - PIN11 (input pullup).
- * PD12 - PIN12 (input pullup).
- * PD13 - PIN13 (input pullup).
- * PD14 - PIN14 (input pullup).
- * PD15 - PIN15 (input pullup).
- */
-#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
- PIN_MODE_INPUT(GPIOD_PIN1) | \
- PIN_MODE_INPUT(GPIOD_PIN2) | \
- PIN_MODE_INPUT(GPIOD_PIN3) | \
- PIN_MODE_INPUT(GPIOD_PIN4) | \
- PIN_MODE_INPUT(GPIOD_PIN5) | \
- PIN_MODE_INPUT(GPIOD_PIN6) | \
- PIN_MODE_INPUT(GPIOD_PIN7) | \
- PIN_MODE_INPUT(GPIOD_PIN8) | \
- PIN_MODE_INPUT(GPIOD_PIN9) | \
- PIN_MODE_INPUT(GPIOD_PIN10) | \
- PIN_MODE_INPUT(GPIOD_PIN11) | \
- PIN_MODE_INPUT(GPIOD_PIN12) | \
- PIN_MODE_INPUT(GPIOD_PIN13) | \
- PIN_MODE_INPUT(GPIOD_PIN14) | \
- PIN_MODE_INPUT(GPIOD_PIN15))
-#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
-#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOD_PIN15))
-#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOD_PIN15))
-#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
- PIN_ODR_HIGH(GPIOD_PIN1) | \
- PIN_ODR_HIGH(GPIOD_PIN2) | \
- PIN_ODR_HIGH(GPIOD_PIN3) | \
- PIN_ODR_HIGH(GPIOD_PIN4) | \
- PIN_ODR_HIGH(GPIOD_PIN5) | \
- PIN_ODR_HIGH(GPIOD_PIN6) | \
- PIN_ODR_HIGH(GPIOD_PIN7) | \
- PIN_ODR_HIGH(GPIOD_PIN8) | \
- PIN_ODR_HIGH(GPIOD_PIN9) | \
- PIN_ODR_HIGH(GPIOD_PIN10) | \
- PIN_ODR_HIGH(GPIOD_PIN11) | \
- PIN_ODR_HIGH(GPIOD_PIN12) | \
- PIN_ODR_HIGH(GPIOD_PIN13) | \
- PIN_ODR_HIGH(GPIOD_PIN14) | \
- PIN_ODR_HIGH(GPIOD_PIN15))
-#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN7, 0U))
-#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOD_PIN15, 0U))
-
-/*
- * GPIOE setup:
- *
- * PE0 - L3GD20_INT1 (input pullup).
- * PE1 - L3GD20_INT2 (input pullup).
- * PE2 - LSM303DLHC_DRDY (input pullup).
- * PE3 - SPI1_CS L3GD20_CS (output pushpull maximum).
- * PE4 - LSM303DLHC_INT1 (input pullup).
- * PE5 - LSM303DLHC_INT2 (input pullup).
- * PE6 - PIN6 (input pullup).
- * PE7 - PIN7 (input pullup).
- * PE8 - LED4_BLUE (output pushpull maximum).
- * PE9 - LED3_RED (output pushpull maximum).
- * PE10 - LED5_ORANGE (output pushpull maximum).
- * PE11 - LED7_GREEN (output pushpull maximum).
- * PE12 - LED9_BLUE (output pushpull maximum).
- * PE13 - LED10_RED (output pushpull maximum).
- * PE14 - LED8_ORANGE (output pushpull maximum).
- * PE15 - LED6_GREEN (output pushpull maximum).
- */
-#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_L3GD20_INT1) | \
- PIN_MODE_INPUT(GPIOE_L3GD20_INT2) | \
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_DRDY) |\
- PIN_MODE_OUTPUT(GPIOE_SPI1_CS) | \
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_INT1) |\
- PIN_MODE_INPUT(GPIOE_LSM303DLHC_INT2) |\
- PIN_MODE_INPUT(GPIOE_PIN6) | \
- PIN_MODE_INPUT(GPIOE_PIN7) | \
- PIN_MODE_OUTPUT(GPIOE_LED4_BLUE) | \
- PIN_MODE_OUTPUT(GPIOE_LED3_RED) | \
- PIN_MODE_OUTPUT(GPIOE_LED5_ORANGE) | \
- PIN_MODE_OUTPUT(GPIOE_LED7_GREEN) | \
- PIN_MODE_OUTPUT(GPIOE_LED9_BLUE) | \
- PIN_MODE_OUTPUT(GPIOE_LED10_RED) | \
- PIN_MODE_OUTPUT(GPIOE_LED8_ORANGE) | \
- PIN_MODE_OUTPUT(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT1) |\
- PIN_OTYPE_PUSHPULL(GPIOE_L3GD20_INT2) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_DRDY) |\
- PIN_OTYPE_PUSHPULL(GPIOE_SPI1_CS) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT1) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LSM303DLHC_INT2) |\
- PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED4_BLUE) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED3_RED) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED5_ORANGE) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LED7_GREEN) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED9_BLUE) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED10_RED) | \
- PIN_OTYPE_PUSHPULL(GPIOE_LED8_ORANGE) |\
- PIN_OTYPE_PUSHPULL(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_L3GD20_INT1) |\
- PIN_OSPEED_VERYLOW(GPIOE_L3GD20_INT2) |\
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_DRDY) |\
- PIN_OSPEED_HIGH(GPIOE_SPI1_CS) | \
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_INT1) |\
- PIN_OSPEED_VERYLOW(GPIOE_LSM303DLHC_INT2) |\
- PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
- PIN_OSPEED_HIGH(GPIOE_LED4_BLUE) | \
- PIN_OSPEED_HIGH(GPIOE_LED3_RED) | \
- PIN_OSPEED_HIGH(GPIOE_LED5_ORANGE) | \
- PIN_OSPEED_HIGH(GPIOE_LED7_GREEN) | \
- PIN_OSPEED_HIGH(GPIOE_LED9_BLUE) | \
- PIN_OSPEED_HIGH(GPIOE_LED10_RED) | \
- PIN_OSPEED_HIGH(GPIOE_LED8_ORANGE) | \
- PIN_OSPEED_HIGH(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT1) | \
- PIN_PUPDR_PULLUP(GPIOE_L3GD20_INT2) | \
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_DRDY) |\
- PIN_PUPDR_FLOATING(GPIOE_SPI1_CS) | \
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT1) |\
- PIN_PUPDR_PULLUP(GPIOE_LSM303DLHC_INT2) |\
- PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOE_LED4_BLUE) | \
- PIN_PUPDR_PULLUP(GPIOE_LED3_RED) | \
- PIN_PUPDR_PULLUP(GPIOE_LED5_ORANGE) | \
- PIN_PUPDR_FLOATING(GPIOE_LED7_GREEN) | \
- PIN_PUPDR_PULLUP(GPIOE_LED9_BLUE) | \
- PIN_PUPDR_FLOATING(GPIOE_LED10_RED) | \
- PIN_PUPDR_FLOATING(GPIOE_LED8_ORANGE) |\
- PIN_PUPDR_FLOATING(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_L3GD20_INT1) | \
- PIN_ODR_HIGH(GPIOE_L3GD20_INT2) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_DRDY) | \
- PIN_ODR_HIGH(GPIOE_SPI1_CS) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT1) | \
- PIN_ODR_HIGH(GPIOE_LSM303DLHC_INT2) | \
- PIN_ODR_HIGH(GPIOE_PIN6) | \
- PIN_ODR_HIGH(GPIOE_PIN7) | \
- PIN_ODR_LOW(GPIOE_LED4_BLUE) | \
- PIN_ODR_LOW(GPIOE_LED3_RED) | \
- PIN_ODR_LOW(GPIOE_LED5_ORANGE) | \
- PIN_ODR_LOW(GPIOE_LED7_GREEN) | \
- PIN_ODR_LOW(GPIOE_LED9_BLUE) | \
- PIN_ODR_LOW(GPIOE_LED10_RED) | \
- PIN_ODR_LOW(GPIOE_LED8_ORANGE) | \
- PIN_ODR_LOW(GPIOE_LED6_GREEN))
-#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_L3GD20_INT1, 0U) | \
- PIN_AFIO_AF(GPIOE_L3GD20_INT2, 0U) | \
- PIN_AFIO_AF(GPIOE_LSM303DLHC_DRDY, 0U) |\
- PIN_AFIO_AF(GPIOE_SPI1_CS, 0U) | \
- PIN_AFIO_AF(GPIOE_LSM303DLHC_INT1, 0U) |\
- PIN_AFIO_AF(GPIOE_LSM303DLHC_INT2, 0U) |\
- PIN_AFIO_AF(GPIOE_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOE_PIN7, 0U))
-#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_LED4_BLUE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED3_RED, 0U) | \
- PIN_AFIO_AF(GPIOE_LED5_ORANGE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED7_GREEN, 0U) | \
- PIN_AFIO_AF(GPIOE_LED9_BLUE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED10_RED, 0U) | \
- PIN_AFIO_AF(GPIOE_LED8_ORANGE, 0U) | \
- PIN_AFIO_AF(GPIOE_LED6_GREEN, 0U))
-
-/*
- * GPIOF setup:
- *
- * PF0 - OSC_IN (input floating).
- * PF1 - OSC_OUT (input floating).
- * PF2 - PIN2 (input pullup).
- * PF3 - PIN3 (input pullup).
- * PF4 - PIN4 (input pullup).
- * PF5 - PIN5 (input pullup).
- * PF6 - PIN6 (input pullup).
- * PF7 - PIN7 (input pullup).
- * PF8 - PIN8 (input pullup).
- * PF9 - PIN9 (input pullup).
- * PF10 - PIN10 (input pullup).
- * PF11 - PIN11 (input pullup).
- * PF12 - PIN12 (input pullup).
- * PF13 - PIN13 (input pullup).
- * PF14 - PIN14 (input pullup).
- * PF15 - PIN15 (input pullup).
- */
-#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_OSC_IN) | \
- PIN_MODE_INPUT(GPIOF_OSC_OUT) | \
- PIN_MODE_INPUT(GPIOF_PIN2) | \
- PIN_MODE_INPUT(GPIOF_PIN3) | \
- PIN_MODE_INPUT(GPIOF_PIN4) | \
- PIN_MODE_INPUT(GPIOF_PIN5) | \
- PIN_MODE_INPUT(GPIOF_PIN6) | \
- PIN_MODE_INPUT(GPIOF_PIN7) | \
- PIN_MODE_INPUT(GPIOF_PIN8) | \
- PIN_MODE_INPUT(GPIOF_PIN9) | \
- PIN_MODE_INPUT(GPIOF_PIN10) | \
- PIN_MODE_INPUT(GPIOF_PIN11) | \
- PIN_MODE_INPUT(GPIOF_PIN12) | \
- PIN_MODE_INPUT(GPIOF_PIN13) | \
- PIN_MODE_INPUT(GPIOF_PIN14) | \
- PIN_MODE_INPUT(GPIOF_PIN15))
-#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_OSC_IN) | \
- PIN_OTYPE_PUSHPULL(GPIOF_OSC_OUT) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
-#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_OSC_IN) | \
- PIN_OSPEED_HIGH(GPIOF_OSC_OUT) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOF_PIN15))
-#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_OSC_IN) | \
- PIN_PUPDR_FLOATING(GPIOF_OSC_OUT) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOF_PIN15))
-#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_OSC_IN) | \
- PIN_ODR_HIGH(GPIOF_OSC_OUT) | \
- PIN_ODR_HIGH(GPIOF_PIN2) | \
- PIN_ODR_HIGH(GPIOF_PIN3) | \
- PIN_ODR_HIGH(GPIOF_PIN4) | \
- PIN_ODR_HIGH(GPIOF_PIN5) | \
- PIN_ODR_HIGH(GPIOF_PIN6) | \
- PIN_ODR_HIGH(GPIOF_PIN7) | \
- PIN_ODR_HIGH(GPIOF_PIN8) | \
- PIN_ODR_HIGH(GPIOF_PIN9) | \
- PIN_ODR_HIGH(GPIOF_PIN10) | \
- PIN_ODR_HIGH(GPIOF_PIN11) | \
- PIN_ODR_HIGH(GPIOF_PIN12) | \
- PIN_ODR_HIGH(GPIOF_PIN13) | \
- PIN_ODR_HIGH(GPIOF_PIN14) | \
- PIN_ODR_HIGH(GPIOF_PIN15))
-#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_OSC_IN, 0U) | \
- PIN_AFIO_AF(GPIOF_OSC_OUT, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN7, 0U))
-#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOF_PIN15, 0U))
-
-/*
- * GPIOG setup:
- *
- * PG0 - PIN0 (input pullup).
- * PG1 - PIN1 (input pullup).
- * PG2 - PIN2 (input pullup).
- * PG3 - PIN3 (input pullup).
- * PG4 - PIN4 (input pullup).
- * PG5 - PIN5 (input pullup).
- * PG6 - PIN6 (input pullup).
- * PG7 - PIN7 (input pullup).
- * PG8 - PIN8 (input pullup).
- * PG9 - PIN9 (input pullup).
- * PG10 - PIN10 (input pullup).
- * PG11 - PIN11 (input pullup).
- * PG12 - PIN12 (input pullup).
- * PG13 - PIN13 (input pullup).
- * PG14 - PIN14 (input pullup).
- * PG15 - PIN15 (input pullup).
- */
-#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
- PIN_MODE_INPUT(GPIOG_PIN1) | \
- PIN_MODE_INPUT(GPIOG_PIN2) | \
- PIN_MODE_INPUT(GPIOG_PIN3) | \
- PIN_MODE_INPUT(GPIOG_PIN4) | \
- PIN_MODE_INPUT(GPIOG_PIN5) | \
- PIN_MODE_INPUT(GPIOG_PIN6) | \
- PIN_MODE_INPUT(GPIOG_PIN7) | \
- PIN_MODE_INPUT(GPIOG_PIN8) | \
- PIN_MODE_INPUT(GPIOG_PIN9) | \
- PIN_MODE_INPUT(GPIOG_PIN10) | \
- PIN_MODE_INPUT(GPIOG_PIN11) | \
- PIN_MODE_INPUT(GPIOG_PIN12) | \
- PIN_MODE_INPUT(GPIOG_PIN13) | \
- PIN_MODE_INPUT(GPIOG_PIN14) | \
- PIN_MODE_INPUT(GPIOG_PIN15))
-#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
-#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOG_PIN15))
-#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOG_PIN15))
-#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
- PIN_ODR_HIGH(GPIOG_PIN1) | \
- PIN_ODR_HIGH(GPIOG_PIN2) | \
- PIN_ODR_HIGH(GPIOG_PIN3) | \
- PIN_ODR_HIGH(GPIOG_PIN4) | \
- PIN_ODR_HIGH(GPIOG_PIN5) | \
- PIN_ODR_HIGH(GPIOG_PIN6) | \
- PIN_ODR_HIGH(GPIOG_PIN7) | \
- PIN_ODR_HIGH(GPIOG_PIN8) | \
- PIN_ODR_HIGH(GPIOG_PIN9) | \
- PIN_ODR_HIGH(GPIOG_PIN10) | \
- PIN_ODR_HIGH(GPIOG_PIN11) | \
- PIN_ODR_HIGH(GPIOG_PIN12) | \
- PIN_ODR_HIGH(GPIOG_PIN13) | \
- PIN_ODR_HIGH(GPIOG_PIN14) | \
- PIN_ODR_HIGH(GPIOG_PIN15))
-#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN7, 0U))
-#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOG_PIN15, 0U))
-
-/*
- * GPIOH setup:
- *
- * PH0 - PIN0 (input pullup).
- * PH1 - PIN1 (input pullup).
- * PH2 - PIN2 (input pullup).
- * PH3 - PIN3 (input pullup).
- * PH4 - PIN4 (input pullup).
- * PH5 - PIN5 (input pullup).
- * PH6 - PIN6 (input pullup).
- * PH7 - PIN7 (input pullup).
- * PH8 - PIN8 (input pullup).
- * PH9 - PIN9 (input pullup).
- * PH10 - PIN10 (input pullup).
- * PH11 - PIN11 (input pullup).
- * PH12 - PIN12 (input pullup).
- * PH13 - PIN13 (input pullup).
- * PH14 - PIN14 (input pullup).
- * PH15 - PIN15 (input pullup).
- */
-#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
- PIN_MODE_INPUT(GPIOH_PIN1) | \
- PIN_MODE_INPUT(GPIOH_PIN2) | \
- PIN_MODE_INPUT(GPIOH_PIN3) | \
- PIN_MODE_INPUT(GPIOH_PIN4) | \
- PIN_MODE_INPUT(GPIOH_PIN5) | \
- PIN_MODE_INPUT(GPIOH_PIN6) | \
- PIN_MODE_INPUT(GPIOH_PIN7) | \
- PIN_MODE_INPUT(GPIOH_PIN8) | \
- PIN_MODE_INPUT(GPIOH_PIN9) | \
- PIN_MODE_INPUT(GPIOH_PIN10) | \
- PIN_MODE_INPUT(GPIOH_PIN11) | \
- PIN_MODE_INPUT(GPIOH_PIN12) | \
- PIN_MODE_INPUT(GPIOH_PIN13) | \
- PIN_MODE_INPUT(GPIOH_PIN14) | \
- PIN_MODE_INPUT(GPIOH_PIN15))
-#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
- PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
-#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
- PIN_OSPEED_VERYLOW(GPIOH_PIN15))
-#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
- PIN_PUPDR_PULLUP(GPIOH_PIN15))
-#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
- PIN_ODR_HIGH(GPIOH_PIN1) | \
- PIN_ODR_HIGH(GPIOH_PIN2) | \
- PIN_ODR_HIGH(GPIOH_PIN3) | \
- PIN_ODR_HIGH(GPIOH_PIN4) | \
- PIN_ODR_HIGH(GPIOH_PIN5) | \
- PIN_ODR_HIGH(GPIOH_PIN6) | \
- PIN_ODR_HIGH(GPIOH_PIN7) | \
- PIN_ODR_HIGH(GPIOH_PIN8) | \
- PIN_ODR_HIGH(GPIOH_PIN9) | \
- PIN_ODR_HIGH(GPIOH_PIN10) | \
- PIN_ODR_HIGH(GPIOH_PIN11) | \
- PIN_ODR_HIGH(GPIOH_PIN12) | \
- PIN_ODR_HIGH(GPIOH_PIN13) | \
- PIN_ODR_HIGH(GPIOH_PIN14) | \
- PIN_ODR_HIGH(GPIOH_PIN15))
-#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN1, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN2, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN3, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN4, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN5, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN6, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN7, 0U))
-#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN9, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN10, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN11, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN12, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN13, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN14, 0U) | \
- PIN_AFIO_AF(GPIOH_PIN15, 0U))
-
-/*===========================================================================*/
-/* External declarations. */
-/*===========================================================================*/
-
-#if !defined(_FROM_ASM_)
-#ifdef __cplusplus
-extern "C" {
-#endif
- void boardInit(void);
-#ifdef __cplusplus
-}
-#endif
-#endif /* _FROM_ASM_ */
-
-#endif /* BOARD_H */
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk
deleted file mode 100644
index a3850f254..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-# List of all the board related files.
-BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/board.c
-
-# Required include directories
-BOARDINC = $(CHIBIOS)/os/hal/boards/ST_STM32F3_DISCOVERY_REVC
-
-# Shared variables
-ALLCSRC += $(BOARDSRC)
-ALLINC += $(BOARDINC)
diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg
deleted file mode 100644
index e54402fc6..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.chcfg
+++ /dev/null
@@ -1,1060 +0,0 @@
-
-
-
-
- resources/gencfg/processors/boards/stm32f3xx/templates
- $(CHIBIOS)/os/hal/boards/
- ..
- 5.0.x
-
- STMicroelectronics STM32F3-Discovery
- ST_STM32F3_DISCOVERY_REVC
-
- STM32F303xC
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diff --git a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp b/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp
deleted file mode 100644
index 6967f302d..000000000
--- a/os/hal/boards/ST_STM32F3_DISCOVERY_REVC/cfg/board.fmpp
+++ /dev/null
@@ -1,15 +0,0 @@
-sourceRoot: ../../../../../tools/ftl/processors/boards/stm32f3xx/templates
-outputRoot: ..
-dataRoot: .
-
-freemarkerLinks: {
- lib: ../../../../../tools/ftl/libs
-}
-
-data : {
- doc1:xml (
- board.chcfg
- {
- }
- )
-}