From a3bc53d6a73c05585d9ec0bae43a2cd35a92bed5 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Tue, 21 Apr 2020 09:05:22 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13548 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../cfg/mcuconf.h | 45 ++---------------- .../cfg/mcuconf.h | 42 +---------------- .../RT-STM32L552ZE-NUCLEO144/cfg/mcuconf.h | 47 ++++--------------- .../cfg/stm32l552ze_nucleo144/mcuconf.h | 47 ++++--------------- .../cfg/stm32l552ze_nucleo144_alt/mcuconf.h | 47 ++++--------------- 5 files changed, 30 insertions(+), 198 deletions(-) diff --git a/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_GUEST/cfg/mcuconf.h b/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_GUEST/cfg/mcuconf.h index 59ffe882d..ed1711c90 100644 --- a/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_GUEST/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_GUEST/cfg/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -22,8 +22,7 @@ * driver is enabled in halconf.h. * * IRQ priorities: - * 7...0 Lowest...Highest (non-secure mode). - * 3...0 Lowest...Highest (secure mode). + * 7...0 Lowest...Highest. * * DMA priorities: * 0...3 Lowest...Highest. @@ -66,6 +65,7 @@ /* * Clock settings. */ +#define STM32_RCC_SECCFGR (RCC_SECCFGR_MSISEC | RCC_SECCFGR_PLLSEC | RCC_SECCFGR_SYSCLKSEC | RCC_SECCFGR_PRESCSEC) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_LSI_ENABLED TRUE @@ -262,22 +262,6 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 5 -#define STM32_SPI_SPI2_IRQ_PRIORITY 5 -#define STM32_SPI_SPI3_IRQ_PRIORITY 5 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* * ST driver system settings. @@ -288,32 +272,10 @@ /* * TRNG driver system settings. */ -#define STM32_TRNG_USE_RNG1 FALSE /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -329,3 +291,4 @@ */ #endif /* MCUCONF_H */ + diff --git a/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_HOST/cfg/mcuconf.h b/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_HOST/cfg/mcuconf.h index 2c3dd8345..492b10640 100644 --- a/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_HOST/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L552ZE-NUCLEO144-TZ_HOST/cfg/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -23,7 +23,6 @@ * * IRQ priorities: * 7...0 Lowest...Highest. - * 3...0 Lowest...Highest (trusted mode). * * DMA priorities: * 0...3 Lowest...Highest. @@ -263,22 +262,6 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 5 -#define STM32_SPI_SPI2_IRQ_PRIORITY 5 -#define STM32_SPI_SPI3_IRQ_PRIORITY 5 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* * ST driver system settings. @@ -289,32 +272,10 @@ /* * TRNG driver system settings. */ -#define STM32_TRNG_USE_RNG1 FALSE /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -330,3 +291,4 @@ */ #endif /* MCUCONF_H */ + diff --git a/demos/STM32/RT-STM32L552ZE-NUCLEO144/cfg/mcuconf.h b/demos/STM32/RT-STM32L552ZE-NUCLEO144/cfg/mcuconf.h index 533bccb8b..a70dd676a 100644 --- a/demos/STM32/RT-STM32L552ZE-NUCLEO144/cfg/mcuconf.h +++ b/demos/STM32/RT-STM32L552ZE-NUCLEO144/cfg/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -35,6 +35,11 @@ #define STM32L552_MCUCONF #define STM32L562_MCUCONF +/* + * Secure mode HAL settings. + */ +#define STM32_SECURE_MODE TRUE + /* * HAL driver global settings. */ @@ -60,6 +65,7 @@ /* * Clock settings. */ +#define STM32_RCC_SECCFGR (RCC_SECCFGR_MSISEC | RCC_SECCFGR_PLLSEC | RCC_SECCFGR_SYSCLKSEC | RCC_SECCFGR_PRESCSEC) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_LSI_ENABLED TRUE @@ -256,22 +262,6 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 5 -#define STM32_SPI_SPI2_IRQ_PRIORITY 5 -#define STM32_SPI_SPI3_IRQ_PRIORITY 5 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* * ST driver system settings. @@ -282,32 +272,10 @@ /* * TRNG driver system settings. */ -#define STM32_TRNG_USE_RNG1 FALSE /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -323,3 +291,4 @@ */ #endif /* MCUCONF_H */ + diff --git a/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144/mcuconf.h b/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144/mcuconf.h index 533bccb8b..a70dd676a 100644 --- a/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144/mcuconf.h +++ b/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -35,6 +35,11 @@ #define STM32L552_MCUCONF #define STM32L562_MCUCONF +/* + * Secure mode HAL settings. + */ +#define STM32_SECURE_MODE TRUE + /* * HAL driver global settings. */ @@ -60,6 +65,7 @@ /* * Clock settings. */ +#define STM32_RCC_SECCFGR (RCC_SECCFGR_MSISEC | RCC_SECCFGR_PLLSEC | RCC_SECCFGR_SYSCLKSEC | RCC_SECCFGR_PRESCSEC) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_LSI_ENABLED TRUE @@ -256,22 +262,6 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 5 -#define STM32_SPI_SPI2_IRQ_PRIORITY 5 -#define STM32_SPI_SPI3_IRQ_PRIORITY 5 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* * ST driver system settings. @@ -282,32 +272,10 @@ /* * TRNG driver system settings. */ -#define STM32_TRNG_USE_RNG1 FALSE /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -323,3 +291,4 @@ */ #endif /* MCUCONF_H */ + diff --git a/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144_alt/mcuconf.h b/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144_alt/mcuconf.h index 533bccb8b..a70dd676a 100644 --- a/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144_alt/mcuconf.h +++ b/demos/various/RT-TEST-Latency/cfg/stm32l552ze_nucleo144_alt/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -35,6 +35,11 @@ #define STM32L552_MCUCONF #define STM32L562_MCUCONF +/* + * Secure mode HAL settings. + */ +#define STM32_SECURE_MODE TRUE + /* * HAL driver global settings. */ @@ -60,6 +65,7 @@ /* * Clock settings. */ +#define STM32_RCC_SECCFGR (RCC_SECCFGR_MSISEC | RCC_SECCFGR_PLLSEC | RCC_SECCFGR_SYSCLKSEC | RCC_SECCFGR_PRESCSEC) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_LSI_ENABLED TRUE @@ -256,22 +262,6 @@ /* * SPI driver system settings. */ -#define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI2 FALSE -#define STM32_SPI_USE_SPI3 FALSE -#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI2_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 -#define STM32_SPI_SPI1_IRQ_PRIORITY 5 -#define STM32_SPI_SPI2_IRQ_PRIORITY 5 -#define STM32_SPI_SPI3_IRQ_PRIORITY 5 -#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* * ST driver system settings. @@ -282,32 +272,10 @@ /* * TRNG driver system settings. */ -#define STM32_TRNG_USE_RNG1 FALSE /* * UART driver system settings. */ -#define STM32_UART_USE_USART1 FALSE -#define STM32_UART_USE_USART2 FALSE -#define STM32_UART_USE_USART3 FALSE -#define STM32_UART_USE_UART4 FALSE -#define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY -#define STM32_UART_USART1_DMA_PRIORITY 0 -#define STM32_UART_USART2_DMA_PRIORITY 0 -#define STM32_UART_USART3_DMA_PRIORITY 0 -#define STM32_UART_UART4_DMA_PRIORITY 0 -#define STM32_UART_UART5_DMA_PRIORITY 0 -#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") /* * USB driver system settings. @@ -323,3 +291,4 @@ */ #endif /* MCUCONF_H */ +