From a547fcbb9502656cb29fc0f113d72ce995a19f7d Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Wed, 18 Mar 2020 11:30:48 +0000 Subject: [PATCH] More benchmarks. git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@13449 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../STM32/NIL-STM32H755ZI-NUCLEO144/.cproject | 55 ++ .../STM32/NIL-STM32H755ZI-NUCLEO144/.project | 95 ++++ .../STM32/NIL-STM32H755ZI-NUCLEO144/Makefile | 189 +++++++ .../NIL-STM32H755ZI-NUCLEO144/cfg/chconf.h | 479 ++++++++++++++++ .../NIL-STM32H755ZI-NUCLEO144/cfg/halconf.h | 531 ++++++++++++++++++ .../NIL-STM32H755ZI-NUCLEO144/cfg/mcuconf.h | 484 ++++++++++++++++ ...-NUCLEO144 (OpenOCD, Flash and Run).launch | 53 ++ demos/STM32/NIL-STM32H755ZI-NUCLEO144/main.c | 104 ++++ .../benchmarks/nil-stm32h7-480mhz-gcc-fpu.txt | 275 +++++++++ .../benchmarks/nil-stm32h7-480mhz-gcc.txt | 275 +++++++++ .../benchmarks/rt-stm32g0-64mhz-gcc.txt | 372 ++++++++++++ .../benchmarks/rt-stm32g4-170mhz-gcc-fpu.txt | 372 ++++++++++++ .../benchmarks/rt-stm32g4-170mhz-gcc.txt | 372 ++++++++++++ .../benchmarks/rt-stm32h7-480mhz-gcc-fpu.txt | 372 ++++++++++++ .../benchmarks/rt-stm32h7-480mhz-gcc.txt | 372 ++++++++++++ 15 files changed, 4400 insertions(+) create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/.cproject create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/.project create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/Makefile create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/chconf.h create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/halconf.h create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/mcuconf.h create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/debug/NIL-STM32H755ZI-NUCLEO144 (OpenOCD, Flash and Run).launch create mode 100644 demos/STM32/NIL-STM32H755ZI-NUCLEO144/main.c create mode 100644 doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc-fpu.txt create mode 100644 doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc.txt create mode 100644 doc/rt/reports/benchmarks/rt-stm32g0-64mhz-gcc.txt create mode 100644 doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc-fpu.txt create mode 100644 doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc.txt create mode 100644 doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc-fpu.txt create mode 100644 doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc.txt diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.cproject b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.cproject new file mode 100644 index 000000000..196ce50b0 --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.cproject @@ -0,0 +1,55 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.project b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.project new file mode 100644 index 000000000..49dd7a656 --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/.project @@ -0,0 +1,95 @@ + + + NIL-STM32H755ZI-NUCLEO144 + + + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + clean,full,incremental, + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + mingw32-make + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + false + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + + + board + 2 + CHIBIOS/os/hal/boards/ST_STM32F3_DISCOVERY + + + os + 2 + CHIBIOS/os + + + test + 2 + CHIBIOS/test + + + diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/Makefile b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/Makefile new file mode 100644 index 000000000..6aac08a31 --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/Makefile @@ -0,0 +1,189 @@ +############################################################################## +# Build global options +# NOTE: Can be overridden externally. +# + +# Compiler options here. +ifeq ($(USE_OPT),) + USE_OPT = -O2 -ggdb -fomit-frame-pointer -falign-functions=16 +endif + +# C specific options here (added to USE_OPT). +ifeq ($(USE_COPT),) + USE_COPT = +endif + +# C++ specific options here (added to USE_OPT). +ifeq ($(USE_CPPOPT),) + USE_CPPOPT = -fno-rtti +endif + +# Enable this if you want the linker to remove unused code and data. +ifeq ($(USE_LINK_GC),) + USE_LINK_GC = yes +endif + +# Linker extra options here. +ifeq ($(USE_LDOPT),) + USE_LDOPT = +endif + +# Enable this if you want link time optimizations (LTO). +ifeq ($(USE_LTO),) + USE_LTO = yes +endif + +# Enable this if you want to see the full log while compiling. +ifeq ($(USE_VERBOSE_COMPILE),) + USE_VERBOSE_COMPILE = no +endif + +# If enabled, this option makes the build process faster by not compiling +# modules not used in the current configuration. +ifeq ($(USE_SMART_BUILD),) + USE_SMART_BUILD = yes +endif + +# +# Build global options +############################################################################## + +############################################################################## +# Architecture or project specific options +# + +# Stack size to be allocated to the Cortex-M process stack. This stack is +# the stack used by the main() thread. +ifeq ($(USE_PROCESS_STACKSIZE),) + USE_PROCESS_STACKSIZE = 0x400 +endif + +# Stack size to the allocated to the Cortex-M main/exceptions stack. This +# stack is used for processing interrupts and exceptions. +ifeq ($(USE_EXCEPTIONS_STACKSIZE),) + USE_EXCEPTIONS_STACKSIZE = 0x400 +endif + +# Enables the use of FPU (no, softfp, hard). +ifeq ($(USE_FPU),) + USE_FPU = no +endif + +# FPU-related options. +ifeq ($(USE_FPU_OPT),) + USE_FPU_OPT = -mfloat-abi=$(USE_FPU) -mfpu=fpv5-d16 +endif + +# +# Architecture or project specific options +############################################################################## + +############################################################################## +# Project, target, sources and paths +# + +# Define project name here +PROJECT = ch + +# Target settings. +MCU = cortex-m7 + +# Imported source files and paths. +CHIBIOS := ../../.. +CONFDIR := ./cfg +BUILDDIR := ./build +DEPDIR := ./.dep + +# Licensing files. +include $(CHIBIOS)/os/license/license.mk +# Startup files. +include $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk/startup_stm32h7xx.mk +# HAL-OSAL files (optional). +include $(CHIBIOS)/os/hal/hal.mk +include $(CHIBIOS)/os/hal/ports/STM32/STM32H7xx/platform.mk +include $(CHIBIOS)/os/hal/boards/ST_NUCLEO144_H755ZI/board.mk +include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk +# RTOS files (optional). +include $(CHIBIOS)/os/nil/nil.mk +include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk +# Auto-build files in ./source recursively. +include $(CHIBIOS)/tools/mk/autobuild.mk +# Other files (optional). +include $(CHIBIOS)/test/lib/test.mk +include $(CHIBIOS)/test/nil/nil_test.mk +include $(CHIBIOS)/test/oslib/oslib_test.mk + +# Define linker script file here +LDSCRIPT= $(STARTUPLD)/STM32H755xI_M7.ld + +# C sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CSRC = $(ALLCSRC) \ + $(TESTSRC) \ + main.c + +# C++ sources that can be compiled in ARM or THUMB mode depending on the global +# setting. +CPPSRC = $(ALLCPPSRC) + +# List ASM source files here. +ASMSRC = $(ALLASMSRC) + +# List ASM with preprocessor source files here. +ASMXSRC = $(ALLXASMSRC) + +# Inclusion directories. +INCDIR = $(CONFDIR) $(ALLINC) $(TESTINC) + +# Define C warning options here. +CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes + +# Define C++ warning options here. +CPPWARN = -Wall -Wextra -Wundef + +# +# Project, target, sources and paths +############################################################################## + +############################################################################## +# Start of user section +# + +# List all user C define here, like -D_DEBUG=1 +UDEFS = -DCORE_CM7 + +# Define ASM defines here +UADEFS = + +# List all user directories here +UINCDIR = + +# List the user directory to look for the libraries here +ULIBDIR = + +# List all user libraries here +ULIBS = + +# +# End of user section +############################################################################## + +############################################################################## +# Common rules +# + +RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC/mk +include $(RULESPATH)/arm-none-eabi.mk +include $(RULESPATH)/rules.mk + +# +# Common rules +############################################################################## + +############################################################################## +# Custom rules +# + +# +# Custom rules +############################################################################## diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/chconf.h b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/chconf.h new file mode 100644 index 000000000..924b7fb9e --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/chconf.h @@ -0,0 +1,479 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file nil/templates/chconf.h + * @brief Configuration file template. + * @details A copy of this file must be placed in each project directory, it + * contains the application specific kernel settings. + * + * @addtogroup NIL_CONFIG + * @details Kernel related settings and hooks. + * @{ + */ + +#ifndef CHCONF_H +#define CHCONF_H + +#define _CHIBIOS_NIL_CONF_ +#define _CHIBIOS_NIL_CONF_VER_4_0_ + +/*===========================================================================*/ +/** + * @name Kernel parameters and options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Maximum number of user threads in the application. + * @note This number is not inclusive of the idle thread which is + * implicitly handled. + * @note Set this value to be exactly equal to the number of threads you + * will use or you would be wasting RAM and cycles. + * @note This values also defines the number of available priorities + * (0..CH_CFG_MAX_THREADS-1). + */ +#if !defined(CH_CFG_MAX_THREADS) +#define CH_CFG_MAX_THREADS 8 +#endif + +/** + * @brief Auto starts threads when @p chSysInit() is invoked. + */ +#if !defined(CH_CFG_AUTOSTART_THREADS) +#define CH_CFG_AUTOSTART_THREADS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name System timer settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System time counter resolution. + * @note Allowed values are 16 or 32 bits. + */ +#if !defined(CH_CFG_ST_RESOLUTION) +#define CH_CFG_ST_RESOLUTION 32 +#endif + +/** + * @brief System tick frequency. + * @note This value together with the @p CH_CFG_ST_RESOLUTION + * option defines the maximum amount of time allowed for + * timeouts. + */ +#if !defined(CH_CFG_ST_FREQUENCY) +#define CH_CFG_ST_FREQUENCY 5000 +#endif + +/** + * @brief Time delta constant for the tick-less mode. + * @note If this value is zero then the system uses the classic + * periodic tick. This value represents the minimum number + * of ticks that is safe to specify in a timeout directive. + * The value one is not valid, timeouts are rounded up to + * this value. + */ +#if !defined(CH_CFG_ST_TIMEDELTA) +#define CH_CFG_ST_TIMEDELTA 2 +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Subsystem options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Threads synchronization APIs. + * @details If enabled then the @p chThdWait() function is included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_WAITEXIT) +#define CH_CFG_USE_WAITEXIT TRUE +#endif + +/** + * @brief Semaphores APIs. + * @details If enabled then the Semaphores APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_SEMAPHORES) +#define CH_CFG_USE_SEMAPHORES TRUE +#endif + +/** + * @brief Mutexes APIs. + * @details If enabled then the mutexes APIs are included in the kernel. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_MUTEXES) +#define CH_CFG_USE_MUTEXES FALSE +#endif + +/** + * @brief Events Flags APIs. + * @details If enabled then the event flags APIs are included in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_EVENTS) +#define CH_CFG_USE_EVENTS TRUE +#endif + +/** + * @brief Synchronous Messages APIs. + * @details If enabled then the synchronous messages APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MESSAGES) +#define CH_CFG_USE_MESSAGES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name OSLIB options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Mailboxes APIs. + * @details If enabled then the asynchronous messages (mailboxes) APIs are + * included in the kernel. + * + * @note The default is @p TRUE. + * @note Requires @p CH_CFG_USE_SEMAPHORES. + */ +#if !defined(CH_CFG_USE_MAILBOXES) +#define CH_CFG_USE_MAILBOXES TRUE +#endif + +/** + * @brief Core Memory Manager APIs. + * @details If enabled then the core memory manager APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMCORE) +#define CH_CFG_USE_MEMCORE TRUE +#endif + +/** + * @brief Managed RAM size. + * @details Size of the RAM area to be managed by the OS. If set to zero + * then the whole available RAM is used. The core memory is made + * available to the heap allocator and/or can be used directly through + * the simplified core memory allocator. + * + * @note In order to let the OS manage the whole RAM the linker script must + * provide the @p __heap_base__ and @p __heap_end__ symbols. + * @note Requires @p CH_CFG_USE_MEMCORE. + */ +#if !defined(CH_CFG_MEMCORE_SIZE) +#define CH_CFG_MEMCORE_SIZE 0 +#endif + +/** + * @brief Heap Allocator APIs. + * @details If enabled then the memory heap allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_HEAP) +#define CH_CFG_USE_HEAP TRUE +#endif + +/** + * @brief Memory Pools Allocator APIs. + * @details If enabled then the memory pools allocator APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_MEMPOOLS) +#define CH_CFG_USE_MEMPOOLS TRUE +#endif + +/** + * @brief Objects FIFOs APIs. + * @details If enabled then the objects FIFOs APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_FIFOS) +#define CH_CFG_USE_OBJ_FIFOS TRUE +#endif + +/** + * @brief Pipes APIs. + * @details If enabled then the pipes APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_PIPES) +#define CH_CFG_USE_PIPES TRUE +#endif + +/** + * @brief Objects Caches APIs. + * @details If enabled then the objects caches APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_OBJ_CACHES) +#define CH_CFG_USE_OBJ_CACHES TRUE +#endif + +/** + * @brief Delegate threads APIs. + * @details If enabled then the delegate threads APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_DELEGATES) +#define CH_CFG_USE_DELEGATES TRUE +#endif + +/** + * @brief Jobs Queues APIs. + * @details If enabled then the jobs queues APIs are included + * in the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_JOBS) +#define CH_CFG_USE_JOBS TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Objects factory options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Objects Factory APIs. + * @details If enabled then the objects factory APIs are included in the + * kernel. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_CFG_USE_FACTORY) +#define CH_CFG_USE_FACTORY TRUE +#endif + +/** + * @brief Maximum length for object names. + * @details If the specified length is zero then the name is stored by + * pointer but this could have unintended side effects. + */ +#if !defined(CH_CFG_FACTORY_MAX_NAMES_LENGTH) +#define CH_CFG_FACTORY_MAX_NAMES_LENGTH 8 +#endif + +/** + * @brief Enables the registry of generic objects. + */ +#if !defined(CH_CFG_FACTORY_OBJECTS_REGISTRY) +#define CH_CFG_FACTORY_OBJECTS_REGISTRY TRUE +#endif + +/** + * @brief Enables factory for generic buffers. + */ +#if !defined(CH_CFG_FACTORY_GENERIC_BUFFERS) +#define CH_CFG_FACTORY_GENERIC_BUFFERS TRUE +#endif + +/** + * @brief Enables factory for semaphores. + */ +#if !defined(CH_CFG_FACTORY_SEMAPHORES) +#define CH_CFG_FACTORY_SEMAPHORES TRUE +#endif + +/** + * @brief Enables factory for mailboxes. + */ +#if !defined(CH_CFG_FACTORY_MAILBOXES) +#define CH_CFG_FACTORY_MAILBOXES TRUE +#endif + +/** + * @brief Enables factory for objects FIFOs. + */ +#if !defined(CH_CFG_FACTORY_OBJ_FIFOS) +#define CH_CFG_FACTORY_OBJ_FIFOS TRUE +#endif + +/** + * @brief Enables factory for Pipes. + */ +#if !defined(CH_CFG_FACTORY_PIPES) +#define CH_CFG_FACTORY_PIPES TRUE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Debug options + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Debug option, kernel statistics. + * + * @note Feature not currently implemented. + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_STATISTICS) +#define CH_DBG_STATISTICS FALSE +#endif + +/** + * @brief Debug option, system state check. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_SYSTEM_STATE_CHECK) +#define CH_DBG_SYSTEM_STATE_CHECK FALSE +#endif + +/** + * @brief Debug option, parameters checks. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_CHECKS) +#define CH_DBG_ENABLE_CHECKS FALSE +#endif + +/** + * @brief System assertions. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_ASSERTS) +#define CH_DBG_ENABLE_ASSERTS FALSE +#endif + +/** + * @brief Stack check. + * + * @note The default is @p FALSE. + */ +#if !defined(CH_DBG_ENABLE_STACK_CHECK) +#define CH_DBG_ENABLE_STACK_CHECK FALSE +#endif + +/** @} */ + +/*===========================================================================*/ +/** + * @name Kernel hooks + * @{ + */ +/*===========================================================================*/ + +/** + * @brief System initialization hook. + */ +#define CH_CFG_SYSTEM_INIT_HOOK() { \ +} + +/** + * @brief Threads descriptor structure extension. + * @details User fields added to the end of the @p thread_t structure. + */ +#define CH_CFG_THREAD_EXT_FIELDS \ + /* Add threads custom fields here.*/ + +/** + * @brief Threads initialization hook. + */ +#define CH_CFG_THREAD_EXT_INIT_HOOK(tr) { \ + /* Add custom threads initialization code here.*/ \ +} + +/** + * @brief Threads finalization hook. + * @details User finalization code added to the @p chThdExit() API. + */ +#define CH_CFG_THREAD_EXIT_HOOK(tp) {} + +/** + * @brief Idle thread enter hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to activate a power saving mode. + */ +#define CH_CFG_IDLE_ENTER_HOOK() { \ +} + +/** + * @brief Idle thread leave hook. + * @note This hook is invoked within a critical zone, no OS functions + * should be invoked from here. + * @note This macro can be used to deactivate a power saving mode. + */ +#define CH_CFG_IDLE_LEAVE_HOOK() { \ +} + +/** + * @brief System halt hook. + */ +#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \ +} + +/** @} */ + +/*===========================================================================*/ +/* Port-specific settings (override port settings defaulted in nilcore.h). */ +/*===========================================================================*/ + +#endif /* CHCONF_H */ + +/** @} */ diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/halconf.h b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/halconf.h new file mode 100644 index 000000000..daab392af --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/halconf.h @@ -0,0 +1,531 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +/** + * @file templates/halconf.h + * @brief HAL configuration header. + * @details HAL configuration file, this file allows to enable or disable the + * various device drivers from your application. You may also use + * this file in order to override the device drivers default settings. + * + * @addtogroup HAL_CONF + * @{ + */ + +#ifndef HALCONF_H +#define HALCONF_H + +#define _CHIBIOS_HAL_CONF_ +#define _CHIBIOS_HAL_CONF_VER_7_1_ + +#include "mcuconf.h" + +/** + * @brief Enables the PAL subsystem. + */ +#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__) +#define HAL_USE_PAL TRUE +#endif + +/** + * @brief Enables the ADC subsystem. + */ +#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__) +#define HAL_USE_ADC FALSE +#endif + +/** + * @brief Enables the CAN subsystem. + */ +#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__) +#define HAL_USE_CAN FALSE +#endif + +/** + * @brief Enables the cryptographic subsystem. + */ +#if !defined(HAL_USE_CRY) || defined(__DOXYGEN__) +#define HAL_USE_CRY FALSE +#endif + +/** + * @brief Enables the DAC subsystem. + */ +#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__) +#define HAL_USE_DAC FALSE +#endif + +/** + * @brief Enables the EFlash subsystem. + */ +#if !defined(HAL_USE_EFL) || defined(__DOXYGEN__) +#define HAL_USE_EFL FALSE +#endif + +/** + * @brief Enables the GPT subsystem. + */ +#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__) +#define HAL_USE_GPT FALSE +#endif + +/** + * @brief Enables the I2C subsystem. + */ +#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__) +#define HAL_USE_I2C FALSE +#endif + +/** + * @brief Enables the I2S subsystem. + */ +#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__) +#define HAL_USE_I2S FALSE +#endif + +/** + * @brief Enables the ICU subsystem. + */ +#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__) +#define HAL_USE_ICU FALSE +#endif + +/** + * @brief Enables the MAC subsystem. + */ +#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__) +#define HAL_USE_MAC FALSE +#endif + +/** + * @brief Enables the MMC_SPI subsystem. + */ +#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__) +#define HAL_USE_MMC_SPI FALSE +#endif + +/** + * @brief Enables the PWM subsystem. + */ +#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__) +#define HAL_USE_PWM FALSE +#endif + +/** + * @brief Enables the RTC subsystem. + */ +#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__) +#define HAL_USE_RTC FALSE +#endif + +/** + * @brief Enables the SDC subsystem. + */ +#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__) +#define HAL_USE_SDC TRUE +#endif + +/** + * @brief Enables the SERIAL subsystem. + */ +#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL TRUE +#endif + +/** + * @brief Enables the SERIAL over USB subsystem. + */ +#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__) +#define HAL_USE_SERIAL_USB FALSE +#endif + +/** + * @brief Enables the SIO subsystem. + */ +#if !defined(HAL_USE_SIO) || defined(__DOXYGEN__) +#define HAL_USE_SIO FALSE +#endif + +/** + * @brief Enables the SPI subsystem. + */ +#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__) +#define HAL_USE_SPI TRUE +#endif + +/** + * @brief Enables the TRNG subsystem. + */ +#if !defined(HAL_USE_TRNG) || defined(__DOXYGEN__) +#define HAL_USE_TRNG FALSE +#endif + +/** + * @brief Enables the UART subsystem. + */ +#if !defined(HAL_USE_UART) || defined(__DOXYGEN__) +#define HAL_USE_UART FALSE +#endif + +/** + * @brief Enables the USB subsystem. + */ +#if !defined(HAL_USE_USB) || defined(__DOXYGEN__) +#define HAL_USE_USB FALSE +#endif + +/** + * @brief Enables the WDG subsystem. + */ +#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__) +#define HAL_USE_WDG FALSE +#endif + +/** + * @brief Enables the WSPI subsystem. + */ +#if !defined(HAL_USE_WSPI) || defined(__DOXYGEN__) +#define HAL_USE_WSPI FALSE +#endif + +/*===========================================================================*/ +/* PAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_CALLBACKS) || defined(__DOXYGEN__) +#define PAL_USE_CALLBACKS FALSE +#endif + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(PAL_USE_WAIT) || defined(__DOXYGEN__) +#define PAL_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* ADC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__) +#define ADC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define ADC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* CAN driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Sleep mode related APIs inclusion switch. + */ +#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__) +#define CAN_USE_SLEEP_MODE TRUE +#endif + +/** + * @brief Enforces the driver to use direct callbacks rather than OSAL events. + */ +#if !defined(CAN_ENFORCE_USE_CALLBACKS) || defined(__DOXYGEN__) +#define CAN_ENFORCE_USE_CALLBACKS FALSE +#endif + +/*===========================================================================*/ +/* CRY driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the SW fall-back of the cryptographic driver. + * @details When enabled, this option, activates a fall-back software + * implementation for algorithms not supported by the underlying + * hardware. + * @note Fall-back implementations may not be present for all algorithms. + */ +#if !defined(HAL_CRY_USE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_USE_FALLBACK FALSE +#endif + +/** + * @brief Makes the driver forcibly use the fall-back implementations. + */ +#if !defined(HAL_CRY_ENFORCE_FALLBACK) || defined(__DOXYGEN__) +#define HAL_CRY_ENFORCE_FALLBACK FALSE +#endif + +/*===========================================================================*/ +/* DAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_WAIT) || defined(__DOXYGEN__) +#define DAC_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p dacAcquireBus() and @p dacReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(DAC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define DAC_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* I2C driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the mutual exclusion APIs on the I2C bus. + */ +#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define I2C_USE_MUTUAL_EXCLUSION TRUE +#endif + +/*===========================================================================*/ +/* MAC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables the zero-copy API. + */ +#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__) +#define MAC_USE_ZERO_COPY FALSE +#endif + +/** + * @brief Enables an event sources for incoming packets. + */ +#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__) +#define MAC_USE_EVENTS TRUE +#endif + +/*===========================================================================*/ +/* MMC_SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + * This option is recommended also if the SPI driver does not + * use a DMA channel and heavily loads the CPU. + */ +#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__) +#define MMC_NICE_WAITING TRUE +#endif + +/*===========================================================================*/ +/* SDC driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Number of initialization attempts before rejecting the card. + * @note Attempts are performed at 10mS intervals. + */ +#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__) +#define SDC_INIT_RETRY 100 +#endif + +/** + * @brief Include support for MMC cards. + * @note MMC support is not yet implemented so this option must be kept + * at @p FALSE. + */ +#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__) +#define SDC_MMC_SUPPORT FALSE +#endif + +/** + * @brief Delays insertions. + * @details If enabled this options inserts delays into the MMC waiting + * routines releasing some extra CPU time for the threads with + * lower priority, this may slow down the driver a bit however. + */ +#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__) +#define SDC_NICE_WAITING TRUE +#endif + +/** + * @brief OCR initialization constant for V20 cards. + */ +#if !defined(SDC_INIT_OCR_V20) || defined(__DOXYGEN__) +#define SDC_INIT_OCR_V20 0x50FF8000U +#endif + +/** + * @brief OCR initialization constant for non-V20 cards. + */ +#if !defined(SDC_INIT_OCR) || defined(__DOXYGEN__) +#define SDC_INIT_OCR 0x80100000U +#endif + +/*===========================================================================*/ +/* SERIAL driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SERIAL_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Serial buffers size. + * @details Configuration parameter, you can change the depth of the queue + * buffers depending on the requirements of your application. + * @note The default is 16 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_BUFFERS_SIZE 16 +#endif + +/*===========================================================================*/ +/* SERIAL_USB driver related setting. */ +/*===========================================================================*/ + +/** + * @brief Serial over USB buffers size. + * @details Configuration parameter, the buffer size must be a multiple of + * the USB data endpoint maximum packet size. + * @note The default is 256 bytes for both the transmission and receive + * buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_SIZE 256 +#endif + +/** + * @brief Serial over USB number of buffers. + * @note The default is 2 buffers. + */ +#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__) +#define SERIAL_USB_BUFFERS_NUMBER 2 +#endif + +/*===========================================================================*/ +/* SPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__) +#define SPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables circular transfers APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_CIRCULAR) || defined(__DOXYGEN__) +#define SPI_USE_CIRCULAR FALSE +#endif + +/** + * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define SPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +/** + * @brief Handling method for SPI CS line. + * @note Disabling this option saves both code and data space. + */ +#if !defined(SPI_SELECT_MODE) || defined(__DOXYGEN__) +#define SPI_SELECT_MODE SPI_SELECT_MODE_PAD +#endif + +/*===========================================================================*/ +/* UART driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__) +#define UART_USE_WAIT FALSE +#endif + +/** + * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define UART_USE_MUTUAL_EXCLUSION FALSE +#endif + +/*===========================================================================*/ +/* USB driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__) +#define USB_USE_WAIT FALSE +#endif + +/*===========================================================================*/ +/* WSPI driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Enables synchronous APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_WAIT) || defined(__DOXYGEN__) +#define WSPI_USE_WAIT TRUE +#endif + +/** + * @brief Enables the @p wspiAcquireBus() and @p wspiReleaseBus() APIs. + * @note Disabling this option saves both code and data space. + */ +#if !defined(WSPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__) +#define WSPI_USE_MUTUAL_EXCLUSION TRUE +#endif + +#endif /* HALCONF_H */ + +/** @} */ diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/mcuconf.h b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/mcuconf.h new file mode 100644 index 000000000..e85690fda --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/cfg/mcuconf.h @@ -0,0 +1,484 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#ifndef MCUCONF_H +#define MCUCONF_H + +/* + * STM32H7xx drivers configuration. + * The following settings override the default settings present in + * the various device driver implementation headers. + * Note that the settings for each driver only have effect if the whole + * driver is enabled in halconf.h. + * + * IRQ priorities: + * 15...0 Lowest...Highest. + * + * DMA priorities: + * 0...3 Lowest...Highest. + */ + +#define STM32H7xx_MCUCONF +#define STM32H742_MCUCONF +#define STM32H743_MCUCONF +#define STM32H753_MCUCONF +#define STM32H745_MCUCONF +#define STM32H755_MCUCONF +#define STM32H747_MCUCONF +#define STM32H757_MCUCONF + +/* + * General settings. + */ +#define STM32_NO_INIT FALSE +#define STM32_TARGET_CORE 1 + +/* + * Memory attributes settings. + */ +#define STM32_NOCACHE_MPU_REGION MPU_REGION_6 +#define STM32_NOCACHE_SRAM1_SRAM2 FALSE +#define STM32_NOCACHE_SRAM3 TRUE + +/* + * PWR system settings. + * Reading STM32 Reference Manual is required, settings in PWR_CR3 are + * very critical. + * Register constants are taken from the ST header. + */ +#define STM32_VOS STM32_VOS_SCALE1 +#define STM32_PWR_CR1 (PWR_CR1_SVOS_1 | PWR_CR1_SVOS_0) +#define STM32_PWR_CR2 (PWR_CR2_BREN) +#define STM32_PWR_CR3 (PWR_CR3_SMPSEN | PWR_CR3_USB33DEN) +#define STM32_PWR_CPUCR 0 + +/* + * Clock tree static settings. + * Reading STM32 Reference Manual is required. + */ +#define STM32_HSI_ENABLED TRUE +#define STM32_LSI_ENABLED TRUE +#define STM32_CSI_ENABLED TRUE +#define STM32_HSI48_ENABLED TRUE +#define STM32_HSE_ENABLED TRUE +#define STM32_LSE_ENABLED TRUE +#define STM32_HSIDIV STM32_HSIDIV_DIV1 + +/* + * PLLs static settings. + * Reading STM32 Reference Manual is required. + */ +#define STM32_PLLSRC STM32_PLLSRC_HSE_CK +#define STM32_PLLCFGR_MASK ~0 +#define STM32_PLL1_ENABLED TRUE +#define STM32_PLL1_P_ENABLED TRUE +#define STM32_PLL1_Q_ENABLED TRUE +#define STM32_PLL1_R_ENABLED TRUE +#define STM32_PLL1_DIVM_VALUE 4 +#define STM32_PLL1_DIVN_VALUE 480 +#define STM32_PLL1_FRACN_VALUE 0 +#define STM32_PLL1_DIVP_VALUE 2 +#define STM32_PLL1_DIVQ_VALUE 20 +#define STM32_PLL1_DIVR_VALUE 8 +#define STM32_PLL2_ENABLED TRUE +#define STM32_PLL2_P_ENABLED TRUE +#define STM32_PLL2_Q_ENABLED TRUE +#define STM32_PLL2_R_ENABLED TRUE +#define STM32_PLL2_DIVM_VALUE 4 +#define STM32_PLL2_DIVN_VALUE 400 +#define STM32_PLL2_FRACN_VALUE 0 +#define STM32_PLL2_DIVP_VALUE 40 +#define STM32_PLL2_DIVQ_VALUE 8 +#define STM32_PLL2_DIVR_VALUE 8 +#define STM32_PLL3_ENABLED TRUE +#define STM32_PLL3_P_ENABLED TRUE +#define STM32_PLL3_Q_ENABLED TRUE +#define STM32_PLL3_R_ENABLED TRUE +#define STM32_PLL3_DIVM_VALUE 4 +#define STM32_PLL3_DIVN_VALUE 400 +#define STM32_PLL3_FRACN_VALUE 0 +#define STM32_PLL3_DIVP_VALUE 8 +#define STM32_PLL3_DIVQ_VALUE 8 +#define STM32_PLL3_DIVR_VALUE 8 + +/* + * Core clocks dynamic settings (can be changed at runtime). + * Reading STM32 Reference Manual is required. + */ +#define STM32_SW STM32_SW_PLL1_P_CK +#define STM32_RTCSEL STM32_RTCSEL_LSE_CK +#define STM32_D1CPRE STM32_D1CPRE_DIV1 +#define STM32_D1HPRE STM32_D1HPRE_DIV4 +#define STM32_D1PPRE3 STM32_D1PPRE3_DIV1 +#define STM32_D2PPRE1 STM32_D2PPRE1_DIV1 +#define STM32_D2PPRE2 STM32_D2PPRE2_DIV1 +#define STM32_D3PPRE4 STM32_D3PPRE4_DIV1 + +/* + * Peripherals clocks static settings. + * Reading STM32 Reference Manual is required. + */ +#define STM32_MCO1SEL STM32_MCO1SEL_HSI_CK +#define STM32_MCO1PRE_VALUE 4 +#define STM32_MCO2SEL STM32_MCO2SEL_SYS_CK +#define STM32_MCO2PRE_VALUE 4 +#define STM32_TIMPRE_ENABLE TRUE +#define STM32_HRTIMSEL 0 +#define STM32_STOPKERWUCK 0 +#define STM32_STOPWUCK 0 +#define STM32_RTCPRE_VALUE 8 +#define STM32_CKPERSEL STM32_CKPERSEL_HSE_CK +#define STM32_SDMMCSEL STM32_SDMMCSEL_PLL1_Q_CK +#define STM32_QSPISEL STM32_QSPISEL_HCLK +#define STM32_FMCSEL STM32_QSPISEL_HCLK +#define STM32_SWPSEL STM32_SWPSEL_PCLK1 +#define STM32_FDCANSEL STM32_FDCANSEL_HSE_CK +#define STM32_DFSDM1SEL STM32_DFSDM1SEL_PCLK2 +#define STM32_SPDIFSEL STM32_SPDIFSEL_PLL1_Q_CK +#define STM32_SPI45SEL STM32_SPI45SEL_PCLK2 +#define STM32_SPI123SEL STM32_SPI123SEL_PLL1_Q_CK +#define STM32_SAI23SEL STM32_SAI23SEL_PLL1_Q_CK +#define STM32_SAI1SEL STM32_SAI1SEL_PLL1_Q_CK +#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 +#define STM32_CECSEL STM32_CECSEL_LSE_CK +#define STM32_USBSEL STM32_USBSEL_PLL1_Q_CK +#define STM32_I2C123SEL STM32_I2C123SEL_PCLK1 +#define STM32_RNGSEL STM32_RNGSEL_HSI48_CK +#define STM32_USART16SEL STM32_USART16SEL_PCLK2 +#define STM32_USART234578SEL STM32_USART234578SEL_PCLK1 +#define STM32_SPI6SEL STM32_SPI6SEL_PCLK4 +#define STM32_SAI4BSEL STM32_SAI4BSEL_PLL1_Q_CK +#define STM32_SAI4ASEL STM32_SAI4ASEL_PLL1_Q_CK +#define STM32_ADCSEL STM32_ADCSEL_PLL2_P_CK +#define STM32_LPTIM345SEL STM32_LPTIM345SEL_PCLK4 +#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK4 +#define STM32_I2C4SEL STM32_I2C4SEL_PCLK4 +#define STM32_LPUART1SEL STM32_LPUART1SEL_PCLK4 + +/* + * IRQ system settings. + */ +#define STM32_IRQ_EXTI0_PRIORITY 6 +#define STM32_IRQ_EXTI1_PRIORITY 6 +#define STM32_IRQ_EXTI2_PRIORITY 6 +#define STM32_IRQ_EXTI3_PRIORITY 6 +#define STM32_IRQ_EXTI4_PRIORITY 6 +#define STM32_IRQ_EXTI5_9_PRIORITY 6 +#define STM32_IRQ_EXTI10_15_PRIORITY 6 +#define STM32_IRQ_EXTI16_PRIORITY 6 +#define STM32_IRQ_EXTI17_PRIORITY 6 +#define STM32_IRQ_EXTI18_PRIORITY 6 +#define STM32_IRQ_EXTI19_PRIORITY 6 +#define STM32_IRQ_EXTI20_21_PRIORITY 6 + +#define STM32_IRQ_FDCAN1_PRIORITY 10 +#define STM32_IRQ_FDCAN2_PRIORITY 10 + +#define STM32_IRQ_MDMA_PRIORITY 9 + +#define STM32_IRQ_QUADSPI1_PRIORITY 10 + +#define STM32_IRQ_SDMMC1_PRIORITY 9 +#define STM32_IRQ_SDMMC2_PRIORITY 9 + +#define STM32_IRQ_TIM1_UP_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 +#define STM32_IRQ_TIM15_PRIORITY 7 +#define STM32_IRQ_TIM16_PRIORITY 7 +#define STM32_IRQ_TIM17_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 +#define STM32_IRQ_UART7_PRIORITY 12 +#define STM32_IRQ_UART8_PRIORITY 12 + +/* + * ADC driver system settings. + */ +#define STM32_ADC_DUAL_MODE FALSE +#define STM32_ADC_COMPACT_SAMPLES FALSE +#define STM32_ADC_USE_ADC12 FALSE +#define STM32_ADC_USE_ADC3 FALSE +#define STM32_ADC_ADC12_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_ADC_ADC3_BDMA_STREAM STM32_BDMA_STREAM_ID_ANY +#define STM32_ADC_ADC12_DMA_PRIORITY 2 +#define STM32_ADC_ADC3_DMA_PRIORITY 2 +#define STM32_ADC_ADC12_IRQ_PRIORITY 5 +#define STM32_ADC_ADC3_IRQ_PRIORITY 5 +#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4 +#define STM32_ADC_ADC3_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV4 + +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_FDCAN1 FALSE +#define STM32_CAN_USE_FDCAN2 FALSE + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID_ANY + +/* + * GPT driver system settings. + */ +#define STM32_GPT_USE_TIM1 FALSE +#define STM32_GPT_USE_TIM2 FALSE +#define STM32_GPT_USE_TIM3 FALSE +#define STM32_GPT_USE_TIM4 FALSE +#define STM32_GPT_USE_TIM5 FALSE +#define STM32_GPT_USE_TIM6 FALSE +#define STM32_GPT_USE_TIM7 FALSE +#define STM32_GPT_USE_TIM8 FALSE +#define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE +#define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_USE_TIM15 FALSE +#define STM32_GPT_USE_TIM16 FALSE +#define STM32_GPT_USE_TIM17 FALSE + +/* + * I2C driver system settings. + */ +#define STM32_I2C_USE_I2C1 FALSE +#define STM32_I2C_USE_I2C2 FALSE +#define STM32_I2C_USE_I2C3 FALSE +#define STM32_I2C_USE_I2C4 FALSE +#define STM32_I2C_BUSY_TIMEOUT 50 +#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_I2C_I2C4_RX_BDMA_STREAM STM32_BDMA_STREAM_ID_ANY +#define STM32_I2C_I2C4_TX_BDMA_STREAM STM32_BDMA_STREAM_ID_ANY +#define STM32_I2C_I2C1_IRQ_PRIORITY 5 +#define STM32_I2C_I2C2_IRQ_PRIORITY 5 +#define STM32_I2C_I2C3_IRQ_PRIORITY 5 +#define STM32_I2C_I2C4_IRQ_PRIORITY 5 +#define STM32_I2C_I2C1_DMA_PRIORITY 3 +#define STM32_I2C_I2C2_DMA_PRIORITY 3 +#define STM32_I2C_I2C3_DMA_PRIORITY 3 +#define STM32_I2C_I2C4_DMA_PRIORITY 3 +#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure") + +/* + * ICU driver system settings. + */ +#define STM32_ICU_USE_TIM1 FALSE +#define STM32_ICU_USE_TIM2 FALSE +#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM4 FALSE +#define STM32_ICU_USE_TIM5 FALSE +#define STM32_ICU_USE_TIM8 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE +#define STM32_ICU_USE_TIM15 FALSE +#define STM32_ICU_USE_TIM16 FALSE +#define STM32_ICU_USE_TIM17 FALSE + +/* + * MAC driver system settings. + */ +#define STM32_MAC_TRANSMIT_BUFFERS 2 +#define STM32_MAC_RECEIVE_BUFFERS 4 +#define STM32_MAC_BUFFERS_SIZE 1522 +#define STM32_MAC_PHY_TIMEOUT 100 +#define STM32_MAC_ETH1_CHANGE_PHY_STATE TRUE +#define STM32_MAC_ETH1_IRQ_PRIORITY 13 +#define STM32_MAC_IP_CHECKSUM_OFFLOAD 0 + +/* + * PWM driver system settings. + */ +#define STM32_PWM_USE_ADVANCED FALSE +#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM2 FALSE +#define STM32_PWM_USE_TIM3 FALSE +#define STM32_PWM_USE_TIM4 FALSE +#define STM32_PWM_USE_TIM5 FALSE +#define STM32_PWM_USE_TIM8 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE +#define STM32_PWM_USE_TIM15 FALSE +#define STM32_PWM_USE_TIM16 FALSE +#define STM32_PWM_USE_TIM17 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 + +/* + * SDC driver system settings. + */ +#define STM32_SDC_USE_SDMMC1 TRUE +#define STM32_SDC_USE_SDMMC2 FALSE +#define STM32_SDC_SDMMC_UNALIGNED_SUPPORT TRUE +#define STM32_SDC_SDMMC_WRITE_TIMEOUT 1000000 +#define STM32_SDC_SDMMC_READ_TIMEOUT 1000000 +#define STM32_SDC_SDMMC_CLOCK_DELAY 10 +#define STM32_SDC_SDMMC_PWRSAV TRUE + +/* + * SERIAL driver system settings. + */ +#define STM32_SERIAL_USE_USART1 FALSE +#define STM32_SERIAL_USE_USART2 FALSE +#define STM32_SERIAL_USE_USART3 TRUE +#define STM32_SERIAL_USE_UART4 FALSE +#define STM32_SERIAL_USE_UART5 FALSE +#define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USE_UART7 FALSE +#define STM32_SERIAL_USE_UART8 FALSE + +/* + * SPI driver system settings. + */ +#define STM32_SPI_USE_SPI1 TRUE +#define STM32_SPI_USE_SPI2 FALSE +#define STM32_SPI_USE_SPI3 FALSE +#define STM32_SPI_USE_SPI4 FALSE +#define STM32_SPI_USE_SPI5 FALSE +#define STM32_SPI_USE_SPI6 TRUE +#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_SPI_SPI6_RX_BDMA_STREAM STM32_BDMA_STREAM_ID_ANY +#define STM32_SPI_SPI6_TX_BDMA_STREAM STM32_BDMA_STREAM_ID_ANY +#define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI2_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 +#define STM32_SPI_SPI4_DMA_PRIORITY 1 +#define STM32_SPI_SPI5_DMA_PRIORITY 1 +#define STM32_SPI_SPI6_DMA_PRIORITY 1 +#define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI2_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 +#define STM32_SPI_SPI4_IRQ_PRIORITY 10 +#define STM32_SPI_SPI5_IRQ_PRIORITY 10 +#define STM32_SPI_SPI6_IRQ_PRIORITY 10 +#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") + +/* + * ST driver system settings. + */ +#define STM32_ST_IRQ_PRIORITY 8 +#define STM32_ST_USE_TIMER 2 + +/* + * TRNG driver system settings. + */ +#define STM32_TRNG_USE_RNG1 FALSE + +/* + * UART driver system settings. + */ +#define STM32_UART_USE_USART1 FALSE +#define STM32_UART_USE_USART2 FALSE +#define STM32_UART_USE_USART3 FALSE +#define STM32_UART_USE_UART4 FALSE +#define STM32_UART_USE_UART5 FALSE +#define STM32_UART_USE_USART6 FALSE +#define STM32_UART_USE_UART7 FALSE +#define STM32_UART_USE_UART8 FALSE +#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART3_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART3_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART4_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART4_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART5_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART7_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART7_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART8_RX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_UART8_TX_DMA_STREAM STM32_DMA_STREAM_ID_ANY +#define STM32_UART_USART1_DMA_PRIORITY 0 +#define STM32_UART_USART2_DMA_PRIORITY 0 +#define STM32_UART_USART3_DMA_PRIORITY 0 +#define STM32_UART_UART4_DMA_PRIORITY 0 +#define STM32_UART_UART5_DMA_PRIORITY 0 +#define STM32_UART_USART6_DMA_PRIORITY 0 +#define STM32_UART_UART7_DMA_PRIORITY 0 +#define STM32_UART_UART8_DMA_PRIORITY 0 +#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure") + +/* + * USB driver system settings. + */ +#define STM32_USB_USE_OTG1 FALSE +#define STM32_USB_USE_OTG2 FALSE +#define STM32_USB_OTG1_IRQ_PRIORITY 14 +#define STM32_USB_OTG2_IRQ_PRIORITY 14 +#define STM32_USB_OTG1_RX_FIFO_SIZE 512 +#define STM32_USB_OTG2_RX_FIFO_SIZE 1024 +#define STM32_USB_HOST_WAKEUP_DURATION 2 + +/* + * WDG driver system settings. + */ +#define STM32_WDG_USE_IWDG FALSE + +/* + * WSPI driver system settings. + */ +#define STM32_WSPI_USE_QUADSPI1 FALSE +#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1 +#define STM32_WSPI_QUADSPI1_MDMA_CHANNEL STM32_MDMA_CHANNEL_ID_ANY +#define STM32_WSPI_QUADSPI1_MDMA_PRIORITY 1 +#define STM32_WSPI_MDMA_ERROR_HOOK(qspip) osalSysHalt("MDMA failure") + +#endif /* MCUCONF_H */ diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/debug/NIL-STM32H755ZI-NUCLEO144 (OpenOCD, Flash and Run).launch b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/debug/NIL-STM32H755ZI-NUCLEO144 (OpenOCD, Flash and Run).launch new file mode 100644 index 000000000..62ff5f921 --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/debug/NIL-STM32H755ZI-NUCLEO144 (OpenOCD, Flash and Run).launch @@ -0,0 +1,53 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/demos/STM32/NIL-STM32H755ZI-NUCLEO144/main.c b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/main.c new file mode 100644 index 000000000..b72f31149 --- /dev/null +++ b/demos/STM32/NIL-STM32H755ZI-NUCLEO144/main.c @@ -0,0 +1,104 @@ +/* + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + + Licensed under the Apache License, Version 2.0 (the "License"); + you may not use this file except in compliance with the License. + You may obtain a copy of the License at + + http://www.apache.org/licenses/LICENSE-2.0 + + Unless required by applicable law or agreed to in writing, software + distributed under the License is distributed on an "AS IS" BASIS, + WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + See the License for the specific language governing permissions and + limitations under the License. +*/ + +#include "hal.h" +#include "ch.h" +#include "nil_test_root.h" +#include "oslib_test_root.h" + +/* + * Blinker thread #1. + */ +static THD_WORKING_AREA(waThread1, 128); +static THD_FUNCTION(Thread1, arg) { + + (void)arg; + + while (true) { + while (true) { + palSetLine(LINE_LED1); + chThdSleepMilliseconds(50); + palSetLine(LINE_LED2); + chThdSleepMilliseconds(50); + palSetLine(LINE_LED3); + chThdSleepMilliseconds(200); + palClearLine(LINE_LED1); + chThdSleepMilliseconds(50); + palClearLine(LINE_LED2); + chThdSleepMilliseconds(50); + palClearLine(LINE_LED3); + chThdSleepMilliseconds(200); + } + } +} + +/* + * Tester thread. + */ +THD_WORKING_AREA(waThread3, 256); +THD_FUNCTION(Thread3, arg) { + + (void)arg; + + /* + * Activates the serial driver 1 using the driver default configuration. + * PA9 and PA10 are routed to USART1. + */ + sdStart(&SD3, NULL); + + /* Welcome message.*/ + chnWrite(&SD3, (const uint8_t *)"Hello World!\r\n", 14); + + /* Waiting for button push and activation of the test suite.*/ + while (true) { + if (palReadLine(LINE_BUTTON)) { + test_execute((BaseSequentialStream *)&SD3, &nil_test_suite); + test_execute((BaseSequentialStream *)&SD3, &oslib_test_suite); + } + chThdSleepMilliseconds(500); + } +} + +/* + * Threads creation table, one entry per thread. + */ +THD_TABLE_BEGIN + THD_TABLE_THREAD(0, "blinker1", waThread1, Thread1, NULL) + THD_TABLE_THREAD(4, "tester", waThread3, Thread3, NULL) +THD_TABLE_END + +/* + * Application entry point. + */ +int main(void) { + + /* + * System initializations. + * - HAL initialization, this also initializes the configured device drivers + * and performs the board-specific initializations. + * - Kernel initialization, the main() function becomes a thread and the + * RTOS is active. + */ + halInit(); + chSysInit(); + + /* This is now the idle thread loop, you may perform here a low priority + task but you must never try to sleep or wait in this loop. Note that + this tasks runs at the lowest priority level so any instruction added + here will be executed after all other tasks have been started.*/ + while (true) { + } +} diff --git a/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc-fpu.txt b/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc-fpu.txt new file mode 100644 index 000000000..3f1aaa315 --- /dev/null +++ b/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc-fpu.txt @@ -0,0 +1,275 @@ + +*** ChibiOS/NIL Test Suite +*** +*** Compiled: Mar 18 2020 - 12:26:16 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 32352 bytes +*** RO data size: 7520 bytes +*** Data size: 128 bytes +*** BSS size: 4904 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/NIL +--- Stable Flag: 0 +--- Version String: 4.0.0 +--- Major Number: 4 +--- Minor Number: 0 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_MAX_THREADS: 8 +--- CH_CFG_AUTOSTART_THREADS: 1 +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 5000 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_MUTEXES: 0 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Thread Sleep functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Semaphores) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Semaphore primitives, with state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Semaphores timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages performance #1) +--- Score : 1764685 msgs/S, 3529370 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Messages performance #2) +--- Score : 1379292 msgs/S, 2758584 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.3 (Context Switch performance) +--- Score : 5680392 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.4 (Threads performance, full cycle) +--- Score : 1263140 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.5 (Threads performance, create/exit only) +--- Score : 1561249 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.6 (Semaphores wait/signal performance) +--- Score : 6575260 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.7 (RAM Footprint) +--- System: 232 bytes +--- Thread: 24 bytes +--- Semaph: 4 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 32 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 12:26:16 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 32352 bytes +*** RO data size: 7520 bytes +*** Data size: 128 bytes +*** BSS size: 4904 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 0 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc.txt b/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc.txt new file mode 100644 index 000000000..df68151de --- /dev/null +++ b/doc/nil/reports/benchmarks/nil-stm32h7-480mhz-gcc.txt @@ -0,0 +1,275 @@ + +*** ChibiOS/NIL Test Suite +*** +*** Compiled: Mar 18 2020 - 12:19:04 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 32176 bytes +*** RO data size: 7520 bytes +*** Data size: 128 bytes +*** BSS size: 4088 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7 +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/NIL +--- Stable Flag: 0 +--- Version String: 4.0.0 +--- Major Number: 4 +--- Minor Number: 0 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_MAX_THREADS: 8 +--- CH_CFG_AUTOSTART_THREADS: 1 +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 5000 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_MUTEXES: 0 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Thread Sleep functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Semaphores) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Semaphore primitives, with state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Semaphores timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages performance #1) +--- Score : 2142832 msgs/S, 4285664 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Messages performance #2) +--- Score : 1638551 msgs/S, 3277102 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.3 (Context Switch performance) +--- Score : 8135512 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.4 (Threads performance, full cycle) +--- Score : 1462518 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.5 (Threads performance, create/exit only) +--- Score : 1904741 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.6 (Semaphores wait/signal performance) +--- Score : 6575268 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.7 (RAM Footprint) +--- System: 232 bytes +--- Thread: 24 bytes +--- Semaph: 4 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 32 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 12:19:04 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 32176 bytes +*** RO data size: 7520 bytes +*** Data size: 128 bytes +*** BSS size: 4088 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7 +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 0 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/rt/reports/benchmarks/rt-stm32g0-64mhz-gcc.txt b/doc/rt/reports/benchmarks/rt-stm32g0-64mhz-gcc.txt new file mode 100644 index 000000000..fe5376086 --- /dev/null +++ b/doc/rt/reports/benchmarks/rt-stm32g0-64mhz-gcc.txt @@ -0,0 +1,372 @@ + +*** ChibiOS/RT Test Suite +*** +*** Compiled: Mar 18 2020 - 10:53:26 +*** Platform: STM32G0 Entry-level +*** Test Board: STMicroelectronics STM32 Nucleo64-G071RB +*** +*** Text size: 35408 bytes +*** RO data size: 9864 bytes +*** Data size: 220 bytes +*** BSS size: 5048 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv6-M +--- Core Variant: Cortex-M0+ +--- Compiler: GCC 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496] +--- Port Info: Preemption through NMI +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/RT +--- Stable Flag: 1 +--- Version String: 6.1.0 +--- Major Number: 6 +--- Minor Number: 1 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 10000 +--- CH_CFG_INTERVALS_SIZE: 32 +--- CH_CFG_TIME_TYPES_SIZE: 32 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_TIME_QUANTUM: 0 +--- CH_CFG_MEMCORE_SIZE: 0 +--- CH_CFG_NO_IDLE_THREAD: 0 +--- CH_CFG_OPTIMIZE_SPEED: 1 +--- CH_CFG_USE_TM: 0 +--- CH_CFG_USE_REGISTRY: 1 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_SEMAPHORES_PRIORITY: 0 +--- CH_CFG_USE_MUTEXES: 1 +--- CH_CFG_USE_MUTEXES_RECURSIVE: 0 +--- CH_CFG_USE_CONDVARS: 1 +--- CH_CFG_USE_CONDVARS_TIMEOUT: 1 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_EVENTS_TIMEOUT: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_CFG_USE_MESSAGES_PRIORITY: 0 +--- CH_CFG_USE_DYNAMIC: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_TRACE_MASK: 255 +--- CH_DBG_TRACE_BUFFER_SIZE: 128 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- CH_DBG_FILL_THREADS: 0 +--- CH_DBG_THREADS_PROFILING: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (System layer and port interface) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System integrity functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Critical zones functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Interrupts handling functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Thread Sleep functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Ready List functionality, threads priority order) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Priority change test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.4 (Priority change test with Priority Inheritance) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Counter Semaphores) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Semaphore enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Semaphore timeout test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Testing chSemAddCounterI() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Testing chSemWaitSignal() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Testing Binary Semaphores special case) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Mutexes, Condition Variables and Priority Inheritance) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Priority return verification) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Repeated locks, non recursive scenario) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.4 (Condition Variable signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.5 (Condition Variable broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.6 (Condition Variable priority boost test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 10 (Dynamic threads) +---------------------------------------------------------------------------- +--- Test Case 10.1 (Threads creation from Memory Heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Threads creation from Memory Pool) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 11 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 11.1 (Messages performance #1) +--- Score : 199373 msgs/S, 398746 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Messages performance #2) +--- Score : 160398 msgs/S, 320796 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Messages performance #3) +--- Score : 160398 msgs/S, 320796 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Context Switch performance) +--- Score : 591904 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Threads performance, full cycle) +--- Score : 120298 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Threads performance, create/exit only) +--- Score : 150233 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Mass reschedule performance) +--- Score : 49307 reschedules/S, 295842 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Round-Robin voluntary reschedule) +--- Score : 439852 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Virtual Timers set/reset performance) +--- Score : 388936 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Semaphores wait/signal performance) +--- Score : 1142844 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Mutexes lock/unlock performance) +--- Score : 524584 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (RAM Footprint) +--- System: 116 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 10:53:26 +*** Platform: STM32G0 Entry-level +*** Test Board: STMicroelectronics STM32 Nucleo64-G071RB +*** +*** Text size: 35408 bytes +*** RO data size: 9864 bytes +*** Data size: 220 bytes +*** BSS size: 5048 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv6-M +--- Core Variant: Cortex-M0+ +--- Compiler: GCC 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496] +--- Port Info: Preemption through NMI +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 1 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc-fpu.txt b/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc-fpu.txt new file mode 100644 index 000000000..6ebd65ad0 --- /dev/null +++ b/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc-fpu.txt @@ -0,0 +1,372 @@ + +*** ChibiOS/RT Test Suite +*** +*** Compiled: Mar 18 2020 - 11:08:49 +*** Platform: STM32G4 Hi-resolution Line +*** Test Board: STMicroelectronics STM32 Nucleo64-G474RE +*** +*** Text size: 37608 bytes +*** RO data size: 9836 bytes +*** Data size: 220 bytes +*** BSS size: 6416 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M4F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/RT +--- Stable Flag: 1 +--- Version String: 6.1.0 +--- Major Number: 6 +--- Minor Number: 1 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 10000 +--- CH_CFG_INTERVALS_SIZE: 32 +--- CH_CFG_TIME_TYPES_SIZE: 32 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_TIME_QUANTUM: 0 +--- CH_CFG_MEMCORE_SIZE: 0 +--- CH_CFG_NO_IDLE_THREAD: 0 +--- CH_CFG_OPTIMIZE_SPEED: 1 +--- CH_CFG_USE_TM: 1 +--- CH_CFG_USE_REGISTRY: 1 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_SEMAPHORES_PRIORITY: 0 +--- CH_CFG_USE_MUTEXES: 1 +--- CH_CFG_USE_MUTEXES_RECURSIVE: 0 +--- CH_CFG_USE_CONDVARS: 1 +--- CH_CFG_USE_CONDVARS_TIMEOUT: 1 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_EVENTS_TIMEOUT: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_CFG_USE_MESSAGES_PRIORITY: 0 +--- CH_CFG_USE_DYNAMIC: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_TRACE_MASK: 255 +--- CH_DBG_TRACE_BUFFER_SIZE: 128 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- CH_DBG_FILL_THREADS: 0 +--- CH_DBG_THREADS_PROFILING: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (System layer and port interface) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System integrity functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Critical zones functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Interrupts handling functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Thread Sleep functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Ready List functionality, threads priority order) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Priority change test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.4 (Priority change test with Priority Inheritance) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Counter Semaphores) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Semaphore enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Semaphore timeout test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Testing chSemAddCounterI() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Testing chSemWaitSignal() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Testing Binary Semaphores special case) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Mutexes, Condition Variables and Priority Inheritance) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Priority return verification) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Repeated locks, non recursive scenario) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.4 (Condition Variable signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.5 (Condition Variable broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.6 (Condition Variable priority boost test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 10 (Dynamic threads) +---------------------------------------------------------------------------- +--- Test Case 10.1 (Threads creation from Memory Heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Threads creation from Memory Pool) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 11 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 11.1 (Messages performance #1) +--- Score : 620426 msgs/S, 1240852 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Messages performance #2) +--- Score : 524683 msgs/S, 1049366 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Messages performance #3) +--- Score : 524683 msgs/S, 1049366 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Context Switch performance) +--- Score : 1730272 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Threads performance, full cycle) +--- Score : 399053 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Threads performance, create/exit only) +--- Score : 494181 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Mass reschedule performance) +--- Score : 160984 reschedules/S, 965904 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Round-Robin voluntary reschedule) +--- Score : 1218620 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Virtual Timers set/reset performance) +--- Score : 1452380 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Semaphores wait/signal performance) +--- Score : 3399976 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Mutexes lock/unlock performance) +--- Score : 2023796 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (RAM Footprint) +--- System: 120 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 11:08:49 +*** Platform: STM32G4 Hi-resolution Line +*** Test Board: STMicroelectronics STM32 Nucleo64-G474RE +*** +*** Text size: 37608 bytes +*** RO data size: 9836 bytes +*** Data size: 220 bytes +*** BSS size: 6416 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M4F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 1 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc.txt b/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc.txt new file mode 100644 index 000000000..d54dde558 --- /dev/null +++ b/doc/rt/reports/benchmarks/rt-stm32g4-170mhz-gcc.txt @@ -0,0 +1,372 @@ + +*** ChibiOS/RT Test Suite +*** +*** Compiled: Mar 18 2020 - 10:58:22 +*** Platform: STM32G4 Hi-resolution Line +*** Test Board: STMicroelectronics STM32 Nucleo64-G474RE +*** +*** Text size: 37584 bytes +*** RO data size: 9844 bytes +*** Data size: 220 bytes +*** BSS size: 5052 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M4 +--- Compiler: GCC 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/RT +--- Stable Flag: 1 +--- Version String: 6.1.0 +--- Major Number: 6 +--- Minor Number: 1 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 10000 +--- CH_CFG_INTERVALS_SIZE: 32 +--- CH_CFG_TIME_TYPES_SIZE: 32 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_TIME_QUANTUM: 0 +--- CH_CFG_MEMCORE_SIZE: 0 +--- CH_CFG_NO_IDLE_THREAD: 0 +--- CH_CFG_OPTIMIZE_SPEED: 1 +--- CH_CFG_USE_TM: 1 +--- CH_CFG_USE_REGISTRY: 1 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_SEMAPHORES_PRIORITY: 0 +--- CH_CFG_USE_MUTEXES: 1 +--- CH_CFG_USE_MUTEXES_RECURSIVE: 0 +--- CH_CFG_USE_CONDVARS: 1 +--- CH_CFG_USE_CONDVARS_TIMEOUT: 1 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_EVENTS_TIMEOUT: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_CFG_USE_MESSAGES_PRIORITY: 0 +--- CH_CFG_USE_DYNAMIC: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_TRACE_MASK: 255 +--- CH_DBG_TRACE_BUFFER_SIZE: 128 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- CH_DBG_FILL_THREADS: 0 +--- CH_DBG_THREADS_PROFILING: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (System layer and port interface) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System integrity functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Critical zones functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Interrupts handling functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Thread Sleep functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Ready List functionality, threads priority order) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Priority change test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.4 (Priority change test with Priority Inheritance) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Counter Semaphores) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Semaphore enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Semaphore timeout test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Testing chSemAddCounterI() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Testing chSemWaitSignal() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Testing Binary Semaphores special case) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Mutexes, Condition Variables and Priority Inheritance) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Priority return verification) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Repeated locks, non recursive scenario) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.4 (Condition Variable signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.5 (Condition Variable broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.6 (Condition Variable priority boost test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 10 (Dynamic threads) +---------------------------------------------------------------------------- +--- Test Case 10.1 (Threads creation from Memory Heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Threads creation from Memory Pool) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 11 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 11.1 (Messages performance #1) +--- Score : 809511 msgs/S, 1619022 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Messages performance #2) +--- Score : 653837 msgs/S, 1307674 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Messages performance #3) +--- Score : 653837 msgs/S, 1307674 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Context Switch performance) +--- Score : 2566024 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Threads performance, full cycle) +--- Score : 469604 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Threads performance, create/exit only) +--- Score : 602831 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Mass reschedule performance) +--- Score : 194953 reschedules/S, 1169718 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Round-Robin voluntary reschedule) +--- Score : 1626760 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Virtual Timers set/reset performance) +--- Score : 1490826 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Semaphores wait/signal performance) +--- Score : 3269216 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Mutexes lock/unlock performance) +--- Score : 2048180 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (RAM Footprint) +--- System: 120 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 10:58:22 +*** Platform: STM32G4 Hi-resolution Line +*** Test Board: STMicroelectronics STM32 Nucleo64-G474RE +*** +*** Text size: 37584 bytes +*** RO data size: 9844 bytes +*** Data size: 220 bytes +*** BSS size: 5052 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M4 +--- Compiler: GCC 5.4.1 20160919 (release) [ARM/embedded-5-branch revision 240496] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 1 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc-fpu.txt b/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc-fpu.txt new file mode 100644 index 000000000..d7f6452b0 --- /dev/null +++ b/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc-fpu.txt @@ -0,0 +1,372 @@ + +*** ChibiOS/RT Test Suite +*** +*** Compiled: Mar 18 2020 - 11:06:17 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 41760 bytes +*** RO data size: 10668 bytes +*** Data size: 220 bytes +*** BSS size: 9104 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/RT +--- Stable Flag: 1 +--- Version String: 6.1.0 +--- Major Number: 6 +--- Minor Number: 1 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 10000 +--- CH_CFG_INTERVALS_SIZE: 32 +--- CH_CFG_TIME_TYPES_SIZE: 32 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_TIME_QUANTUM: 0 +--- CH_CFG_MEMCORE_SIZE: 0 +--- CH_CFG_NO_IDLE_THREAD: 0 +--- CH_CFG_OPTIMIZE_SPEED: 1 +--- CH_CFG_USE_TM: 1 +--- CH_CFG_USE_REGISTRY: 1 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_SEMAPHORES_PRIORITY: 0 +--- CH_CFG_USE_MUTEXES: 1 +--- CH_CFG_USE_MUTEXES_RECURSIVE: 0 +--- CH_CFG_USE_CONDVARS: 1 +--- CH_CFG_USE_CONDVARS_TIMEOUT: 1 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_EVENTS_TIMEOUT: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_CFG_USE_MESSAGES_PRIORITY: 0 +--- CH_CFG_USE_DYNAMIC: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_TRACE_MASK: 0 +--- CH_DBG_TRACE_BUFFER_SIZE: 128 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- CH_DBG_FILL_THREADS: 0 +--- CH_DBG_THREADS_PROFILING: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (System layer and port interface) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System integrity functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Critical zones functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Interrupts handling functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Thread Sleep functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Ready List functionality, threads priority order) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Priority change test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.4 (Priority change test with Priority Inheritance) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Counter Semaphores) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Semaphore enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Semaphore timeout test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Testing chSemAddCounterI() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Testing chSemWaitSignal() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Testing Binary Semaphores special case) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Mutexes, Condition Variables and Priority Inheritance) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Priority return verification) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Repeated locks, non recursive scenario) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.4 (Condition Variable signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.5 (Condition Variable broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.6 (Condition Variable priority boost test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 10 (Dynamic threads) +---------------------------------------------------------------------------- +--- Test Case 10.1 (Threads creation from Memory Heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Threads creation from Memory Pool) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 11 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 11.1 (Messages performance #1) +--- Score : 1714255 msgs/S, 3428510 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Messages performance #2) +--- Score : 1554056 msgs/S, 3108112 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Messages performance #3) +--- Score : 1558111 msgs/S, 3116222 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Context Switch performance) +--- Score : 5338384 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Threads performance, full cycle) +--- Score : 1087365 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Threads performance, create/exit only) +--- Score : 1389931 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Mass reschedule performance) +--- Score : 494992 reschedules/S, 2969952 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Round-Robin voluntary reschedule) +--- Score : 3844540 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Virtual Timers set/reset performance) +--- Score : 3222632 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Semaphores wait/signal performance) +--- Score : 7999872 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Mutexes lock/unlock performance) +--- Score : 6575244 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (RAM Footprint) +--- System: 2176 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 11:06:17 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 41760 bytes +*** RO data size: 10668 bytes +*** Data size: 220 bytes +*** BSS size: 9104 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7F +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 1 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + diff --git a/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc.txt b/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc.txt new file mode 100644 index 000000000..c8bb5f8a9 --- /dev/null +++ b/doc/rt/reports/benchmarks/rt-stm32h7-480mhz-gcc.txt @@ -0,0 +1,372 @@ + +*** ChibiOS/RT Test Suite +*** +*** Compiled: Mar 18 2020 - 11:02:52 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 41696 bytes +*** RO data size: 10668 bytes +*** Data size: 220 bytes +*** BSS size: 7744 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7 +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (Kernel Info) +--- Product: ChibiOS/RT +--- Stable Flag: 1 +--- Version String: 6.1.0 +--- Major Number: 6 +--- Minor Number: 1 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (Kernel Settings) +--- CH_CFG_ST_RESOLUTION: 32 +--- CH_CFG_ST_FREQUENCY: 10000 +--- CH_CFG_INTERVALS_SIZE: 32 +--- CH_CFG_TIME_TYPES_SIZE: 32 +--- CH_CFG_ST_TIMEDELTA: 2 +--- CH_CFG_TIME_QUANTUM: 0 +--- CH_CFG_MEMCORE_SIZE: 0 +--- CH_CFG_NO_IDLE_THREAD: 0 +--- CH_CFG_OPTIMIZE_SPEED: 1 +--- CH_CFG_USE_TM: 1 +--- CH_CFG_USE_REGISTRY: 1 +--- CH_CFG_USE_WAITEXIT: 1 +--- CH_CFG_USE_SEMAPHORES: 1 +--- CH_CFG_USE_SEMAPHORES_PRIORITY: 0 +--- CH_CFG_USE_MUTEXES: 1 +--- CH_CFG_USE_MUTEXES_RECURSIVE: 0 +--- CH_CFG_USE_CONDVARS: 1 +--- CH_CFG_USE_CONDVARS_TIMEOUT: 1 +--- CH_CFG_USE_EVENTS: 1 +--- CH_CFG_USE_EVENTS_TIMEOUT: 1 +--- CH_CFG_USE_MESSAGES: 1 +--- CH_CFG_USE_MESSAGES_PRIORITY: 0 +--- CH_CFG_USE_DYNAMIC: 1 +--- CH_DBG_STATISTICS: 0 +--- CH_DBG_SYSTEM_STATE_CHECK: 0 +--- CH_DBG_ENABLE_CHECKS: 0 +--- CH_DBG_ENABLE_ASSERTS: 0 +--- CH_DBG_TRACE_MASK: 0 +--- CH_DBG_TRACE_BUFFER_SIZE: 128 +--- CH_DBG_ENABLE_STACK_CHECK: 0 +--- CH_DBG_FILL_THREADS: 0 +--- CH_DBG_THREADS_PROFILING: 0 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (System layer and port interface) +---------------------------------------------------------------------------- +--- Test Case 2.1 (System integrity functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Critical zones functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Interrupts handling functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Time and Intervals Functionality) +---------------------------------------------------------------------------- +--- Test Case 3.1 (System Tick Counter functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Time ranges functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Threads Functionality) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Thread Sleep functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.2 (Ready List functionality, threads priority order) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.3 (Priority change test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 4.4 (Priority change test with Priority Inheritance) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Suspend/Resume) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Suspend and Resume functionality) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Counter Semaphores) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Semaphore primitives, no state change) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.2 (Semaphore enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.3 (Semaphore timeout test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.4 (Testing chSemAddCounterI() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.5 (Testing chSemWaitSignal() functionality) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 6.6 (Testing Binary Semaphores special case) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Mutexes, Condition Variables and Priority Inheritance) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Priority enqueuing test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Priority return verification) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Repeated locks, non recursive scenario) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.4 (Condition Variable signal test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.5 (Condition Variable broadcast test) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.6 (Condition Variable priority boost test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Synchronous Messages) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Messages Server loop) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Event Sources and Event Flags) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Events registration) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Event Flags dispatching) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Events Flags wait using chEvtWaitOne()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Events Flags wait using chEvtWaitAny()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Events Flags wait using chEvtWaitAll()) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Events Flags wait timeouts) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.7 (Broadcasting using chEvtBroadcast()) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 10 (Dynamic threads) +---------------------------------------------------------------------------- +--- Test Case 10.1 (Threads creation from Memory Heap) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 10.2 (Threads creation from Memory Pool) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 11 (Benchmarks) +---------------------------------------------------------------------------- +--- Test Case 11.1 (Messages performance #1) +--- Score : 2222189 msgs/S, 4444378 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.2 (Messages performance #2) +--- Score : 1846129 msgs/S, 3692258 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.3 (Messages performance #3) +--- Score : 1846131 msgs/S, 3692262 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.4 (Context Switch performance) +--- Score : 7164080 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.5 (Threads performance, full cycle) +--- Score : 1284109 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.6 (Threads performance, create/exit only) +--- Score : 1587926 threads/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.7 (Mass reschedule performance) +--- Score : 601077 reschedules/S, 3606462 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.8 (Round-Robin voluntary reschedule) +--- Score : 4804740 ctxswc/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.9 (Virtual Timers set/reset performance) +--- Score : 3401870 timers/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.10 (Semaphores wait/signal performance) +--- Score : 8135492 wait+signal/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.11 (Mutexes lock/unlock performance) +--- Score : 6575248 lock+unlock/S +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 11.12 (RAM Footprint) +--- System: 2176 bytes +--- Thread: 68 bytes +--- Timer : 20 bytes +--- Semaph: 12 bytes +--- Mutex : 16 bytes +--- CondV.: 8 bytes +--- EventS: 4 bytes +--- EventL: 20 bytes +--- MailB.: 40 bytes +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS + +*** ChibiOS OS Library Test Suite +*** +*** Compiled: Mar 18 2020 - 11:02:52 +*** Platform: STM32H755 Dual Core Very High Performance with DSP and FPU +*** Test Board: STMicroelectronics STM32 Nucleo144-H755ZI +*** +*** Text size: 41696 bytes +*** RO data size: 10668 bytes +*** Data size: 220 bytes +*** BSS size: 7744 bytes + +============================================================================ +=== Test Sequence 1 (Information) +---------------------------------------------------------------------------- +--- Test Case 1.1 (Port Info) +--- Architecture: ARMv7E-M +--- Core Variant: Cortex-M7 +--- Compiler: GCC 9.2.1 20191025 (release) [ARM/arm-9-branch revision 277599] +--- Port Info: Advanced kernel mode +--- Natural alignment: 4 +--- Stack alignment: 8 +--- Working area alignment: 8 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.2 (OS Library Info) +--- Product: ChibiOS/LIB +--- Stable Flag: 1 +--- Version String: 1.2.0 +--- Major Number: 1 +--- Minor Number: 2 +--- Patch Number: 0 +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 1.3 (OS Library Settings) +--- CH_CFG_USE_MAILBOXES: 1 +--- CH_CFG_USE_MEMCORE: 1 +--- CH_CFG_USE_HEAP: 1 +--- CH_CFG_USE_MEMPOOLS: 1 +--- CH_CFG_USE_OBJ_FIFOS: 1 +--- CH_CFG_USE_PIPES: 1 +--- CH_CFG_USE_OBJ_CACHES: 1 +--- CH_CFG_USE_DELEGATES: 1 +--- CH_CFG_USE_FACTORY: 1 +--- CH_CFG_FACTORY_MAX_NAMES_LENGTH: 8 +--- CH_CFG_FACTORY_OBJECTS_REGISTRY: 1 +--- CH_CFG_FACTORY_GENERIC_BUFFERS: 1 +--- CH_CFG_FACTORY_SEMAPHORES: 1 +--- CH_CFG_FACTORY_MAILBOXES: 1 +--- CH_CFG_FACTORY_OBJ_FIFOS: 1 +--- CH_CFG_FACTORY_PIPES: 1 +--- Result: SUCCESS +============================================================================ +=== Test Sequence 2 (Mailboxes) +---------------------------------------------------------------------------- +--- Test Case 2.1 (Mailbox normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.2 (Mailbox I-Class API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 2.3 (Mailbox timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 3 (Pipes) +---------------------------------------------------------------------------- +--- Test Case 3.1 (Pipes normal API, non-blocking tests) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 3.2 (Pipe timeouts) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 4 (Jobs Queues) +---------------------------------------------------------------------------- +--- Test Case 4.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 5 (Thread Delegates) +---------------------------------------------------------------------------- +--- Test Case 5.1 (Dispatcher test) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 6 (Objects Caches) +---------------------------------------------------------------------------- +--- Test Case 6.1 (Cache initialization) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 7 (Memory Pools) +---------------------------------------------------------------------------- +--- Test Case 7.1 (Loading and emptying a memory pool) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.2 (Loading and emptying a guarded memory pool without waiting) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 7.3 (Guarded Memory Pools timeout) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 8 (Memory Heaps) +---------------------------------------------------------------------------- +--- Test Case 8.1 (Allocation and fragmentation) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 8.2 (Default Heap) +--- Result: SUCCESS +============================================================================ +=== Test Sequence 9 (Objects Factory) +---------------------------------------------------------------------------- +--- Test Case 9.1 (Objects Registry) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.2 (Dynamic Buffers Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.3 (Dynamic Semaphores Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.4 (Dynamic Mailboxes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.5 (Dynamic Objects FIFOs Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- +--- Test Case 9.6 (Dynamic Pipes Factory) +--- Result: SUCCESS +---------------------------------------------------------------------------- + +Final result: SUCCESS +