git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1784 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2010-03-26 15:08:50 +00:00
parent d451a36054
commit a6c627641e
8 changed files with 397 additions and 239 deletions

View File

@ -148,7 +148,7 @@ CPPWARN = -Wall -Wextra
#
# List all default C defines here, like -D_DEBUG=1
DDEFS = -DLPC1114
DDEFS = -DLPC1114 -D__NEWLIB__
# List all default ASM defines here, like -D_DEBUG=1
DADEFS =

View File

@ -18,8 +18,8 @@
*/
#include "ch.h"
#include "hal.h"
#include "test.h"
//#include "hal.h"
//#include "test.h"
/*
* Red LEDs blinker thread, times are in milliseconds.
@ -29,9 +29,9 @@ static msg_t Thread1(void *arg) {
(void)arg;
while (TRUE) {
palClearPad(IOPORT3, GPIOC_LED);
// palClearPad(IOPORT3, GPIOC_LED);
chThdSleepMilliseconds(500);
palSetPad(IOPORT3, GPIOC_LED);
// palSetPad(IOPORT3, GPIOC_LED);
chThdSleepMilliseconds(500);
}
return 0;
@ -49,7 +49,7 @@ int main(int argc, char **argv) {
/*
* Activates the serial driver 2 using the driver default configuration.
*/
sdStart(&SD2, NULL);
// sdStart(&SD2, NULL);
/*
* Creates the blinker thread.
@ -61,8 +61,8 @@ int main(int argc, char **argv) {
* sleeping in a loop and check the button state.
*/
while (TRUE) {
if (palReadPad(IOPORT1, GPIOA_BUTTON))
TestThread(&SD2);
// if (palReadPad(IOPORT1, GPIOA_BUTTON))
// TestThread(&SD2);
chThdSleepMilliseconds(500);
}
return 0;

View File

@ -1,270 +1,64 @@
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 10916
Compiler : Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Make failed
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 10464
Compiler : Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Make failed
Platform : PowerPC
OS Setup : Minimal kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -O2
Kernel Size = 2176
Compiler : Options : -O2
Make failed
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 9572
Compiler : Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Make failed
Platform : PowerPC
OS Setup : Full kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 9088
Compiler : Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Make failed
Platform : PowerPC
OS Setup : Minimal kernel
Compiler : powerpc-eabi-gcc (Sourcery G++ Lite 4.4-79) 4.4.1
Options : -Os
Kernel Size = 2200
Compiler : Options : -Os
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5360
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4892
Make failed
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb
Kernel Size = 1360
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5156
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4740
Make failed
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb
Kernel Size = 1308
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 4964
Make failed
Platform : ARM Cortex-M3
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4560
Platform : ARM Cortex-M3
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\"
Kernel Size = 1272
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7824
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7416
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2
Kernel Size = 1868
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7592
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7212
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os
Kernel Size = 1824
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7544
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 7148
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\"
Kernel Size = 1796
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 7296
Platform : ARM7TDMI (ARM mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 6936
Platform : ARM7TDMI (ARM mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\"
Kernel Size = 1772
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5156
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4952
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1312
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4988
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4796
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1292
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 5000
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4812
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -O2 -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1268
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=TRUE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4792
Platform : ARM7TDMI (THUMB mode)
OS Setup : Full kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DCH_OPTIMIZE_SPEED=FALSE -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 4636
Platform : ARM7TDMI (THUMB mode)
OS Setup : Minimal kernel
Compiler : arm-elf-gcc (GCC) 4.4.2
Options : -Os -mthumb -ffixed-r7 -DCH_CURRP_REGISTER_CACHE=\"r7\" -DTHUMB -DTHUMB_PRESENT -DTHUMB_NO_INTERWORKING
Kernel Size = 1252
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -O2 -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5548
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -O2 -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 5036
Platform : MSP430
OS Setup : Minimal kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -O2
Kernel Size = 1172
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -Os -DCH_OPTIMIZE_SPEED=TRUE
Kernel Size = 5484
Platform : MSP430
OS Setup : Full kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -Os -DCH_OPTIMIZE_SPEED=FALSE
Kernel Size = 4992
Platform : MSP430
OS Setup : Minimal kernel
Compiler : msp430-gcc (GCC) 3.2.3
Options : -Os
Kernel Size = 1172
Make failed

View File

@ -23,7 +23,8 @@
* @addtogroup ARM7_CORE
* @{
*/
/** @cond never */
#if !defined(__DOXYGEN__)
.set MODE_USR, 0x10
.set MODE_FIQ, 0x11
@ -177,5 +178,6 @@ hwinit1:
bx lr
.code 32
/** @endcond */
#endif
/** @} */

View File

@ -0,0 +1,118 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file ARMCMx/LPC111x/cmparams.h
* @brief ARM Cortex-M0 LPC111x specific parameters.
*
* @defgroup ARMCMx_LPC111x LPC111x specific parameters
* @ingroup ARMCMx
* @details This file contains the Cortex-M0 specific parameters for the
* LPC111x platform.
* @{
*/
#ifndef _CMPARAMS_H_
#define _CMPARAMS_H_
/*===========================================================================*/
/* Constants parameters. */
/*===========================================================================*/
/**
* @brief Cortex core model.
*/
#define CORTEX_MODEL CORTEX_M0
/**
* @brief Systick unit presence.
*/
#define CORTEX_HAS_ST TRUE
/**
* @brief Memory Protection unit presence.
*/
#define CORTEX_HAS_MPU FALSE
/**
* @brief Number of bits in priority masks.
* @details The available number of priority levels is equal to
* (1 << @p CORTEX_PRIORITY_BITS).
*/
#define CORTEX_PRIORITY_BITS 2
/**
* @brief Priority to priority mask conversion macro.
*/
#define CORTEX_PRIORITY(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
/*===========================================================================*/
/* Configurable parameters. */
/*===========================================================================*/
/**
* @brief BASEPRI user level, 0 = disabled.
*/
#ifndef CORTEX_BASEPRI_USER
#define CORTEX_BASEPRI_USER CORTEX_PRIORITY(0)
#endif
/**
* @brief BASEPRI level within kernel lock.
* @details Priority levels higher than this one (lower values) are unaffected
* by the OS activity and can be classified as fast interrupt sources,
* see @ref interrupt_classes.
*/
#ifndef CORTEX_BASEPRI_KERNEL
#define CORTEX_BASEPRI_KERNEL CORTEX_PRIORITY(1)
#endif
/**
* @brief SVCALL handler priority.
* @note This priority must always be one level above the @p BASEPRI_KERNEL
* value.
* @note It is recommended, but not mandatory, to leave this priority level
* for this handler alone.
*/
#ifndef CORTEX_PRIORITY_SVCALL
#define CORTEX_PRIORITY_SVCALL CORTEX_PRIORITY(0)
#endif
/**
* @brief SYSTICK handler priority.
*/
#ifndef CORTEX_PRIORITY_SYSTICK
#define CORTEX_PRIORITY_SYSTICK CORTEX_PRIORITY(2)
#endif
/**
* @brief PENDSV handler priority.
* @note It is recommended to leave this priority level for this handler
* alone.
* @note This is a reserved handler and its priority must always be the
* lowest priority in the system in order to be always executed last
* in the interrupt servicing chain.
*/
#ifndef CORTEX_PRIORITY_PENDSV
#define CORTEX_PRIORITY_PENDSV CORTEX_PRIORITY(3)
#endif
#endif /* _CMPARAMS_H_ */
/** @} */

View File

@ -0,0 +1,10 @@
# List of the ChibiOS/RT Cortex-M0 LPC111x port files.
PORTSRC = ${CHIBIOS}/os/ports/GCC/ARMCMx/chcore.c \
${CHIBIOS}/os/ports/GCC/ARMCMx/nvic.c
# ${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis/core_cm0.c
PORTASM = ${CHIBIOS}/os/ports/GCC/ARMCMx/crt0.s
PORTINC = ${CHIBIOS}/os/ports/GCC/ARMCMx \
${CHIBIOS}/os/ports/GCC/ARMCMx/LPC111x \
${CHIBIOS}/os/ports/GCC/ARMCMx/cmsis

View File

@ -0,0 +1,212 @@
/*
ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
This file is part of ChibiOS/RT.
ChibiOS/RT is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS/RT is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
.syntax unified
.thumb
.section vectors
_vectors:
.word __ram_end__
.word ResetHandler
.word NMIVector
.word HardFaultVector
.word MemManageVector
.word BusFaultVector
.word UsageFaultVector
.word Vector1C
.word Vector20
.word Vector24
.word Vector28
.word SVCallVector
.word DebugMonitorVector
.word Vector34
.word PendSVVector
.word SysTickVector
.word Vector40
.word Vector44
.word Vector48
.word Vector4C
.word Vector50
.word Vector54
.word Vector58
.word Vector5C
.word Vector60
.word Vector64
.word Vector68
.word Vector6C
.word Vector70
.word Vector74
.word Vector78
.word Vector7C
.word Vector80
.word Vector84
.word Vector88
.word Vector8C
.word Vector90
.word Vector94
.word Vector98
.word Vector9C
.word VectorA0
.word VectorA4
.word VectorA8
.word VectorAC
.word VectorB0
.word VectorB4
.word VectorB8
.word VectorBC
.weak NMIVector
NMIVector:
.weak HardFaultVector
HardFaultVector:
.weak MemManageVector
MemManageVector:
.weak BusFaultVector
BusFaultVector:
.weak UsageFaultVector
UsageFaultVector:
.weak Vector1C
Vector1C:
.weak Vector20
Vector20:
.weak Vector24
Vector24:
.weak Vector28
Vector28:
.weak SVCallVector
SVCallVector:
.weak DebugMonitorVector
DebugMonitorVector:
.weak Vector34
Vector34:
.weak PendSVVector
PendSVVector:
.weak SysTickVector
SysTickVector:
.weak Vector40
Vector40:
.weak Vector44
Vector44:
.weak Vector48
Vector48:
.weak Vector4C
Vector4C:
.weak Vector50
Vector50:
.weak Vector54
Vector54:
.weak Vector58
Vector58:
.weak Vector5C
Vector5C:
.weak Vector60
Vector60:
.weak Vector64
Vector64:
.weak Vector68
Vector68:
.weak Vector6C
Vector6C:
.weak Vector70
Vector70:
.weak Vector74
Vector74:
.weak Vector78
Vector78:
.weak Vector7C
Vector7C:
.weak Vector80
Vector80:
.weak Vector84
Vector84:
.weak Vector88
Vector88:
.weak Vector8C
Vector8C:
.weak Vector90
Vector90:
.weak Vector94
Vector94:
.weak Vector98
Vector98:
.weak Vector9C
Vector9C:
.weak VectorA0
VectorA0:
.weak VectorA4
VectorA4:
.weak VectorA8
VectorA8:
.weak VectorAC
VectorAC:
.weak VectorB0
VectorB0:
.weak VectorB4
VectorB4:
.weak VectorB8
VectorB8:
.weak VectorBC
VectorBC:
here: b here

View File

@ -23,7 +23,10 @@
* @addtogroup ARMCMx_CORE
* @{
*/
/** @cond never */
#include "cmparams.h"
#if !defined(__DOXYGEN__)
.set CONTROL_MODE_PRIVILEGED, 0
.set CONTROL_MODE_UNPRIVILEGED, 1
@ -49,7 +52,7 @@ ResetHandler:
*/
ldr r0, =__ram_end__
ldr r1, =__main_stack_size__
sub r0, r0, r1
subs r0, r0, r1
/* { r0 = main stack low address } */
msr PSP, r0
/* Early initialization. */
@ -63,10 +66,20 @@ ResetHandler:
ldr r3, =_edata
dloop:
cmp r2, r3
#if CORTEX_MODEL == CORTEX_M0
bge enddloop
ldr r0, [r1]
str r0, [r2]
adds r0, r0, #4
adds r1, r1, #4
b dloop
enddloop:
#else
ittt lo
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo dloop
#endif
/*
* BSS initialization.
* NOTE: It assumes that the BSS size is a multiple of 4.
@ -76,9 +89,17 @@ dloop:
ldr r2, =_bss_end
bloop:
cmp r1, r2
#if CORTEX_MODEL == CORTEX_M0
bge endbloop
str r0, [r1]
adds r1, r1, #4
b bloop
endbloop:
#else
itt lo
strlo r0, [r1], #4
blo bloop
#endif
/* Switches to the Process Stack. */
movs r0, #CONTROL_MODE_PRIVILEGED | CONTROL_USE_PSP
msr CONTROL, r0
@ -124,5 +145,6 @@ hwinit0:
hwinit1:
bx lr
/** @endcond */
#endif
/** @} */