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RTC. Added enables/disables of writing access to BKP registers in all write operations. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3794 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2012-01-12 07:09:24 +00:00
parent 7fc77129b1
commit a7e909177d
1 changed files with 13 additions and 2 deletions
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15
os/hal/platforms/STM32/RTCv1/rtc_lld.c
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@ -61,6 +61,7 @@ RTCDriver RTCD1;
*/ */
static void rtc_lld_serve_interrupt(RTCDriver *rtcp) { static void rtc_lld_serve_interrupt(RTCDriver *rtcp) {
PWR->CR |= PWR_CR_DBP;
chSysLockFromIsr(); chSysLockFromIsr();
if ((RTC->CRH & RTC_CRH_SECIE) && (RTC->CRL & RTC_CRL_SECF)) { if ((RTC->CRH & RTC_CRH_SECIE) && (RTC->CRL & RTC_CRL_SECF)) {
@ -77,6 +78,7 @@ static void rtc_lld_serve_interrupt(RTCDriver *rtcp) {
} }
chSysUnlockFromIsr(); chSysUnlockFromIsr();
PWR->CR &= ~PWR_CR_DBP;
} }
/** /**
@ -136,10 +138,12 @@ CH_IRQ_HANDLER(RTC_IRQHandler) {
*/ */
void rtc_lld_init(void){ void rtc_lld_init(void){
PWR->CR |= PWR_CR_DBP;
/* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling /* Ensure that RTC_CNT and RTC_DIV contain actual values after enabling
clocking on APB1, because these values only update when APB1 clocking on APB1, because these values only update when APB1
functioning.*/ functioning.*/
RTC->CRL = 0; RTC->CRL &= ~(RTC_CRL_OWF | RTC_CRL_ALRF | RTC_CRL_SECF);
while (!(RTC->CRL & RTC_CRL_RSF)) while (!(RTC->CRL & RTC_CRL_RSF))
; ;
@ -164,6 +168,8 @@ void rtc_lld_init(void){
rtc_lld_release(); rtc_lld_release();
} }
PWR->CR &= ~PWR_CR_DBP;
/* Callback initially disabled.*/ /* Callback initially disabled.*/
RTCD1.callback = NULL; RTCD1.callback = NULL;
} }
@ -182,12 +188,14 @@ void rtc_lld_set_time(RTCDriver *rtcp, const RTCTime *timespec) {
(void)rtcp; (void)rtcp;
PWR->CR |= PWR_CR_DBP;
rtc_lld_acquire(); rtc_lld_acquire();
RTC->CRL |= RTC_CRL_CNF; RTC->CRL |= RTC_CRL_CNF;
RTC->CNTH = (uint16_t)(timespec->tv_sec >> 16); RTC->CNTH = (uint16_t)(timespec->tv_sec >> 16);
RTC->CNTL = (uint16_t)(timespec->tv_sec & 0xFFFF); RTC->CNTL = (uint16_t)(timespec->tv_sec & 0xFFFF);
RTC->CRL &= ~RTC_CRL_CNF; RTC->CRL &= ~RTC_CRL_CNF;
rtc_lld_release(); rtc_lld_release();
PWR->CR &= ~PWR_CR_DBP;
} }
/** /**
@ -232,9 +240,9 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
(void)rtcp; (void)rtcp;
(void)alarm; (void)alarm;
/* Enters configuration mode and writes ALRHx registers then leaves the /* Enters configuration mode and writes ALRHx registers then leaves the
configuration mode.*/ configuration mode.*/
PWR->CR |= PWR_CR_DBP;
rtc_lld_acquire(); rtc_lld_acquire();
RTC->CRL |= RTC_CRL_CNF; RTC->CRL |= RTC_CRL_CNF;
if (alarmspec != NULL) { if (alarmspec != NULL) {
@ -247,6 +255,7 @@ void rtc_lld_set_alarm(RTCDriver *rtcp,
} }
RTC->CRL &= ~RTC_CRL_CNF; RTC->CRL &= ~RTC_CRL_CNF;
rtc_lld_release(); rtc_lld_release();
PWR->CR &= ~PWR_CR_DBP;
} }
/** /**
@ -284,6 +293,7 @@ void rtc_lld_get_alarm(RTCDriver *rtcp,
*/ */
void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) { void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
PWR->CR |= PWR_CR_DBP;
rtc_lld_acquire(); rtc_lld_acquire();
if (callback != NULL) { if (callback != NULL) {
rtcp->callback = callback; rtcp->callback = callback;
@ -301,6 +311,7 @@ void rtc_lld_set_callback(RTCDriver *rtcp, rtccb_t callback) {
RTC->CRH &= ~(RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE); RTC->CRH &= ~(RTC_CRH_OWIE | RTC_CRH_ALRIE | RTC_CRH_SECIE);
} }
rtc_lld_release(); rtc_lld_release();
PWR->CR &= ~PWR_CR_DBP;
} }
#endif /* HAL_USE_RTC */ #endif /* HAL_USE_RTC */