renaming to make Eclipse happy

This commit is contained in:
rusefi 2017-03-29 21:05:17 -04:00 committed by Fabien Poussin
parent 7c7e795bdc
commit a8f3955efd
1 changed files with 148 additions and 148 deletions

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@ -1,148 +1,148 @@
/* /*
ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio. ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio.
This file is part of ChibiOS. This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or the Free Software Foundation; either version 3 of the License, or
(at your option) any later version. (at your option) any later version.
ChibiOS is distributed in the hope that it will be useful, ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details. GNU General Public License for more details.
You should have received a copy of the GNU General Public License You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. along with this program. If not, see <http://www.gnu.org/licenses/>.
*/ */
/** /**
* @file compilers/GCC/chcoreasm_v7m.s * @file compilers/GCC/chcoreasm_v7m.s
* @brief ARMv7-M architecture port low level code. * @brief ARMv7-M architecture port low level code.
* *
* @addtogroup ARMCMx_GCC_CORE * @addtogroup ARMCMx_GCC_CORE
* @{ * @{
*/ */
#if !defined(FALSE) || defined(__DOXYGEN__) #if !defined(FALSE) || defined(__DOXYGEN__)
#define FALSE 0 #define FALSE 0
#endif #endif
#if !defined(TRUE) || defined(__DOXYGEN__) #if !defined(TRUE) || defined(__DOXYGEN__)
#define TRUE 1 #define TRUE 1
#endif #endif
#define _FROM_ASM_ #define _FROM_ASM_
#include "chconf.h" #include "chconf.h"
#include "chcore.h" #include "chcore.h"
#if !defined(__DOXYGEN__) #if !defined(__DOXYGEN__)
.set CONTEXT_OFFSET, 12 .set CONTEXT_OFFSET, 12
.set SCB_ICSR, 0xE000ED04 .set SCB_ICSR, 0xE000ED04
.set ICSR_PENDSVSET, 0x10000000 .set ICSR_PENDSVSET, 0x10000000
.syntax unified .syntax unified
.cpu cortex-m4 .cpu cortex-m4
#if CORTEX_USE_FPU #if CORTEX_USE_FPU
.fpu fpv4-sp-d16 .fpu fpv4-sp-d16
#else #else
.fpu softvfp .fpu softvfp
#endif #endif
.thumb .thumb
.text .text
/*--------------------------------------------------------------------------* /*--------------------------------------------------------------------------*
* Performs a context switch between two threads. * Performs a context switch between two threads.
*--------------------------------------------------------------------------*/ *--------------------------------------------------------------------------*/
.thumb_func .thumb_func
.globl _port_switch .globl _port_switch
_port_switch: _port_switch:
push {r4, r5, r6, r7, r8, r9, r10, r11, lr} push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
#if CORTEX_USE_FPU #if CORTEX_USE_FPU
vpush {s16-s31} vpush {s16-s31}
#endif #endif
str sp, [r1, #CONTEXT_OFFSET] str sp, [r1, #CONTEXT_OFFSET]
#if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \ #if (CORTEX_SIMPLIFIED_PRIORITY == FALSE) && \
((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)) ((CORTEX_MODEL == 3) || (CORTEX_MODEL == 4))
/* Workaround for ARM errata 752419, only applied if /* Workaround for ARM errata 752419, only applied if
condition exists for it to be triggered.*/ condition exists for it to be triggered.*/
ldr r3, [r0, #CONTEXT_OFFSET] ldr r3, [r0, #CONTEXT_OFFSET]
mov sp, r3 mov sp, r3
#else #else
ldr sp, [r0, #CONTEXT_OFFSET] ldr sp, [r0, #CONTEXT_OFFSET]
#endif #endif
#if CORTEX_USE_FPU #if CORTEX_USE_FPU
vpop {s16-s31} vpop {s16-s31}
#endif #endif
pop {r4, r5, r6, r7, r8, r9, r10, r11, pc} pop {r4, r5, r6, r7, r8, r9, r10, r11, pc}
/*--------------------------------------------------------------------------* /*--------------------------------------------------------------------------*
* Start a thread by invoking its work function. * Start a thread by invoking its work function.
* *
* Threads execution starts here, the code leaves the system critical zone * Threads execution starts here, the code leaves the system critical zone
* and then jumps into the thread function passed in register R4. The * and then jumps into the thread function passed in register R4. The
* register R5 contains the thread parameter. The function chThdExit() is * register R5 contains the thread parameter. The function chThdExit() is
* called on thread function return. * called on thread function return.
*--------------------------------------------------------------------------*/ *--------------------------------------------------------------------------*/
.thumb_func .thumb_func
.globl _port_thread_start .globl _port_thread_start
_port_thread_start: _port_thread_start:
#if CH_DBG_SYSTEM_STATE_CHECK #if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_unlock bl _dbg_check_unlock
#endif #endif
#if CH_DBG_STATISTICS #if CH_DBG_STATISTICS
bl _stats_stop_measure_crit_thd bl _stats_stop_measure_crit_thd
#endif #endif
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
cpsie i cpsie i
#else #else
movs r3, #0 /* CORTEX_BASEPRI_DISABLED */ movs r3, #0 /* CORTEX_BASEPRI_DISABLED */
msr BASEPRI, r3 msr BASEPRI, r3
#endif #endif
mov r0, r5 mov r0, r5
blx r4 blx r4
movs r0, #0 /* MSG_OK */ movs r0, #0 /* MSG_OK */
bl chThdExit bl chThdExit
/*--------------------------------------------------------------------------* /*--------------------------------------------------------------------------*
* Post-IRQ switch code. * Post-IRQ switch code.
* *
* Exception handlers return here for context switching. * Exception handlers return here for context switching.
*--------------------------------------------------------------------------*/ *--------------------------------------------------------------------------*/
.thumb_func .thumb_func
.globl _port_switch_from_isr .globl _port_switch_from_isr
_port_switch_from_isr: _port_switch_from_isr:
#if CH_DBG_STATISTICS #if CH_DBG_STATISTICS
bl _stats_start_measure_crit_thd bl _stats_start_measure_crit_thd
#endif #endif
#if CH_DBG_SYSTEM_STATE_CHECK #if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_lock bl _dbg_check_lock
#endif #endif
bl chSchDoReschedule bl chSchDoReschedule
#if CH_DBG_SYSTEM_STATE_CHECK #if CH_DBG_SYSTEM_STATE_CHECK
bl _dbg_check_unlock bl _dbg_check_unlock
#endif #endif
#if CH_DBG_STATISTICS #if CH_DBG_STATISTICS
bl _stats_stop_measure_crit_thd bl _stats_stop_measure_crit_thd
#endif #endif
.globl _port_exit_from_isr .globl _port_exit_from_isr
_port_exit_from_isr: _port_exit_from_isr:
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
movw r3, #:lower16:SCB_ICSR movw r3, #:lower16:SCB_ICSR
movt r3, #:upper16:SCB_ICSR movt r3, #:upper16:SCB_ICSR
mov r2, ICSR_PENDSVSET mov r2, ICSR_PENDSVSET
str r2, [r3, #0] str r2, [r3, #0]
cpsie i cpsie i
#else /* !CORTEX_SIMPLIFIED_PRIORITY */ #else /* !CORTEX_SIMPLIFIED_PRIORITY */
svc #0 svc #0
#endif /* !CORTEX_SIMPLIFIED_PRIORITY */ #endif /* !CORTEX_SIMPLIFIED_PRIORITY */
.L1: b .L1 .L1: b .L1
#endif /* !defined(__DOXYGEN__) */ #endif /* !defined(__DOXYGEN__) */
/** @} */ /** @} */