Removed ADC DMA error hook macro from the various mcuconf.h, it is no more required.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3393 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
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859c2c7599
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@ -51,7 +51,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -59,7 +59,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -62,7 +62,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 FALSE
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#define STM32_ADC_USE_ADC1 FALSE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -59,7 +59,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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@ -52,7 +52,6 @@
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_USE_ADC1 TRUE
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_DMA_PRIORITY 2
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_ADC1_IRQ_PRIORITY 5
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#define STM32_ADC_DMA_ERROR_HOOK(adcp) chSysHalt()
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/*
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/*
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* CAN driver system settings.
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* CAN driver system settings.
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