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ChibiOS
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Fixed minor problem with NVIC support. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1314 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2009-11-18 22:45:27 +00:00
parent 1dd5442c8c
commit a943eaecc7
3 changed files with 5 additions and 2 deletions
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4
os/io/platforms/STM32/spi_lld.c
View File

@ -207,17 +207,17 @@ void spi_lld_start(SPIDriver *spip) {
if (spip->spd_state == SPI_STOP) {
#if USE_STM32_SPI1
if (&SPID1 == spip) {
dmaEnable(DMA1_ID);
NVICEnableVector(DMA1_Channel2_IRQn, STM32_SPI1_IRQ_PRIORITY);
NVICEnableVector(DMA1_Channel3_IRQn, STM32_SPI1_IRQ_PRIORITY);
dmaEnable(DMA1_ID);
RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
}
#endif
#if USE_STM32_SPI2
if (&SPID2 == spip) {
dmaEnable(DMA1_ID);
NVICEnableVector(DMA1_Channel4_IRQn, STM32_SPI2_IRQ_PRIORITY);
NVICEnableVector(DMA1_Channel5_IRQn, STM32_SPI2_IRQ_PRIORITY);
dmaEnable(DMA1_ID);
RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
}
#endif

1
os/ports/GCC/ARMCM3/nvic.c
View File

@ -39,6 +39,7 @@ void NVICEnableVector(uint32_t n, uint32_t prio) {
unsigned sh = (n & 3) << 3;
NVIC_IPR(n >> 2) = (NVIC_IPR(n >> 2) & ~(0xFF << sh)) | (prio << sh);
NVIC_ICPR(n >> 5) = 1 << (n & 0x1F);
NVIC_ISER(n >> 5) = 1 << (n & 0x1F);
}

2
readme.txt
View File

@ -3,6 +3,8 @@
*****************************************************************************
*** 1.3.5 ***
- CHANGE: In the Cortex-M3 port, modified the NVICEnableVector() function
to make it clear pending interrupts.
*** 1.3.4 ***
- FIX: Fixed bug in STM32 PAL port driver (bug 2897636).