git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/stable_2.2.x@2824 35acf78f-673a-0410-8e92-d51de3d6d3f4
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gdisirio
parent
c413e450e1
commit
aa6802f223
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@ -34,11 +34,6 @@
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#include "ch.h"
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#include "ch.h"
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/**
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* @brief PC register temporary storage.
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*/
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regarm_t _port_saved_pc;
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/**
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/**
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* @brief System Timer vector.
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* @brief System Timer vector.
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* @details This interrupt is used as system tick.
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* @details This interrupt is used as system tick.
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@ -39,10 +39,8 @@
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/* Port implementation part. */
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/* Port implementation part. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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#if !defined(__DOXYGEN__)
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* @brief Cortex-Mx exception context.
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struct extctx {
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*/
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struct cmxctx {
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regarm_t r0;
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regarm_t r0;
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regarm_t r1;
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regarm_t r1;
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regarm_t r2;
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regarm_t r2;
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@ -53,18 +51,6 @@ struct cmxctx {
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regarm_t xpsr;
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regarm_t xpsr;
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};
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};
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#if !defined(__DOXYGEN__)
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struct extctx {
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regarm_t xpsr;
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regarm_t r12;
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regarm_t lr;
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regarm_t r0;
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regarm_t r1;
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regarm_t r2;
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regarm_t r3;
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regarm_t pc;
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};
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struct intctx {
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struct intctx {
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regarm_t r8;
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regarm_t r8;
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regarm_t r9;
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regarm_t r9;
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@ -238,10 +224,6 @@ struct intctx {
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}
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}
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#endif
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#endif
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#if !defined(__DOXYGEN__)
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extern regarm_t _port_saved_pc;
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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@ -37,16 +37,15 @@
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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EXTCTX_SIZE SET 32
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EXTCTX_SIZE SET 32
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CONTEXT_OFFSET SET 12
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CONTEXT_OFFSET SET 12
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SCB_ICSR SET 0xE000ED04
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SECTION .text:CODE:NOROOT(2)
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SECTION .text:CODE:NOROOT(2)
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EXTERN chThdExit
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EXTERN chThdExit
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EXTERN chSchIsRescRequiredExI
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EXTERN chSchIsRescRequiredExI
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EXTERN chSchDoRescheduleI
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EXTERN chSchDoRescheduleI
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EXTERN _port_saved_pc
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EXTERN _port_irq_nesting
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THUMB
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THUMB
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@ -83,29 +82,32 @@ _port_thread_start:
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blx r4
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blx r4
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bl chThdExit
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bl chThdExit
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/*
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* NMI vector.
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* The NMI vector is used for exception mode re-entering after a context
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* switch.
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*/
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PUBLIC NMIVector
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NMIVector:
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mrs r3, PSP
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adds r3, r3, #32
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msr PSP, r3
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cpsie i
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bx lr
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/*
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/*
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* Post-IRQ switch code.
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* Post-IRQ switch code.
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* Exception handlers return here for context switching.
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* Exception handlers return here for context switching.
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*/
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*/
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PUBLIC _port_switch_from_isr
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PUBLIC _port_switch_from_isr
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_port_switch_from_isr:
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_port_switch_from_isr:
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/* Note, saves r4 to make space for the PC.*/
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push {r0, r1, r2, r3, r4}
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mrs r0, APSR
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mov r1, r12
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push {r0, r1, lr}
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ldr r0, =_port_saved_pc
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ldr r0, [r0]
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adds r0, r0, #1
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str r0, [sp, #28]
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bl chSchDoRescheduleI
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bl chSchDoRescheduleI
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pop {r0, r1, r2}
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movs r3, #128
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mov r12, r1
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lsls r3, r3, #24
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msr APSR, r0
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ldr r2, =SCB_ICSR
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mov lr, r2
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str r3, [r2, #0]
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pop {r0, r1, r2, r3}
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_waitnmi:
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cpsie i
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b _waitnmi
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pop {pc}
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/*
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/*
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* Reschedule verification and setup after an IRQ.
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* Reschedule verification and setup after an IRQ.
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@ -124,11 +126,13 @@ stillnested
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pop {r3, pc}
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pop {r3, pc}
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doresch
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doresch
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mrs r3, PSP
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mrs r3, PSP
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ldr r2, =_port_saved_pc
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subs r3, r3, #32
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ldr r1, [r3, #24]
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msr PSP, r3
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str r1, [r2]
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ldr r2, =_port_switch_from_isr
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ldr r2, =_port_switch_from_isr
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str r2, [r3, #24]
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str r2, [r3, #24]
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movs r2, #128
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lsls r2, r2, #17
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str r2, [r3, #28]
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pop {r3, pc}
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pop {r3, pc}
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END
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END
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@ -34,11 +34,6 @@
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#include "ch.h"
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#include "ch.h"
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/**
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* @brief PC register temporary storage.
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*/
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regarm_t _port_saved_pc;
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/**
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/**
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* @brief System Timer vector.
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* @brief System Timer vector.
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* @details This interrupt is used as system tick.
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* @details This interrupt is used as system tick.
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/* Port implementation part. */
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/* Port implementation part. */
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/*===========================================================================*/
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/*===========================================================================*/
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/**
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#if !defined(__DOXYGEN__)
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* @brief Cortex-Mx exception context.
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struct extctx {
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*/
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struct cmxctx {
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regarm_t r0;
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regarm_t r0;
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regarm_t r1;
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regarm_t r1;
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regarm_t r2;
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regarm_t r2;
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@ -53,18 +51,6 @@ struct cmxctx {
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regarm_t xpsr;
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regarm_t xpsr;
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};
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};
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#if !defined(__DOXYGEN__)
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struct extctx {
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regarm_t xpsr;
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regarm_t r12;
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regarm_t lr;
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regarm_t r0;
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regarm_t r1;
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regarm_t r2;
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regarm_t r3;
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regarm_t pc;
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};
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struct intctx {
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struct intctx {
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regarm_t r8;
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regarm_t r8;
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regarm_t r9;
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regarm_t r9;
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@ -230,10 +216,6 @@ struct intctx {
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*/
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*/
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#define port_switch(ntp, otp) _port_switch(ntp, otp)
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#define port_switch(ntp, otp) _port_switch(ntp, otp)
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#if !defined(__DOXYGEN__)
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extern regarm_t _port_saved_pc;
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#endif
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#ifdef __cplusplus
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#ifdef __cplusplus
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extern "C" {
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extern "C" {
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#endif
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#endif
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EXTCTX_SIZE EQU 32
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EXTCTX_SIZE EQU 32
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CONTEXT_OFFSET EQU 12
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CONTEXT_OFFSET EQU 12
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SCB_ICSR EQU 0xE000ED04
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PRESERVE8
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PRESERVE8
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THUMB
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THUMB
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IMPORT chThdExit
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IMPORT chThdExit
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IMPORT chSchIsRescRequiredExI
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IMPORT chSchIsRescRequiredExI
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IMPORT chSchDoRescheduleI
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IMPORT chSchDoRescheduleI
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IMPORT _port_saved_pc
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/*
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/*
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* Performs a context switch between two threads.
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* Performs a context switch between two threads.
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bl chThdExit
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bl chThdExit
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ENDP
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ENDP
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/*
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* NMI vector.
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* The NMI vector is used for exception mode re-entering after a context
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* switch.
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*/
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EXPORT NMIVector
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NMIVector PROC
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mrs r3, PSP
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adds r3, r3, #32
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msr PSP, r3
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cpsie i
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bx lr
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ENDP
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/*
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/*
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* Post-IRQ switch code.
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* Post-IRQ switch code.
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* Exception handlers return here for context switching.
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* Exception handlers return here for context switching.
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*/
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*/
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EXPORT _port_switch_from_isr
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EXPORT _port_switch_from_isr
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_port_switch_from_isr PROC
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_port_switch_from_isr PROC
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/* Note, saves r4 to make space for the PC.*/
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push {r0, r1, r2, r3, r4}
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mrs r0, APSR
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mov r1, r12
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push {r0, r1, lr}
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ldr r0, =_port_saved_pc
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ldr r0, [r0]
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adds r0, r0, #1
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str r0, [sp, #28]
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bl chSchDoRescheduleI
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bl chSchDoRescheduleI
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pop {r0, r1, r2}
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movs r3, #128
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mov r12, r1
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lsls r3, r3, #24
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msr APSR, r0
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ldr r2, =SCB_ICSR
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mov lr, r2
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str r3, [r2, #0]
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pop {r0, r1, r2, r3}
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_waitnmi b _waitnmi
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cpsie i
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pop {pc}
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ENDP
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ENDP
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/*
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/*
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pop {r3, pc}
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pop {r3, pc}
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doresch
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doresch
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mrs r3, PSP
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mrs r3, PSP
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ldr r2, =_port_saved_pc
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subs r3, r3, #32
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ldr r1, [r3, #24]
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msr PSP, r3
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str r1, [r2]
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ldr r2, =_port_switch_from_isr
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ldr r2, =_port_switch_from_isr
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str r2, [r3, #24]
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str r2, [r3, #24]
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movs r2, #128
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lsls r2, r2, #17
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str r2, [r3, #28]
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pop {r3, pc}
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pop {r3, pc}
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ENDP
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ENDP
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