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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3224 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2011-08-13 07:06:02 +00:00
parent 43752ee8d1
commit aaad958769
21 changed files with 136 additions and 106 deletions
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8
os/hal/platforms/Posix/hal_lld.c
View File

@ -78,8 +78,8 @@ void ChkIntSources(void) {
#if HAL_USE_SERIAL #if HAL_USE_SERIAL
if (sd_lld_interrupt_pending()) { if (sd_lld_interrupt_pending()) {
if (chSchIsRescRequiredExI()) if (chSchIsPreemptionRequired())
chSchDoRescheduleI(); chSchDoReschedule();
return; return;
} }
#endif #endif
@ -88,8 +88,8 @@ void ChkIntSources(void) {
if (timercmp(&tv, &nextcnt, >=)) { if (timercmp(&tv, &nextcnt, >=)) {
timeradd(&nextcnt, &tick, &nextcnt); timeradd(&nextcnt, &tick, &nextcnt);
chSysTimerHandlerI(); chSysTimerHandlerI();
if (chSchIsRescRequiredExI()) if (chSchIsPreemptionRequired())
chSchDoRescheduleI(); chSchDoReschedule();
} }
} }

8
os/hal/platforms/Win32/hal_lld.c
View File

@ -83,8 +83,8 @@ void ChkIntSources(void) {
#if HAL_USE_SERIAL #if HAL_USE_SERIAL
if (sd_lld_interrupt_pending()) { if (sd_lld_interrupt_pending()) {
if (chSchIsRescRequiredExI()) if (chSchIsPreemptionRequired())
chSchDoRescheduleI(); chSchDoReschedule();
return; return;
} }
#endif #endif
@ -94,8 +94,8 @@ void ChkIntSources(void) {
if (n.QuadPart > nextcnt.QuadPart) { if (n.QuadPart > nextcnt.QuadPart) {
nextcnt.QuadPart += slice.QuadPart; nextcnt.QuadPart += slice.QuadPart;
chSysTimerHandlerI(); chSysTimerHandlerI();
if (chSchIsRescRequiredExI()) if (chSchIsPreemptionRequired())
chSchDoRescheduleI(); chSchDoReschedule();
} }
} }

39
os/kernel/include/chschd.h
View File

@ -134,14 +134,14 @@ extern "C" {
#if !defined(PORT_OPTIMIZED_WAKEUPS) #if !defined(PORT_OPTIMIZED_WAKEUPS)
void chSchWakeupS(Thread *tp, msg_t msg); void chSchWakeupS(Thread *tp, msg_t msg);
#endif #endif
#if !defined(PORT_OPTIMIZED_DORESCHEDULEI)
void chSchDoRescheduleI(void);
#endif
#if !defined(PORT_OPTIMIZED_RESCHEDULES) #if !defined(PORT_OPTIMIZED_RESCHEDULES)
void chSchRescheduleS(void); void chSchRescheduleS(void);
#endif #endif
#if !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI) #if !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED)
bool_t chSchIsRescRequiredExI(void); bool_t chSchIsPreemptionRequired(void);
#endif
#if !defined(PORT_OPTIMIZED_DORESCHEDULE)
void chSchDoReschedule(void);
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus
} }
@ -179,10 +179,37 @@ extern "C" {
#if !defined(PORT_OPTIMIZED_DOYIELDS) || defined(__DOXYGEN__) #if !defined(PORT_OPTIMIZED_DOYIELDS) || defined(__DOXYGEN__)
#define chSchDoYieldS() { \ #define chSchDoYieldS() { \
if (chSchCanYieldS()) \ if (chSchCanYieldS()) \
chSchDoRescheduleI(); \ chSchDoReschedule(); \
} }
#endif /* !defined(PORT_OPTIMIZED_DOYIELDS) */ #endif /* !defined(PORT_OPTIMIZED_DOYIELDS) */
/**
* @brief Inlineable preemption code.
* @details This is the common preemption code, this function must be invoked
* exclusively from the port layer.
*
* @special
*/
#if (CH_TIME_QUANTUM > 0) || defined(__DOXYGEN__)
#define chSchPreemption() { \
tprio_t p1 = firstprio(&rlist.r_queue); \
tprio_t p2 = currp->p_prio; \
if (rlist.r_preempt) { \
if (p1 > p2) \
chSchDoReschedule(); \
} \
else { \
if (p1 >= p2) \
chSchDoReschedule(); \
} \
}
#else /* CH_TIME_QUANTUM == 0 */
#define chSchPreemption() { \
if (p1 >= p2) \
chSchDoReschedule(); \
}
#endif /* CH_TIME_QUANTUM == 0 */
#endif /* _CHSCHD_H_ */ #endif /* _CHSCHD_H_ */
/** @} */ /** @} */

15
os/kernel/include/chsys.h
View File

@ -66,14 +66,15 @@
/** /**
* @brief Performs a context switch. * @brief Performs a context switch.
* @note This function should nevel be used from user code directly. * @note Not a user function, it is meant to be invoked by the scheduler
* itself or from within the port layer.
* *
* @param[in] ntp the thread to be switched in * @param[in] ntp the thread to be switched in
* @param[in] otp the thread to be switched out * @param[in] otp the thread to be switched out
* *
* @special * @special
*/ */
#define chSysSwitchI(ntp, otp) { \ #define chSysSwitch(ntp, otp) { \
dbg_trace(otp); \ dbg_trace(otp); \
port_switch(ntp, otp); \ port_switch(ntp, otp); \
} }
@ -180,6 +181,8 @@
* @brief IRQ handler enter code. * @brief IRQ handler enter code.
* @note Usually IRQ handlers functions are also declared naked. * @note Usually IRQ handlers functions are also declared naked.
* @note On some architectures this macro can be empty. * @note On some architectures this macro can be empty.
*
* @special
*/ */
#define CH_IRQ_PROLOGUE() { \ #define CH_IRQ_PROLOGUE() { \
PORT_IRQ_PROLOGUE(); \ PORT_IRQ_PROLOGUE(); \
@ -190,7 +193,9 @@
* @brief IRQ handler exit code. * @brief IRQ handler exit code.
* @note Usually IRQ handlers function are also declared naked. * @note Usually IRQ handlers function are also declared naked.
* @note This macro usually performs the final reschedule by using * @note This macro usually performs the final reschedule by using
* @p chSchRescRequiredI() and @p chSchDoRescheduleI(). * @p chSchIsPreemptionRequired() and @p chSchDoReschedule().
*
* @special
*/ */
#define CH_IRQ_EPILOGUE() { \ #define CH_IRQ_EPILOGUE() { \
dbg_check_leave_isr(); \ dbg_check_leave_isr(); \
@ -201,6 +206,8 @@
* @brief Standard normal IRQ handler declaration. * @brief Standard normal IRQ handler declaration.
* @note @p id can be a function name or a vector number depending on the * @note @p id can be a function name or a vector number depending on the
* port implementation. * port implementation.
*
* @special
*/ */
#define CH_IRQ_HANDLER(id) PORT_IRQ_HANDLER(id) #define CH_IRQ_HANDLER(id) PORT_IRQ_HANDLER(id)
@ -209,6 +216,8 @@
* @note @p id can be a function name or a vector number depending on the * @note @p id can be a function name or a vector number depending on the
* port implementation. * port implementation.
* @note Not all architectures support fast interrupts. * @note Not all architectures support fast interrupts.
*
* @special
*/ */
#define CH_FAST_IRQ_HANDLER(id) PORT_FAST_IRQ_HANDLER(id) #define CH_FAST_IRQ_HANDLER(id) PORT_FAST_IRQ_HANDLER(id)

74
os/kernel/src/chschd.c
View File

@ -76,7 +76,6 @@ Thread *chSchReadyI(Thread *tp) {
Thread *cp; Thread *cp;
/* Integrity checks.*/ /* Integrity checks.*/
chDbgCheckClassI();
chDbgAssert((tp->p_state != THD_STATE_READY) && chDbgAssert((tp->p_state != THD_STATE_READY) &&
(tp->p_state != THD_STATE_FINAL), (tp->p_state != THD_STATE_FINAL),
"chSchReadyI(), #1", "chSchReadyI(), #1",
@ -116,7 +115,7 @@ void chSchGoSleepS(tstate_t newstate) {
#endif #endif
setcurrp(fifo_remove(&rlist.r_queue)); setcurrp(fifo_remove(&rlist.r_queue));
currp->p_state = THD_STATE_CURRENT; currp->p_state = THD_STATE_CURRENT;
chSysSwitchI(currp, otp); chSysSwitch(currp, otp);
} }
#endif /* !defined(PORT_OPTIMIZED_GOSLEEPS) */ #endif /* !defined(PORT_OPTIMIZED_GOSLEEPS) */
@ -228,36 +227,11 @@ void chSchWakeupS(Thread *ntp, msg_t msg) {
#endif #endif
setcurrp(ntp); setcurrp(ntp);
ntp->p_state = THD_STATE_CURRENT; ntp->p_state = THD_STATE_CURRENT;
chSysSwitchI(ntp, otp); chSysSwitch(ntp, otp);
} }
} }
#endif /* !defined(PORT_OPTIMIZED_WAKEUPS) */ #endif /* !defined(PORT_OPTIMIZED_WAKEUPS) */
/**
* @brief Switches to the first thread on the runnable queue.
* @note It is intended to be called if @p chSchRescRequiredI() evaluates
* to @p TRUE.
*
* @iclass
*/
#if !defined(PORT_OPTIMIZED_DORESCHEDULEI) || defined(__DOXYGEN__)
void chSchDoRescheduleI(void) {
Thread *otp;
chDbgCheckClassI();
#if CH_TIME_QUANTUM > 0
rlist.r_preempt = CH_TIME_QUANTUM;
#endif
otp = currp;
/* Picks the first thread from the ready queue and makes it current.*/
setcurrp(fifo_remove(&rlist.r_queue));
currp->p_state = THD_STATE_CURRENT;
chSchReadyI(otp);
chSysSwitchI(currp, otp);
}
#endif /* !defined(PORT_OPTIMIZED_DORESCHEDULEI) */
/** /**
* @brief Performs a reschedule if a higher priority thread is runnable. * @brief Performs a reschedule if a higher priority thread is runnable.
* @details If a thread with a higher priority than the current thread is in * @details If a thread with a higher priority than the current thread is in
@ -271,24 +245,25 @@ void chSchRescheduleS(void) {
chDbgCheckClassS(); chDbgCheckClassS();
if (chSchIsRescRequiredI()) if (chSchIsRescRequiredI())
chSchDoRescheduleI(); chSchDoReschedule();
} }
#endif /* !defined(PORT_OPTIMIZED_RESCHEDULES) */ #endif /* !defined(PORT_OPTIMIZED_RESCHEDULES) */
/** /**
* @brief Evaluates if a reschedule is required. * @brief Evaluates if preemption is required.
* @details The decision is taken by comparing the relative priorities and * @details The decision is taken by comparing the relative priorities and
* depending on the state of the round robin timeout counter. * depending on the state of the round robin timeout counter.
* @note This function is meant to be used in the timer interrupt handler * @note Not a user function, it is meant to be invoked by the scheduler
* where @p chVTDoTickI() is invoked. * itself or from within the port layer.
* *
* @retval TRUE if there is a thread that should go in running state. * @retval TRUE if there is a thread that must go in running state
* @retval FALSE if a reschedule is not required. * immediately.
* @retval FALSE if preemption is not required.
* *
* @iclass * @special
*/ */
#if !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI) || defined(__DOXYGEN__) #if !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED) || defined(__DOXYGEN__)
bool_t chSchIsRescRequiredExI(void) { bool_t chSchIsPreemptionRequired(void) {
tprio_t p1 = firstprio(&rlist.r_queue); tprio_t p1 = firstprio(&rlist.r_queue);
tprio_t p2 = currp->p_prio; tprio_t p2 = currp->p_prio;
#if CH_TIME_QUANTUM > 0 #if CH_TIME_QUANTUM > 0
@ -303,6 +278,29 @@ bool_t chSchIsRescRequiredExI(void) {
return p1 > p2; return p1 > p2;
#endif #endif
} }
#endif /* !defined(PORT_OPTIMIZED_ISRESCHREQUIREDEXI) */ #endif /* !defined(PORT_OPTIMIZED_ISPREEMPTIONREQUIRED) */
/**
* @brief Switches to the first thread on the runnable queue.
* @note Not a user function, it is meant to be invoked by the scheduler
* itself or from within the port layer.
*
* @special
*/
#if !defined(PORT_OPTIMIZED_DORESCHEDULE) || defined(__DOXYGEN__)
void chSchDoReschedule(void) {
Thread *otp;
#if CH_TIME_QUANTUM > 0
rlist.r_preempt = CH_TIME_QUANTUM;
#endif
otp = currp;
/* Picks the first thread from the ready queue and makes it current.*/
setcurrp(fifo_remove(&rlist.r_queue));
currp->p_state = THD_STATE_CURRENT;
chSchReadyI(otp);
chSysSwitch(currp, otp);
}
#endif /* !defined(PORT_OPTIMIZED_DORESCHEDULE) */
/** @} */ /** @} */

12
os/ports/GCC/ARM/chcoreasm.s
View File

@ -143,12 +143,12 @@ _port_switch_arm:
* | R0 | | * | R0 | |
* | PC | | (user code return address) * | PC | | (user code return address)
* | PSR_USR | -+ (user code status) * | PSR_USR | -+ (user code status)
* | .... | <- mk_DoRescheduleI() stack frame, optimize it for space * | .... | <- chSchDoReschedule() stack frame, optimize it for space
* | LR | -+ (system code return address) * | LR | -+ (system code return address)
* | R11 | | * | R11 | |
* | R10 | | * | R10 | |
* | R9 | | * | R9 | |
* | R8 | | Internal context: mk_SwitchI() frame * | R8 | | Internal context: chSysSwitch() frame
* | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE) * | (R7) | | (optional, see CH_CURRP_REGISTER_CACHE)
* | R6 | | * | R6 | |
* | R5 | | * | R5 | |
@ -161,7 +161,7 @@ _port_switch_arm:
.thumb_func .thumb_func
.globl _port_irq_common .globl _port_irq_common
_port_irq_common: _port_irq_common:
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
mov lr, pc mov lr, pc
bx lr bx lr
.code 32 .code 32
@ -169,7 +169,7 @@ _port_irq_common:
.code 32 .code 32
.globl _port_irq_common .globl _port_irq_common
_port_irq_common: _port_irq_common:
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
#endif /* !THUMB_NO_INTERWORKING */ #endif /* !THUMB_NO_INTERWORKING */
cmp r0, #0 // Simply returns if a cmp r0, #0 // Simply returns if a
ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not ldmeqfd sp!, {r0-r3, r12, lr} // reschedule is not
@ -190,12 +190,12 @@ _port_irq_common:
add r0, pc, #1 add r0, pc, #1
bx r0 bx r0
.code 16 .code 16
bl chSchDoRescheduleI bl chSchDoReschedule
mov lr, pc mov lr, pc
bx lr bx lr
.code 32 .code 32
#else /* !THUMB_NO_INTERWORKING */ #else /* !THUMB_NO_INTERWORKING */
bl chSchDoRescheduleI bl chSchDoReschedule
#endif /* !THUMB_NO_INTERWORKING */ #endif /* !THUMB_NO_INTERWORKING */
// Re-establish the IRQ conditions again. // Re-establish the IRQ conditions again.

2
os/ports/GCC/ARMCMx/chcore.h
View File

@ -116,7 +116,7 @@
* separate interrupt stack and the stack space between @p intctx and * separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero. * @p extctx is known to be zero.
* @note In this port it is conservatively set to 16 because the function * @note In this port it is conservatively set to 16 because the function
* @p chSchDoRescheduleI() can have a stack frame, expecially with * @p chSchDoReschedule() can have a stack frame, expecially with
* compiler optimizations disabled. * compiler optimizations disabled.
*/ */
#ifndef PORT_INT_REQUIRED_STACK #ifndef PORT_INT_REQUIRED_STACK

8
os/ports/GCC/ARMCMx/chcore_v6m.c
View File

@ -90,12 +90,8 @@ __attribute__((naked))
#endif #endif
void _port_switch_from_isr(void) { void _port_switch_from_isr(void) {
/* The calls to the debug functions are required in order to simulate the if (chSchIsPreemptionRequired())
correct call protocol from this peculiar code zone.*/ chSchDoReschedule();
dbg_check_lock();
if (chSchIsRescRequiredExI())
chSchDoRescheduleI();
dbg_check_unlock();
#if CORTEX_ALTERNATE_SWITCH #if CORTEX_ALTERNATE_SWITCH
SCB_ICSR = ICSR_PENDSVSET; SCB_ICSR = ICSR_PENDSVSET;
port_unlock(); port_unlock();

6
os/ports/GCC/ARMCMx/chcore_v7m.c
View File

@ -141,11 +141,9 @@ __attribute__((naked))
#endif #endif
void _port_switch_from_isr(void) { void _port_switch_from_isr(void) {
/* The calls to the debug functions are required in order to simulate the
correct call protocol from this peculiar code zone.*/
dbg_check_lock(); dbg_check_lock();
if (chSchIsRescRequiredExI()) if (chSchIsPreemptionRequired())
chSchDoRescheduleI(); chSchDoReschedule();
dbg_check_unlock(); dbg_check_unlock();
#if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__) #if !CORTEX_SIMPLIFIED_PRIORITY || defined(__DOXYGEN__)
asm volatile ("svc #0"); asm volatile ("svc #0");

4
os/ports/GCC/AVR/chcore.h
View File

@ -215,8 +215,8 @@ struct context {
* enabled to invoke system APIs. * enabled to invoke system APIs.
*/ */
#define PORT_IRQ_EPILOGUE() { \ #define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \ if (chSchIsPreemptionRequired()) \
chSchDoRescheduleI(); \ chSchDoReschedule(); \
} }
/** /**

4
os/ports/GCC/MSP430/chcore.h
View File

@ -184,8 +184,8 @@ struct context {
* enabled to invoke system APIs. * enabled to invoke system APIs.
*/ */
#define PORT_IRQ_EPILOGUE() { \ #define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \ if (chSchIsPreemptionRequired()) \
chSchDoRescheduleI(); \ chSchDoReschedule(); \
} }
/** /**

8
os/ports/GCC/PPC/SPC56x/ivor.s
View File

@ -73,10 +73,10 @@ IVOR10:
/* System tick handler invocation.*/ /* System tick handler invocation.*/
bl chSysTimerHandlerI bl chSysTimerHandlerI
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0 cmpli cr0, %r3, 0
beq cr0, .ctxrestore beq cr0, .ctxrestore
bl chSchDoRescheduleI bl chSchDoReschedule
b .ctxrestore b .ctxrestore
/* /*
@ -138,10 +138,10 @@ IVOR4:
stw %r3, 0(%r3) /* Writing any value should do. */ stw %r3, 0(%r3) /* Writing any value should do. */
/* Verifies if a reschedule is required.*/ /* Verifies if a reschedule is required.*/
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cmpli cr0, %r3, 0 cmpli cr0, %r3, 0
beq cr0, .ctxrestore beq cr0, .ctxrestore
bl chSchDoRescheduleI bl chSchDoReschedule
/* Context restore.*/ /* Context restore.*/
.ctxrestore: .ctxrestore:

2
os/ports/IAR/ARMCMx/chcore.h
View File

@ -116,7 +116,7 @@
* separate interrupt stack and the stack space between @p intctx and * separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero. * @p extctx is known to be zero.
* @note In this port it is conservatively set to 16 because the function * @note In this port it is conservatively set to 16 because the function
* @p chSchDoRescheduleI() can have a stack frame, expecially with * @p chSchDoReschedule() can have a stack frame, expecially with
* compiler optimizations disabled. * compiler optimizations disabled.
*/ */
#ifndef PORT_INT_REQUIRED_STACK #ifndef PORT_INT_REQUIRED_STACK

8
os/ports/IAR/ARMCMx/chcoreasm_v6m.s
View File

@ -37,8 +37,8 @@ SCB_ICSR SET 0xE000ED04
SECTION .text:CODE:NOROOT(2) SECTION .text:CODE:NOROOT(2)
EXTERN chThdExit EXTERN chThdExit
EXTERN chSchIsRescRequiredExI EXTERN chSchIsPreemptionRequired
EXTERN chSchDoRescheduleI EXTERN chSchDoReschedule
THUMB THUMB
@ -110,10 +110,10 @@ PendSVVector:
*/ */
PUBLIC _port_switch_from_isr PUBLIC _port_switch_from_isr
_port_switch_from_isr: _port_switch_from_isr:
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cmp r0, #0 cmp r0, #0
beq noresch beq noresch
bl chSchDoRescheduleI bl chSchDoReschedule
noresch: noresch:
ldr r2, =SCB_ICSR ldr r2, =SCB_ICSR
movs r3, #128 movs r3, #128

8
os/ports/IAR/ARMCMx/chcoreasm_v7m.s
View File

@ -39,8 +39,8 @@ ICSR_PENDSVSET SET 0x10000000
SECTION .text:CODE:NOROOT(2) SECTION .text:CODE:NOROOT(2)
EXTERN chThdExit EXTERN chThdExit
EXTERN chSchIsRescRequiredExI EXTERN chSchIsPreemptionRequired
EXTERN chSchDoRescheduleI EXTERN chSchDoReschedule
THUMB THUMB
@ -76,9 +76,9 @@ _port_thread_start:
*/ */
PUBLIC _port_switch_from_isr PUBLIC _port_switch_from_isr
_port_switch_from_isr: _port_switch_from_isr:
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cbz r0, .L2 cbz r0, .L2
bl chSchDoRescheduleI bl chSchDoReschedule
.L2: .L2:
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #LWRD SCB_ICSR mov r3, #LWRD SCB_ICSR

4
os/ports/RC/STM8/chcore.h
View File

@ -206,8 +206,8 @@ struct stm8_startctx {
* enabled to invoke system APIs. * enabled to invoke system APIs.
*/ */
#define PORT_IRQ_EPILOGUE() { \ #define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \ if (chSchIsPreemptionRequired()) \
chSchDoRescheduleI(); \ chSchDoReschedule(); \
} }
/** /**

3
os/ports/RVCT/ARMCMx/chcore.h
View File

@ -116,7 +116,7 @@
* separate interrupt stack and the stack space between @p intctx and * separate interrupt stack and the stack space between @p intctx and
* @p extctx is known to be zero. * @p extctx is known to be zero.
* @note In this port it is conservatively set to 16 because the function * @note In this port it is conservatively set to 16 because the function
* @p chSchDoRescheduleI() can have a stack frame, expecially with * @p chSchDoReschedule() can have a stack frame, expecially with
* compiler optimizations disabled. * compiler optimizations disabled.
*/ */
#ifndef PORT_INT_REQUIRED_STACK #ifndef PORT_INT_REQUIRED_STACK
@ -227,6 +227,7 @@ struct intctx {
/** /**
* @brief Platform dependent part of the @p Thread structure. * @brief Platform dependent part of the @p Thread structure.
* @details In this port the structure just holds a pointer to the @p intctx * @details In this port the structure just holds a pointer to the @p intctx
* structure representing the stack pointer at context switch time. * structure representing the stack pointer at context switch time.
*/ */

8
os/ports/RVCT/ARMCMx/chcoreasm_v6m.s
View File

@ -34,8 +34,8 @@ SCB_ICSR EQU 0xE000ED04
AREA |.text|, CODE, READONLY AREA |.text|, CODE, READONLY
IMPORT chThdExit IMPORT chThdExit
IMPORT chSchIsRescRequiredExI IMPORT chSchIsPreemptionRequired
IMPORT chSchDoRescheduleI IMPORT chSchDoReschedule
/* /*
* Performs a context switch between two threads. * Performs a context switch between two threads.
@ -109,10 +109,10 @@ PendSVVector PROC
*/ */
EXPORT _port_switch_from_isr EXPORT _port_switch_from_isr
_port_switch_from_isr PROC _port_switch_from_isr PROC
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cmp r0, #0 cmp r0, #0
beq noresch beq noresch
bl chSchDoRescheduleI bl chSchDoReschedule
noresch noresch
ldr r2, =SCB_ICSR ldr r2, =SCB_ICSR
movs r3, #128 movs r3, #128

8
os/ports/RVCT/ARMCMx/chcoreasm_v7m.s
View File

@ -36,8 +36,8 @@ ICSR_PENDSVSET EQU 0x10000000
AREA |.text|, CODE, READONLY AREA |.text|, CODE, READONLY
IMPORT chThdExit IMPORT chThdExit
IMPORT chSchIsRescRequiredExI IMPORT chSchIsPreemptionRequired
IMPORT chSchDoRescheduleI IMPORT chSchDoReschedule
/* /*
* Performs a context switch between two threads. * Performs a context switch between two threads.
@ -73,9 +73,9 @@ _port_thread_start PROC
*/ */
EXPORT _port_switch_from_isr EXPORT _port_switch_from_isr
_port_switch_from_isr PROC _port_switch_from_isr PROC
bl chSchIsRescRequiredExI bl chSchIsPreemptionRequired
cbz r0, noreschedule cbz r0, noreschedule
bl chSchDoRescheduleI bl chSchDoReschedule
noreschedule noreschedule
#if CORTEX_SIMPLIFIED_PRIORITY #if CORTEX_SIMPLIFIED_PRIORITY
mov r3, #SCB_ICSR :AND: 0xFFFF mov r3, #SCB_ICSR :AND: 0xFFFF

4
os/ports/cosmic/STM8/chcore.h
View File

@ -203,8 +203,8 @@ struct stm8_startctx {
* enabled to invoke system APIs. * enabled to invoke system APIs.
*/ */
#define PORT_IRQ_EPILOGUE() { \ #define PORT_IRQ_EPILOGUE() { \
if (chSchIsRescRequiredExI()) \ if (chSchIsPreemptionRequired()) \
chSchDoRescheduleI(); \ chSchDoReschedule(); \
} }
/** /**

9
readme.txt
View File

@ -94,10 +94,7 @@
useful. useful.
- NEW: Added a new debug option CH_DBG_SYSTEM_STATE_CHECK that ensures the - NEW: Added a new debug option CH_DBG_SYSTEM_STATE_CHECK that ensures the
correct API call protocol. If an API is invoked out of the correct context correct API call protocol. If an API is invoked out of the correct context
then the kernel panics with a debug message. The extension is functional on then the kernel panics with a debug message.
the Cortex-Mx GCC ports only in this moment.
(TODO: port to IAR and RVCT compilers)
(TODO: port to other architectures)
- NEW: Added Eclipse ChibiOS/RT debugger plugin 1.0.5 under ./tools/eclipse. - NEW: Added Eclipse ChibiOS/RT debugger plugin 1.0.5 under ./tools/eclipse.
- NEW: The ARMCMx startup file (crt0.c) now is able to fill the stack areas - NEW: The ARMCMx startup file (crt0.c) now is able to fill the stack areas
with a filler (default behavior). This is required in order to easily assess with a filler (default behavior). This is required in order to easily assess
@ -160,6 +157,10 @@
not support fast interrupts (backported to 2.2.5). not support fast interrupts (backported to 2.2.5).
- NEW: Now the port layer exports info regarding the compiler and the port - NEW: Now the port layer exports info regarding the compiler and the port
options. The info are printed into the test reports. options. The info are printed into the test reports.
- CHANGE: Renamed the scheduler functions chSchIsRescRequiredExI() to
chSchIsPreemptionRequired(), chSchDoRescheduleI() to chSchDoReschedule(),
chSysSwitchI() to chSysSwitch(). All those functions were special cases
and not regular I-class APIs.
- CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK - CHANGE: Renamed the macros IDLE_THREAD_STACK_SIZE and INT_REQUIRED_STACK
to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency. to PORT_IDLE_THREAD_STACK_SIZE and PORT_INT_REQUIRED_STACK for consistency.
- CHANGE: Removed the "old" Cortex-M3 port from the code, the current port - CHANGE: Removed the "old" Cortex-M3 port from the code, the current port