diff --git a/os/hal/platforms/STM32F1xx/hal_lld.c b/os/hal/platforms/STM32F1xx/hal_lld.c index e50984013..d168ad603 100644 --- a/os/hal/platforms/STM32F1xx/hal_lld.c +++ b/os/hal/platforms/STM32F1xx/hal_lld.c @@ -58,6 +58,7 @@ static void hal_lld_backup_domain_init(void) { /* Backup domain access enabled and left open.*/ PWR->CR |= PWR_CR_DBP; +#if HAL_USE_RTC /* Reset BKP domain if different clock source selected.*/ if ((RCC->BDCR & STM32_RTCSEL_MASK) != STM32_RTCSEL){ /* Backup domain reset.*/ @@ -70,7 +71,7 @@ static void hal_lld_backup_domain_init(void) { RCC->BDCR |= RCC_BDCR_LSEON; while ((RCC->BDCR & RCC_BDCR_LSERDY) == 0) ; /* Waits until LSE is stable. */ -#endif +#endif /* STM32_LSE_ENABLED */ #if STM32_RTCSEL != STM32_RTCSEL_NOCLOCK /* If the backup domain hasn't been initialized yet then proceed with @@ -83,11 +84,10 @@ static void hal_lld_backup_domain_init(void) { RCC->BDCR |= RCC_BDCR_RTCEN; /* Prescaler value loaded in registers.*/ -#if HAL_USE_RTC rtc_lld_set_prescaler(); -#endif /* HAL_USE_RTC */ } #endif /* STM32_RTCSEL != STM32_RTCSEL_NOCLOCK */ +#endif /* HAL_USE_RTC */ } /*===========================================================================*/ diff --git a/readme.txt b/readme.txt index 92e0989ea..cd6c19e95 100644 --- a/readme.txt +++ b/readme.txt @@ -79,9 +79,10 @@ ***************************************************************************** *** 2.4.3 *** -- FIX: Compilation issue with HAL_USE_RTC disabled (bug 3594083) -- FIX: Wasting of BKP registers in RTCv1 driver (bug 3594005) -- FIX: Potential problem with RTC_CRL_RSF bit (bug 3593972) +- FIX: Unneded RTC initialization when HAL_USE_RTC disabled (bug 3594620). +- FIX: Compilation issue with HAL_USE_RTC disabled (bug 3594083). +- FIX: Wasting of BKP registers in RTCv1 driver (bug 3594005). +- FIX: Potential problem with RTC_CRL_RSF bit (bug 3593972). - FIX: Fixed wrong stack initializations in GCC STM32L1xx port files (bug 3591321). - FIX: Fixed different redefinition for __main_stack_end__ symbol (bug