git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3443 35acf78f-673a-0410-8e92-d51de3d6d3f4
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gdisirio
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3ce8ccb68a
commit
ade734b003
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@ -44,6 +44,12 @@ const PALConfig pal_default_config =
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#if defined(PORTE)
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{VAL_PORTE, VAL_DDRE},
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#endif
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#if defined(PORTF)
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{VAL_PORTF, VAL_DDRF},
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#endif
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#if defined(PORTG)
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{VAL_PORTG, VAL_DDRG},
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#endif
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};
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#endif /* HAL_USE_PAL */
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@ -44,6 +44,12 @@ const PALConfig pal_default_config =
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#if defined(PORTE)
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{VAL_PORTE, VAL_DDRE},
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#endif
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#if defined(PORTF)
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{VAL_PORTF, VAL_DDRF},
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#endif
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#if defined(PORTG)
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{VAL_PORTG, VAL_DDRG},
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#endif
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};
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#endif /* HAL_USE_PAL */
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@ -85,6 +85,16 @@ void _pal_lld_init(const PALConfig *config) {
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PORTE = config->porte.out;
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DDRE = config->porte.dir;
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#endif
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#if defined(PORTF) || defined(__DOXYGEN__)
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PORTF = config->portf.out;
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DDRF = config->portf.dir;
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#endif
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#if defined(PORTG) || defined(__DOXYGEN__)
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PORTG = config->portg.out;
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DDRG = config->portg.dir;
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#endif
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}
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/**
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@ -43,24 +43,30 @@
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/*===========================================================================*/
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/**
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* @brief Width, in bits, of an I/O port.
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* @brief Width, in bits, of an I/O port.
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*/
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#define PAL_IOPORTS_WIDTH 8
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/**
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* @brief Whole port mask.
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* @brief This macro specifies all the valid bits into a port.
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* @brief Whole port mask.
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* @details This macro specifies all the valid bits into a port.
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*/
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#define PAL_WHOLE_PORT ((ioportmask_t)0xFF)
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/**
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* @brief AVR setup registers.
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* @brief AVR setup registers.
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*/
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typedef struct {
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uint8_t out;
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uint8_t dir;
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} avr_gpio_setup_t;
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/**
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* @brief AVR registers block.
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* @note On some devices registers do not follow this layout on some
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* ports, the ports with abnormal layout cannot be used through
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* the PAL driver. Example: PORT F on Mega128.
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*/
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typedef struct {
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volatile uint8_t in;
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volatile uint8_t dir;
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@ -90,6 +96,12 @@ typedef struct {
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#if defined(PORTE) || defined(__DOXYGEN__)
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avr_gpio_setup_t porte;
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#endif
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#if defined(PORTF) || defined(__DOXYGEN__)
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avr_gpio_setup_t portf;
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#endif
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#if defined(PORTG) || defined(__DOXYGEN__)
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avr_gpio_setup_t portg;
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#endif
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} PALConfig;
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/**
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@ -149,6 +161,20 @@ typedef avr_gpio_registers_t *ioportid_t;
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#define IOPORT5 ((volatile avr_gpio_registers_t *)&PINE)
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#endif
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#if defined(PORTF) || defined(__DOXYGEN__)
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/**
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* @brief GPIO port F identifier.
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*/
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#define IOPORT6 ((volatile avr_gpio_registers_t *)&PINF)
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#endif
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#if defined(PORTG) || defined(__DOXYGEN__)
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/**
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* @brief GPIO port G identifier.
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*/
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#define IOPORT7 ((volatile avr_gpio_registers_t *)&PING)
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#endif
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/*===========================================================================*/
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/* Implementation, some of the following macros could be implemented as */
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/* functions, if so please put them in pal_lld.c. */
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@ -37,14 +37,49 @@
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/**
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* @defgroup AVR_PAL AVR PAL Support
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* @details The AVR PAL driver uses the GPIO peripherals.
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* @details The AVR PAL driver uses the PORT peripherals.
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*
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* @section avr_pal_1 Supported HW resources
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* - GPIOA.
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* - GPIOB.
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* - GPIOC.
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* - GPIOD.
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* - GPIOE.
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* - PORTA.
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* - PORTB.
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* - PORTC.
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* - PORTD.
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* - PORTE.
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* - PORTF.
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* - PORTG.
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* .
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* @section avr_pal_2 AVR PAL driver implementation features
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* The AVR PAL driver implementation fully supports the following hardware
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* capabilities:
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* - 8 bits wide ports.
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* - Atomic set/reset functions.
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* - Output latched regardless of the pad setting.
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* - Direct read of input pads regardless of the pad setting.
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* .
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* @section avr_pal_3 Supported PAL setup modes
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* The AVR PAL driver supports the following I/O modes:
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* - @p PAL_MODE_RESET.
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* - @p PAL_MODE_UNCONNECTED.
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* - @p PAL_MODE_INPUT.
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* - @p PAL_MODE_INPUT_PULLUP.
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* - @p PAL_MODE_INPUT_ANALOG.
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* - @p PAL_MODE_OUTPUT_PUSHPULL.
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* .
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* Any attempt to setup an invalid mode is ignored.
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*
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* @section avr_pal_4 Suboptimal behavior
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* The AVR PORT is less than optimal in several areas, the limitations
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* should be taken in account while using the PAL driver:
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* - Pad/port toggling operations are not atomic.
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* - Pad/group mode setup is not atomic.
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* - Group set+reset function is not atomic.
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* - Writing on pads/groups/ports programmed as input with pull-up
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* resistor changes the resistor setting because the output latch is
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* used for resistor selection.
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* - The PORT registers layout on some devices is not regular (it does
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* not have contiguous PIN, DDR, PORT registers in this order), such
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* ports cannot be accessed using the PAL driver. For example, PORT F
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* on ATmega128. Verify the user manual of your device.
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* .
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* @ingroup AVR_DRIVERS
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*/
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