git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2285 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -28,7 +28,6 @@ static SPIConfig spicfg = {
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GPIO1,
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GPIO1_SPI0SEL,
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CR0_DSS8BIT | CR0_FRFSPI | CR0_CLOCKRATE(0),
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0,
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48
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};
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@ -81,7 +81,7 @@ static void ssp_fifo_preload(SPIDriver *spip) {
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*
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* @param[in] spip pointer to the @p SPIDriver object
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*/
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static void serve_interrupt(SPIDriver *spip) {
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static void spi_serve_interrupt(SPIDriver *spip) {
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LPC_SSP_TypeDef *ssp = spip->spd_ssp;
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if ((ssp->MIS & MIS_ROR) != 0) {
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@ -101,7 +101,7 @@ static void serve_interrupt(SPIDriver *spip) {
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(void)ssp->DR;
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if (--spip->spd_rxcnt == 0) {
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chDbgAssert(spip->spd_txcnt == 0,
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"chSemResetI(), #1", "counter out of synch");
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"spi_serve_interrupt(), #1", "counter out of synch");
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/* Stops the IRQ sources.*/
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ssp->IMSC = 0;
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/* Portable SPI ISR code defined in the high level driver, note, it is
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@ -129,7 +129,7 @@ CH_IRQ_HANDLER(Vector90) {
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CH_IRQ_PROLOGUE();
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serve_interrupt(&SPID1);
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spi_serve_interrupt(&SPID1);
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CH_IRQ_EPILOGUE();
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}
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@ -145,7 +145,7 @@ CH_IRQ_HANDLER(Vector78) {
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CH_IRQ_PROLOGUE();
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serve_interrupt(&SPID2);
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spi_serve_interrupt(&SPID2);
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CH_IRQ_EPILOGUE();
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}
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@ -201,6 +201,7 @@ void spi_lld_start(SPIDriver *spip) {
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if (&SPID1 == spip) {
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LPC_SYSCON->SSP0CLKDIV = LPC11xx_SPI_SSP0CLKDIV;
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LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 11);
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LPC_SYSCON->PRESETCTRL |= 1;
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NVICEnableVector(SSP0_IRQn,
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CORTEX_PRIORITY_MASK(LPC11xx_SPI_SSP0_IRQ_PRIORITY));
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}
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@ -209,6 +210,7 @@ void spi_lld_start(SPIDriver *spip) {
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if (&SPID2 == spip) {
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LPC_SYSCON->SSP1CLKDIV = LPC11xx_SPI_SSP1CLKDIV;
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LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 18);
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LPC_SYSCON->PRESETCTRL |= 4;
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NVICEnableVector(SSP1_IRQn,
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CORTEX_PRIORITY_MASK(LPC11xx_SPI_SSP1_IRQ_PRIORITY));
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}
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@ -216,13 +218,10 @@ void spi_lld_start(SPIDriver *spip) {
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}
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/* Configuration.*/
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spip->spd_ssp->CR1 = 0;
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/* Emptying the receive FIFO, it happens to not be empty while debugging.*/
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while (spip->spd_ssp->SR & SR_RNE)
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(void) spip->spd_ssp->DR;
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spip->spd_ssp->ICR = ICR_RT | ICR_ROR;
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spip->spd_ssp->CR0 = spip->spd_config->spc_cr0;
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spip->spd_ssp->CPSR = spip->spd_config->spc_cpsr;
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spip->spd_ssp->CR1 = spip->spd_config->spc_cr1 | CR1_SSE;
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spip->spd_ssp->CR1 = CR1_SSE;
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}
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/**
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@ -237,6 +236,7 @@ void spi_lld_stop(SPIDriver *spip) {
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if (spip->spd_state != SPI_STOP) {
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#if LPC11xx_SPI_USE_SSP0
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if (&SPID1 == spip) {
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LPC_SYSCON->PRESETCTRL &= ~1;
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 11);
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LPC_SYSCON->SSP0CLKDIV = 0;
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NVICDisableVector(SSP0_IRQn);
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@ -245,6 +245,7 @@ void spi_lld_stop(SPIDriver *spip) {
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#endif
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#if LPC11xx_SPI_USE_SSP1
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if (&SPID2 == spip) {
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LPC_SYSCON->PRESETCTRL &= ~4;
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LPC_SYSCON->SYSAHBCLKCTRL &= ~(1 << 18);
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LPC_SYSCON->SSP1CLKDIV = 0;
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NVICDisableVector(SSP1_IRQn);
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@ -245,10 +245,6 @@ typedef struct {
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* @brief SSP CR0 initialization data.
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*/
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uint16_t spc_cr0;
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/**
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* @brief SSP CR1 initialization data.
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*/
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uint16_t spc_cr1;
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/**
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* @brief SSP CPSR initialization data.
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*/
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