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ChibiOS
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I2C. Trying to add optional WAIT support. Driver broken. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3101 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
barthess 2011-07-01 13:36:59 +00:00
parent 551a1c1f22
commit af0e40079d
4 changed files with 44 additions and 43 deletions
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11
os/hal/include/i2c.h
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@ -165,9 +165,9 @@ struct I2CSlaveConfig{
* @notapi * @notapi
*/ */
#define _i2c_wait_s(i2cp) { \ #define _i2c_wait_s(i2cp) { \
chDbgAssert((i2cp)->thread == NULL, \ chDbgAssert((i2cp)->id_thread == NULL, \
"_i2c_wait(), #1", "already waiting"); \ "_i2c_wait(), #1", "already waiting"); \
(i2cp)->thread = chThdSelf(); \ (i2cp)->id_thread = chThdSelf(); \
chSchGoSleepS(THD_STATE_SUSPENDED); \ chSchGoSleepS(THD_STATE_SUSPENDED); \
} }
@ -179,9 +179,9 @@ struct I2CSlaveConfig{
* @notapi * @notapi
*/ */
#define _i2c_wakeup_isr(i2cp) { \ #define _i2c_wakeup_isr(i2cp) { \
if ((i2cp)->thread != NULL) { \ if ((i2cp)->id_thread != NULL) { \
Thread *tp = (i2cp)->thread; \ Thread *tp = (i2cp)->id_thread; \
(i2cp)->thread = NULL; \ (i2cp)->id_thread = NULL; \
chSysLockFromIsr(); \ chSysLockFromIsr(); \
chSchReadyI(tp); \ chSchReadyI(tp); \
chSysUnlockFromIsr(); \ chSysUnlockFromIsr(); \
@ -216,7 +216,6 @@ struct I2CSlaveConfig{
else \ else \
(i2cp)->id_state = I2C_READY; \ (i2cp)->id_state = I2C_READY; \
_i2c_wakeup_isr(i2cp); \ _i2c_wakeup_isr(i2cp); \
i2cReleaseBus(i2cp); \
} }

34
os/hal/platforms/STM32/i2c_lld.c
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@ -561,13 +561,16 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, uint16_t slave_addr,
i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */ i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */
#if !I2C_USE_WAIT //#if !I2C_USE_WAIT
/* Wait until the START condition is generated on the bus: // /* Wait until the START condition is generated on the bus:
* the START bit is cleared by hardware */ // * the START bit is cleared by hardware */
uint32_t timeout = 0xfffff; // uint32_t timeout = 0xfffff;
while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) // while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
; // ;
#endif /* I2C_USE_WAIT */ //#endif /* I2C_USE_WAIT */
uint32_t timeout = 0xfffff;
while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
;
} }
@ -623,13 +626,16 @@ void i2c_lld_master_receive(I2CDriver *i2cp, uint16_t slave_addr,
i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */ i2cp->id_i2c->CR1 |= I2C_CR1_START; /* send start bit */
#if !I2C_USE_WAIT //#if !I2C_USE_WAIT
/* Wait until the START condition is generated on the bus: // /* Wait until the START condition is generated on the bus:
* the START bit is cleared by hardware */ // * the START bit is cleared by hardware */
uint32_t timeout = 0xfffff; // uint32_t timeout = 0xfffff;
while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--) // while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
; // ;
#endif /* I2C_USE_WAIT */ //#endif /* I2C_USE_WAIT */
uint32_t timeout = 0xfffff;
while((i2cp->id_i2c->CR1 & I2C_CR1_START) && timeout--)
;
} }

2
os/hal/platforms/STM32/i2c_lld.h
View File

@ -142,7 +142,7 @@ struct I2CDriver{
/** /**
* @brief Thread waiting for I/O completion. * @brief Thread waiting for I/O completion.
*/ */
Thread *thread; Thread *id_thread;
#endif /* I2C_USE_WAIT */ #endif /* I2C_USE_WAIT */
#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__) #if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
#if CH_USE_MUTEXES || defined(__DOXYGEN__) #if CH_USE_MUTEXES || defined(__DOXYGEN__)

40
os/hal/src/i2c.c
View File

@ -156,8 +156,6 @@ void i2cMasterTransmit(I2CDriver *i2cp,
uint8_t *rxbuf, uint8_t *rxbuf,
size_t rxbytes) { size_t rxbytes) {
i2cAcquireBus(i2cp);
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\ chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
(slave_addr != 0) &&\ (slave_addr != 0) &&\
(txbytes > 0) &&\ (txbytes > 0) &&\
@ -167,15 +165,15 @@ void i2cMasterTransmit(I2CDriver *i2cp,
/* init slave config field in driver */ /* init slave config field in driver */
i2cp->id_slave_config = i2cscfg; i2cp->id_slave_config = i2cscfg;
#if I2C_USE_WAIT //#if I2C_USE_WAIT
i2c_lld_wait_bus_free(i2cp); // i2c_lld_wait_bus_free(i2cp);
if(i2c_lld_bus_is_busy(i2cp)) { // if(i2c_lld_bus_is_busy(i2cp)) {
#ifdef PRINTTRACE //#ifdef PRINTTRACE
print("I2C Bus busy!\n"); // print("I2C Bus busy!\n");
#endif //#endif
return; // return;
}; // };
#endif //#endif
chSysLock(); chSysLock();
chDbgAssert(i2cp->id_state == I2C_READY, chDbgAssert(i2cp->id_state == I2C_READY,
@ -204,8 +202,6 @@ void i2cMasterReceive(I2CDriver *i2cp,
uint8_t *rxbuf, uint8_t *rxbuf,
size_t rxbytes){ size_t rxbytes){
i2cAcquireBus(i2cp);
chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\ chDbgCheck((i2cp != NULL) && (i2cscfg != NULL) &&\
(slave_addr != 0) &&\ (slave_addr != 0) &&\
(rxbytes > 0) && \ (rxbytes > 0) && \
@ -215,15 +211,15 @@ void i2cMasterReceive(I2CDriver *i2cp,
/* init slave config field in driver */ /* init slave config field in driver */
i2cp->id_slave_config = i2cscfg; i2cp->id_slave_config = i2cscfg;
#if I2C_USE_WAIT //#if I2C_USE_WAIT
i2c_lld_wait_bus_free(i2cp); // i2c_lld_wait_bus_free(i2cp);
if(i2c_lld_bus_is_busy(i2cp)) { // if(i2c_lld_bus_is_busy(i2cp)) {
#ifdef PRINTTRACE //#ifdef PRINTTRACE
print("I2C Bus busy!\n"); // print("I2C Bus busy!\n");
#endif //#endif
return; // return;
}; // };
#endif //#endif
chSysLock(); chSysLock();
chDbgAssert(i2cp->id_state == I2C_READY, chDbgAssert(i2cp->id_state == I2C_READY,