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M25Qxx demos working in both SPI and QSPI modes. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9600 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2016-06-07 12:55:23 +00:00
parent d151ada9c3
commit afc0508c0b
8 changed files with 16 additions and 735 deletions
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11
os/ex/Micron/m25q.c
View File

@ -345,6 +345,8 @@ static flash_error_t m25q_read(void *instance, flash_address_t addr,
addr, M25Q_READ_DUMMY_CYCLES, n, rp);
#else
/* Normal read command in SPI mode.*/
jesd216_cmd_addr_receive(devp->config->busp, M25Q_CMD_READ,
addr, n, rp);
#endif
/* Ready state again.*/
@ -512,7 +514,9 @@ static flash_error_t m25q_verify_erase(void *instance,
addr, M25Q_READ_DUMMY_CYCLES,
sizeof cmpbuf, cmpbuf);
#else
/* Normal read command in SPI mode.*/
/* Normal read command in SPI mode.*/
jesd216_cmd_addr_receive(devp->config->busp, M25Q_CMD_READ,
addr, sizeof cmpbuf, cmpbuf);
#endif
/* Checking for erased state of current buffer.*/
@ -648,11 +652,10 @@ void m25qStart(M25QDriver *devp, const M25QConfig *config) {
/* Bus acquisition.*/
jesd216_bus_acquire(devp->config->busp, devp->config->buscfg);
/* Starting bus device.*/
jesd216_start(devp->config->busp, devp->config->buscfg);
#if JESD216_BUS_MODE == JESD216_BUS_MODE_SPI
/* Reading device ID.*/
jesd216_cmd_receive(devp->config->busp, M25Q_CMD_READ_ID,
sizeof devp->device_id, devp->device_id);
#else /* JESD216_BUS_MODE != JESD216_BUS_MODE_SPI */
/* Attempting a reset of the XIP mode, it could be in an unexpected state

509
os/ex/Micron/n25q128_spi.c
View File

@ -1,509 +0,0 @@
/*
N25Q128 Flash Driver - Copyright (C) 2016 Giovanni Di Sirio
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file n25q128_spi.c
* @brief N25Q128 over SPI driver code.
*
* @addtogroup n25q128_spi
* @{
*/
#include "hal.h"
#include "n25q128_spi.h"
/*===========================================================================*/
/* Driver local definitions. */
/*===========================================================================*/
#define PAGE_SIZE 256U
#define PAGE_MASK (PAGE_SIZE - 1U)
#if N25Q128_USE_SUB_SECTORS == TRUE
#define SECTOR_SIZE 0x00001000U
#define CMD_SECTOR_ERASE N25Q128_CMD_SUBSECTOR_ERASE
#else
#define SECTOR_SIZE 0x00010000U
#define CMD_SECTOR_ERASE N25Q128_CMD_SECTOR_ERASE
#endif
/*===========================================================================*/
/* Driver exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Driver local variables and types. */
/*===========================================================================*/
static const flash_descriptor_t *get_descriptor(void *instance);
static flash_error_t read(void *instance, flash_address_t addr,
uint8_t *rp, size_t n);
static flash_error_t program(void *instance, flash_address_t addr,
const uint8_t *pp, size_t n);
static flash_error_t start_erase_all(void *instance);
static flash_error_t start_erase_sector(void *instance, flash_sector_t sector);
static flash_error_t query_erase(void *instance, uint32_t *msec);
static flash_error_t verify_erase(void *instance, flash_sector_t sector);
/**
* @brief Virtual methods table.
*/
static const struct N25Q128DriverVMT n25q128_vmt = {
get_descriptor, read, program,
start_erase_all, start_erase_sector, query_erase, verify_erase
};
/**
* @brief N25Q128 descriptor.
*/
static flash_descriptor_t descriptor = {
.attributes = FLASH_ATTR_ERASED_IS_ONE | FLASH_ATTR_REWRITABLE |
FLASH_ATTR_SUSPEND_ERASE_CAPABLE,
.page_size = 256U,
#if N25Q128_USE_SUB_SECTORS == TRUE
.sectors_count = 4096U,
#else
.sectors_count = 256U,
#endif
.sectors = NULL,
.sectors_size = SECTOR_SIZE,
.address = 0U
};
/*===========================================================================*/
/* Driver local functions. */
/*===========================================================================*/
#if N25Q128_SHARED_SPI == TRUE
void flash_bus_acquire(N25Q128Driver *devp) {
spiAcquireBus(devp->config->spip);
spiStart(devp->config->spip, devp->config->spicfg);
}
void flash_bus_release(N25Q128Driver *devp) {
spiReleaseBus(devp->config->spip);
}
#else
#define flash_bus_acquire(devp)
#define flash_bus_release(devp)
#endif
static void flash_short_cmd(N25Q128Driver *devp, uint8_t cmd) {
uint8_t buf[1];
spiSelect(devp->config->spip);
buf[0] = cmd;
spiSend(devp->config->spip, 1, buf);
spiUnselect(devp->config->spip);
}
static void flash_send_cmd(N25Q128Driver *devp, uint8_t cmd) {
uint8_t buf[1];
buf[0] = cmd;
spiSend(devp->config->spip, 1, buf);
}
static void flash_send_cmd_addr(N25Q128Driver *devp,
uint8_t cmd,
flash_address_t addr) {
uint8_t buf[4];
buf[0] = cmd;
buf[1] = (uint8_t)(addr >> 16);
buf[2] = (uint8_t)(addr >> 8);
buf[3] = (uint8_t)(addr >> 0);
spiSend(devp->config->spip, 4, buf);
}
static flash_error_t flash_poll_status(N25Q128Driver *devp) {
SPIDriver *spip = devp->config->spip;
uint8_t sts;
do {
#if N25Q128_NICE_WAITING == TRUE
osalThreadSleepMilliseconds(1);
#endif
/* Read status command.*/
spiSelect(spip);
flash_send_cmd(devp, N25Q128_CMD_READ_FLAG_STATUS_REGISTER);
spiReceive(spip, 1, &sts);
spiUnselect(spip);
} while ((sts & N25Q128_STS_PROGRAM_ERASE) == 0U);
/* Checking for errors.*/
if ((sts & N25Q128_STS_ALL_ERRORS) != 0U) {
/* Clearing status register.*/
flash_send_cmd(devp, N25Q128_CMD_CLEAR_FLAG_STATUS_REGISTER);
/* Program operation failed.*/
return FLASH_ERROR_PROGRAM;
}
return FLASH_NO_ERROR;
}
static const flash_descriptor_t *get_descriptor(void *instance) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
osalDbgCheck(instance != NULL);
osalDbgAssert((devp->state != FLASH_UNINIT) && (devp->state != FLASH_STOP),
"invalid state");
return &descriptor;
}
static flash_error_t read(void *instance, flash_address_t addr,
uint8_t *rp, size_t n) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
osalDbgCheck((instance != NULL) && (rp != NULL) && (n > 0U));
osalDbgCheck((size_t)addr + n <= (size_t)descriptor.sectors_count *
(size_t)descriptor.sectors_size);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
if (devp->state == FLASH_ERASE) {
return FLASH_BUSY_ERASING;
}
flash_bus_acquire(devp);
devp->state = FLASH_READ;
/* Read command.*/
spiSelect(spip);
flash_send_cmd_addr(devp, N25Q128_CMD_READ, addr);
spiReceive(spip, n, rp);
spiUnselect(spip);
devp->state = FLASH_READY;
flash_bus_release(devp);
return FLASH_NO_ERROR;
}
static flash_error_t program(void *instance, flash_address_t addr,
const uint8_t *pp, size_t n) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
osalDbgCheck((instance != NULL) && (pp != NULL) && (n > 0U));
osalDbgCheck((size_t)addr + n <= (size_t)descriptor.sectors_count *
(size_t)descriptor.sectors_size);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
if (devp->state == FLASH_ERASE) {
return FLASH_BUSY_ERASING;
}
flash_bus_acquire(devp);
devp->state = FLASH_PGM;
/* Data is programmed page by page.*/
while (n > 0U) {
flash_error_t err;
/* Data size that can be written in a single program page operation.*/
size_t chunk = (size_t)(((addr | PAGE_MASK) + 1U) - addr);
if (chunk > n) {
chunk = n;
}
/* Enabling write operation.*/
flash_short_cmd(devp, N25Q128_CMD_WRITE_ENABLE);
(void) spiPolledExchange(spip, 0xFF); /* One frame delay.*/
/* Page program command.*/
spiSelect(spip);
flash_send_cmd_addr(devp, N25Q128_CMD_PAGE_PROGRAM, addr);
spiSend(spip, chunk, pp);
spiUnselect(spip);
/* Wait for status and check errors.*/
(void) spiPolledExchange(spip, 0xFF); /* One frame delay.*/
err = flash_poll_status(devp);
if (err != FLASH_NO_ERROR) {
flash_bus_release(devp);
return err;
}
/* Next page.*/
addr += chunk;
pp += chunk;
n -= chunk;
}
devp->state = FLASH_READY;
flash_bus_release(devp);
return FLASH_NO_ERROR;
}
static flash_error_t start_erase_all(void *instance) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
osalDbgCheck(instance != NULL);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
if (devp->state == FLASH_ERASE) {
return FLASH_BUSY_ERASING;
}
flash_bus_acquire(devp);
devp->state = FLASH_ERASE;
/* Enabling write operation.*/
flash_short_cmd(devp, N25Q128_CMD_WRITE_ENABLE);
(void) spiPolledExchange(spip, 0xFF); /* One frame delay.*/
/* Bulk erase command.*/
flash_short_cmd(devp, N25Q128_CMD_BULK_ERASE);
devp->state = FLASH_READY;
flash_bus_release(devp);
return FLASH_NO_ERROR;
}
static flash_error_t start_erase_sector(void *instance, flash_sector_t sector) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
flash_address_t addr = (flash_address_t)(sector * SECTOR_SIZE);
osalDbgCheck(instance != NULL);
osalDbgCheck(sector < descriptor.sectors_count);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
if (devp->state == FLASH_ERASE) {
return FLASH_BUSY_ERASING;
}
flash_bus_acquire(devp);
devp->state = FLASH_ERASE;
/* Enabling write operation.*/
flash_short_cmd(devp, N25Q128_CMD_WRITE_ENABLE);
(void) spiPolledExchange(spip, 0xFF); /* One frame delay.*/
/* Sector erase command.*/
spiSelect(spip);
flash_send_cmd_addr(devp, CMD_SECTOR_ERASE, addr);
spiUnselect(spip);
devp->state = FLASH_READY;
flash_bus_release(devp);
return FLASH_NO_ERROR;
}
static flash_error_t verify_erase(void *instance, flash_sector_t sector) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
unsigned i;
osalDbgCheck(instance != NULL);
osalDbgCheck(sector < descriptor.sectors_count);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
if (devp->state == FLASH_ERASE) {
return FLASH_BUSY_ERASING;
}
flash_bus_acquire(devp);
devp->state = FLASH_READ;
/* Read command.*/
spiSelect(spip);
flash_send_cmd_addr(devp, N25Q128_CMD_READ, (size_t)(sector * SECTOR_SIZE));
for (i = SECTOR_SIZE; i > 0U; i--) {
if (spiPolledExchange(spip, 0xFF) != 0xFF) {
flash_bus_release(devp);
return FLASH_ERROR_VERIFY;
}
}
spiUnselect(spip);
devp->state = FLASH_READY;
flash_bus_release(devp);
return FLASH_NO_ERROR;
}
static flash_error_t query_erase(void *instance, uint32_t *msec) {
N25Q128Driver *devp = (N25Q128Driver *)instance;
SPIDriver *spip = devp->config->spip;
uint8_t sts;
osalDbgCheck(instance != NULL);
osalDbgAssert((devp->state == FLASH_READY) || (devp->state == FLASH_ERASE),
"invalid state");
/* If there is an erase in progress then the device must be checked.*/
if (devp->state == FLASH_ERASE) {
flash_bus_acquire(devp);
/* Read status command.*/
spiSelect(spip);
flash_send_cmd(devp, N25Q128_CMD_READ_FLAG_STATUS_REGISTER);
spiReceive(spip, 1, &sts);
spiUnselect(spip);
/* If the P/E bit is zero (busy) or the flash in a suspended state then
report that the operation is still in progress.*/
if (((sts & N25Q128_STS_PROGRAM_ERASE) == 0U) ||
((sts & N25Q128_STS_ERASE_SUSPEND) != 0U)) {
flash_bus_release(devp);
/* Recommended time before polling again, this is a simplified
implementation.*/
if (msec != NULL) {
*msec = 1U;
}
return FLASH_BUSY_ERASING;
}
/* The device is ready to accept commands.*/
devp->state = FLASH_READY;
/* Checking for errors.*/
if ((sts & N25Q128_STS_ALL_ERRORS) != 0U) {
/* Clearing status register.*/
flash_short_cmd(devp, N25Q128_CMD_CLEAR_FLAG_STATUS_REGISTER);
/* Program operation failed.*/
return FLASH_ERROR_ERASE;
}
flash_bus_release(devp);
}
return FLASH_NO_ERROR;
}
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
/**
* @brief Initializes an instance.
*
* @param[out] devp pointer to the @p N25Q128Driver object
*
* @init
*/
void n25q128ObjectInit(N25Q128Driver *devp) {
osalDbgCheck(devp != NULL);
devp->vmt = &n25q128_vmt;
devp->state = FLASH_STOP;
devp->config = NULL;
}
/**
* @brief Configures and activates N25Q128 driver.
*
* @param[in] devp pointer to the @p N25Q128Driver object
* @param[in] config pointer to the configuration
*
* @api
*/
void n25q128Start(N25Q128Driver *devp, const N25Q128Config *config) {
osalDbgCheck((devp != NULL) && (config != NULL));
osalDbgAssert(devp->state != FLASH_UNINIT, "invalid state");
if (devp->state == FLASH_STOP) {
SPIDriver *spip = config->spip;
devp->config = config;
flash_bus_acquire(devp);
/* Reset Enable command.*/
flash_short_cmd(devp, N25Q128_CMD_RESET_ENABLE);
(void) spiPolledExchange(spip, 0xFF); /* One frame delay.*/
/* Reset Memory command.*/
flash_short_cmd(devp, N25Q128_CMD_RESET_MEMORY);
devp->state = FLASH_READY;
flash_bus_release(devp);
}
}
/**
* @brief Deactivates the N25Q128 driver.
*
* @param[in] devp pointer to the @p N25Q128Driver object
*
* @api
*/
void n25q128Stop(N25Q128Driver *devp) {
SPIDriver *spip = devp->config->spip;
osalDbgCheck(devp != NULL);
osalDbgAssert(devp->state != FLASH_UNINIT, "invalid state");
if (devp->state != FLASH_STOP) {
flash_bus_acquire(devp);
spiStop(spip);
devp->config = NULL;
devp->state = FLASH_STOP;
flash_bus_release(devp);
}
}
/**
* @brief Reads the device identifier.
*
* @param[in] devp pointer to the @p N25Q128Driver object
* @param[in] rp pointer to the read buffer
* @param[in] n number of bytes to read (1..17)
*
* @api
*/
void n25q128ReadId(N25Q128Driver *devp, uint8_t *rp, size_t n) {
SPIDriver *spip = devp->config->spip;
osalDbgCheck((devp != NULL) && (rp != NULL) && (n > 0U) && (n <= 17U));
osalDbgAssert(devp->state == FLASH_READY, "invalid state");
flash_bus_acquire(devp);
devp->state = FLASH_READ;
/* Read Id command.*/
spiSelect(spip);
flash_send_cmd(devp, N25Q128_CMD_READ_ID);
spiReceive(spip, n, rp);
spiUnselect(spip);
devp->state = FLASH_READY;
flash_bus_release(devp);
}
/** @} */

211
os/ex/Micron/n25q128_spi.h
View File

@ -1,211 +0,0 @@
/*
N25Q128 Flash Driver - Copyright (C) 2016 Giovanni Di Sirio
This file is part of ChibiOS.
ChibiOS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
ChibiOS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/**
* @file n25q128_spi.h
* @brief N25Q128 over SPI driver header.
*
* @addtogroup n25q128_spi
* @{
*/
#ifndef N25Q128_H
#define N25Q128_H
#include "hal_flash.h"
/*===========================================================================*/
/* Driver constants. */
/*===========================================================================*/
/**
* @name Command codes
* @{
*/
#define N25Q128_CMD_RESET_ENABLE 0x66
#define N25Q128_CMD_RESET_MEMORY 0x99
#define N25Q128_CMD_READ_ID 0x9E
#define N25Q128_CMD_READ_DISCOVERY_PARAMETER 0x5A
#define N25Q128_CMD_READ 0x03
#define N25Q128_CMD_FAST_READ 0x08
#define N25Q128_CMD_WRITE_ENABLE 0x06
#define N25Q128_CMD_WRITE_DISABLE 0x04
#define N25Q128_CMD_READ_STATUS_REGISTER 0x05
#define N25Q128_CMD_WRITE_STATUS_REGISTER 0x01
#define N25Q128_CMD_READ_LOCK_REGISTER 0xE8
#define N25Q128_CMD_WRITE_LOCK_REGISTER 0xE5
#define N25Q128_CMD_READ_FLAG_STATUS_REGISTER 0x70
#define N25Q128_CMD_CLEAR_FLAG_STATUS_REGISTER 0x50
#define N25Q128_CMD_READ_NV_CONFIGURATION_REGISTER 0xB5
#define N25Q128_CMD_WRITE_NV_CONFIGURATION_REGISTER 0xB1
#define N25Q128_CMD_READ_V_CONF_REGISTER 0x85
#define N25Q128_CMD_WRITE_V_CONF_REGISTER 0x81
#define N25Q128_CMD_READ_ENHANCED_V_CONF_REGISTER 0x65
#define N25Q128_CMD_WRITE_ENHANCED_V_CONF_REGISTER 0x61
#define N25Q128_CMD_PAGE_PROGRAM 0x02
#define N25Q128_CMD_SUBSECTOR_ERASE 0x20
#define N25Q128_CMD_SECTOR_ERASE 0xD8
#define N25Q128_CMD_BULK_ERASE 0xC7
#define N25Q128_CMD_PROGRAM_ERASE_RESUME 0x7A
#define N25Q128_CMD_PROGRAM_ERASE_SUSPEND 0x75
#define N25Q128_CMD_READ_OTP_ARRAY 0x4B
#define N25Q128_CMD_PROGRAM_OTP_ARRAY 0x42
/** @} */
/**
* @name Status register bits
* @{
*/
#define N25Q128_STS_PROGRAM_ERASE 0x80U
#define N25Q128_STS_ERASE_SUSPEND 0x40U
#define N25Q128_STS_ERASE_ERROR 0x20U
#define N25Q128_STS_PROGRAM_ERROR 0x10U
#define N25Q128_STS_VPP_ERROR 0x08U
#define N25Q128_STS_PROGRAM_SUSPEND 0x04U
#define N25Q128_STS_PROTECTION_ERROR 0x02U
#define N25Q128_STS_RESERVED 0x01U
#define N25Q128_STS_ALL_ERRORS (N25Q128_STS_ERASE_ERROR | \
N25Q128_STS_PROGRAM_ERROR | \
N25Q128_STS_VPP_ERROR | \
N25Q128_STS_PROTECTION_ERROR)
/** @} */
/*===========================================================================*/
/* Driver pre-compile time settings. */
/*===========================================================================*/
/**
* @name Configuration options
* @{
*/
/**
* @brief N25Q128 shared SPI switch.
* @details If set to @p TRUE the device acquires SPI bus ownership
* on each transaction.
* @note The default is @p FALSE. Requires SPI_USE_MUTUAL_EXCLUSION
*/
#if !defined(N25Q128_SHARED_SPI) || defined(__DOXYGEN__)
#define N25Q128_SHARED_SPI TRUE
#endif
/**
* @brief Delays insertions.
* @details If enabled this options inserts delays into the flash waiting
* routines releasing some extra CPU time for the threads with
* lower priority, this may slow down the driver a bit however.
* This option is recommended also when the SPI driver does not
* use a DMA channel and heavily loads the CPU.
*/
#if !defined(N25Q128_NICE_WAITING) || defined(__DOXYGEN__)
#define N25Q128_NICE_WAITING TRUE
#endif
/**
* @brief Uses 4kB sub-sectors rather than 64kB sectors.
*/
#if !defined(N25Q128_USE_SUB_SECTORS) || defined(__DOXYGEN__)
#define N25Q128_USE_SUB_SECTORS FALSE
#endif
/** @} */
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
#if !HAL_USE_SPI
#error "this module requires HAL_USE_SPI"
#endif
#if N25Q128_SHARED_SPI && !SPI_USE_MUTUAL_EXCLUSION
#error "N25Q128_SHARED_SPI requires SPI_USE_MUTUAL_EXCLUSION"
#endif
/*===========================================================================*/
/* Driver data structures and types. */
/*===========================================================================*/
/**
* @brief Type of a N25Q128 configuration structure.
*/
typedef struct {
/**
* @brief SPI driver associated to this N25Q128.
*/
SPIDriver *spip;
/**
* @brief SPI configuration associated to this N25Q128.
*/
const SPIConfig *spicfg;
} N25Q128Config;
/**
* @brief @p N25Q128 specific methods.
*/
#define _n25q128_methods \
_base_flash_methods
/**
* @extends BaseGyroscopeVMT
*
* @brief @p N25Q128 virtual methods table.
*/
struct N25Q128DriverVMT {
_n25q128_methods
};
/**
* @extends BaseFlash
*
* @brief Type of N25Q128 flash class.
*/
typedef struct {
/**
* @brief BaseFlash Virtual Methods Table.
*/
const struct N25Q128DriverVMT *vmt;
_base_flash_data
/**
* @brief Current configuration data.
*/
const N25Q128Config *config;
} N25Q128Driver;
/*===========================================================================*/
/* Driver macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus
extern "C" {
#endif
void n25q128ObjectInit(N25Q128Driver *devp);
void n25q128Start(N25Q128Driver *devp, const N25Q128Config *config);
void n25q128Stop(N25Q128Driver *devp);
void n25q128ReadId(N25Q128Driver *devp, uint8_t *rp, size_t n);
#ifdef __cplusplus
}
#endif
#endif /* N25Q128_H */
/** @} */

7
os/ex/Micron/n25q128_spi.mk
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@ -1,7 +0,0 @@
# List of all the N25Q128 device files.
N25Q128SRC := $(CHIBIOS)/os/hal/lib/peripherals/flash/hal_flash.c \
$(CHIBIOS)/os/ex/Micron/n25q128_spi.c
# Required include directories
N25Q128INC := $(CHIBIOS)/os/hal/lib/peripherals/flash \
$(CHIBIOS)/os/ex/Micron

7
os/hal/lib/peripherals/flash/hal_jesd216_flash.c
View File

@ -337,6 +337,9 @@ void jesd216_bus_acquire(BUSDriver *busp, BUSConfig *config) {
(void)config;
qspiAcquireBus(busp);
if (busp->config != config) {
qspiStart(busp, config);
}
}
void jesd216_bus_release(BUSDriver *busp) {
@ -348,7 +351,9 @@ void jesd216_bus_release(BUSDriver *busp) {
void jesd216_bus_acquire(BUSDriver *busp, const BUSConfig *config) {
spiAcquireBus(busp);
spiStart(busp, config);
if (busp->config != config) {
spiStart(busp, config);
}
}
void jesd216_bus_release(BUSDriver *busp) {

3
readme.txt
View File

@ -82,7 +82,8 @@
- HAL: Added events handling to the PAL driver. The EXT driver is now
deprecated but still supported.
- EX: Added flash implementation for Micron M25Qxxx devices.
- HAL: Added base flash class and JESD216 flash class.
- HAL: Added base flash class and JESD216 serial flash class handling both SPI
and QSPI modes.
- HAL: Extended PLLI2S for STM32F4xx subfamily.
- HAL: Added QSPI driver implementation for STM32.
- HAL: Added QSPI driver model.

2
testhal/STM32/STM32F3xx/SPI-N25Q128/debug/STM32F3xx-SPI-N25Q128 (OpenOCD, Flash and Run).launch
View File

@ -33,7 +33,7 @@
<intAttribute key="org.eclipse.cdt.launch.ATTR_BUILD_BEFORE_LAUNCH_ATTR" value="2"/>
<stringAttribute key="org.eclipse.cdt.launch.COREFILE_PATH" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.DEBUGGER_REGISTER_GROUPS" value=""/>
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;cmd-flash_send_cmd-(format)&quot; val=&quot;4&quot;/&gt;&lt;content id=&quot;null-main-(format)&quot; val=&quot;0&quot;/&gt;&lt;content id=&quot;buffer[0]-null-main-(format)&quot; val=&quot;0&quot;/&gt;&lt;/contentList&gt;"/>
<stringAttribute key="org.eclipse.cdt.launch.FORMAT" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&lt;contentList&gt;&lt;content id=&quot;buffer[0]-null-main-(format)&quot; val=&quot;0&quot;/&gt;&lt;content id=&quot;null-main-(format)&quot; val=&quot;0&quot;/&gt;&lt;content id=&quot;cmd-flash_send_cmd-(format)&quot; val=&quot;4&quot;/&gt;&lt;/contentList&gt;"/>
<stringAttribute key="org.eclipse.cdt.launch.GLOBAL_VARIABLES" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;globalVariableList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.MEMORY_BLOCKS" value="&lt;?xml version=&quot;1.0&quot; encoding=&quot;UTF-8&quot; standalone=&quot;no&quot;?&gt;&#13;&#10;&lt;memoryBlockExpressionList/&gt;&#13;&#10;"/>
<stringAttribute key="org.eclipse.cdt.launch.PROGRAM_NAME" value="./build/ch.elf"/>

1
testhal/STM32/STM32F3xx/SPI-N25Q128/main.c
View File

@ -94,7 +94,6 @@ int main(void) {
*/
chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 1, Thread1, NULL);
/*
* SPI2 I/O pins setup.
*/