andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Cortex-M7 support in RT and NIL. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8115 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Giovanni Di Sirio 2015-07-27 12:06:59 +00:00
parent 343fb915c4
commit b03ce4e2f2
4 changed files with 28 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
os/nil/ports/ARMCMx/nilcore.h
View File

@ -180,9 +180,11 @@ struct port_intctx {};
/* Includes the sub-architecture-specific part.*/
#if (CORTEX_MODEL == 0) || (CORTEX_MODEL == 1)
#include "nilcore_v6m.h"
#elif (CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)
#include "nilcore_v7m.h"
#include "chcore_v6m.h"
#elif (CORTEX_MODEL == 3) || (CORTEX_MODEL == 4) || (CORTEX_MODEL == 7)
#include "chcore_v7m.h"
#else
#error "unknown Cortex-M variant"
#endif
#if !defined(_FROM_ASM_)

11
os/nil/ports/ARMCMx/nilcore_v7m.h
View File

@ -157,12 +157,21 @@
#elif (CORTEX_MODEL == 4)
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7-ME"
#define PORT_ARCHITECTURE_NAME "ARMv7E-M"
#if CORTEX_USE_FPU
#define PORT_CORE_VARIANT_NAME "Cortex-M4F"
#else
#define PORT_CORE_VARIANT_NAME "Cortex-M4"
#endif
#elif (CORTEX_MODEL == 7)
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7E-M"
#if CORTEX_USE_FPU
#define PORT_CORE_VARIANT_NAME "Cortex-M7F"
#else
#define PORT_CORE_VARIANT_NAME "Cortex-M7"
#endif
#endif
/**

4
os/rt/ports/ARMCMx/chcore.h
View File

@ -191,8 +191,10 @@ struct context {
/* Includes the sub-architecture-specific part.*/
#if (CORTEX_MODEL == 0) || (CORTEX_MODEL == 1)
#include "chcore_v6m.h"
#elif (CORTEX_MODEL == 3) || (CORTEX_MODEL == 4)
#elif (CORTEX_MODEL == 3) || (CORTEX_MODEL == 4) || (CORTEX_MODEL == 7)
#include "chcore_v7m.h"
#else
#error "unknown Cortex-M variant"
#endif
#if !defined(_FROM_ASM_)

11
os/rt/ports/ARMCMx/chcore_v7m.h
View File

@ -157,12 +157,21 @@
#elif (CORTEX_MODEL == 4)
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7-ME"
#define PORT_ARCHITECTURE_NAME "ARMv7E-M"
#if CORTEX_USE_FPU
#define PORT_CORE_VARIANT_NAME "Cortex-M4F"
#else
#define PORT_CORE_VARIANT_NAME "Cortex-M4"
#endif
#elif (CORTEX_MODEL == 7)
#define PORT_ARCHITECTURE_ARM_v7ME
#define PORT_ARCHITECTURE_NAME "ARMv7E-M"
#if CORTEX_USE_FPU
#define PORT_CORE_VARIANT_NAME "Cortex-M7F"
#else
#define PORT_CORE_VARIANT_NAME "Cortex-M7"
#endif
#endif
/**