From b23fe5dcfee36d1459e43e4f60e30d65a8c5d93b Mon Sep 17 00:00:00 2001 From: cinsights Date: Fri, 16 Apr 2021 13:44:03 +0000 Subject: [PATCH] RP WDGv1 basic - to be tested git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14203 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c | 8 +++----- os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h | 19 +++---------------- os/hal/ports/RP/RP2040/platform.mk | 1 + 3 files changed, 7 insertions(+), 21 deletions(-) diff --git a/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c b/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c index b3c3dff22..83072a1a7 100644 --- a/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c +++ b/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.c @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -81,13 +81,11 @@ void wdg_lld_start(WDGDriver *wdgp) { /* Set the time. */ uint32_t time = wdgp->wdg->config.rlr; - /* Due to a silicon bug (see errata RP2040-E1) WDG counts down at each edge. */ + /* Due to a silicon bug (see errata RP2040-E1) WDG decrements at each edge. */ time = ((time == 0U) ? 50 : time) * 2 * 1000; /* Set ceiling if greater than count capability. */ - if (time > WATCHDOG_CTRL_TIME) { - time = WATCHDOG_CTRL_TIME; - } + time = (time > WATCHDOG_CTRL_TIME) ? WATCHDOG_CTRL_TIME : time; /* Set the initial interval, state, control bits and enable WDG. */ wdgp->wdg->LOAD = time; diff --git a/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h b/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h index 5ba0f8578..5fd65a7f2 100644 --- a/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h +++ b/os/hal/ports/RP/LLD/WDGv1/hal_wdg_lld.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2021 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -16,7 +16,7 @@ /** * @file hal_wdg_lld.h - * @brief WDG Driver subsystem low level driver header template. + * @brief WDG driver subsystem low level driver header. * * @addtogroup WDG * @{ @@ -40,19 +40,6 @@ /* Driver pre-compile time settings. */ /*===========================================================================*/ -/** - * @name Configuration options - * @{ - */ -/** - * @brief WDG1 driver enable switch. - * @note The default is @p FALSE. - */ -#if !defined(PLATFORM_WDG_USE_WDG1) || defined(__DOXYGEN__) -#define PLATFORM_WDG_USE_WDG1 FALSE -#endif -/** @} */ - /*===========================================================================*/ /* Derived constants and error checks. */ /*===========================================================================*/ @@ -75,7 +62,7 @@ typedef struct { * @brief Configuration of the WATCHDOG LOAD register. * @details See the RP2040 data sheet for details. */ - uint32_t rlr; + uint32_t rlr; } WDGConfig; /** diff --git a/os/hal/ports/RP/RP2040/platform.mk b/os/hal/ports/RP/RP2040/platform.mk index 693575e1d..b48082417 100644 --- a/os/hal/ports/RP/RP2040/platform.mk +++ b/os/hal/ports/RP/RP2040/platform.mk @@ -30,6 +30,7 @@ include $(CHIBIOS)/os/hal/ports/RP/LLD/GPIOv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/TIMERv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/UARTv1/driver.mk include $(CHIBIOS)/os/hal/ports/RP/LLD/RTCv1/driver.mk +include $(CHIBIOS)/os/hal/ports/RP/LLD/WDGv1/driver.mk # Shared variables ALLCSRC += $(PLATFORMSRC)