From b73cd4bb0dcaaba56674edfd5ff4855c540b64d1 Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Thu, 11 Nov 2021 18:17:36 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15061 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- .../multi/USB_CDC/cfg/stm32g474re_nucleo64/mcuconf.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/testhal/STM32/multi/USB_CDC/cfg/stm32g474re_nucleo64/mcuconf.h b/testhal/STM32/multi/USB_CDC/cfg/stm32g474re_nucleo64/mcuconf.h index 2a9af7c07..94f2b30ff 100644 --- a/testhal/STM32/multi/USB_CDC/cfg/stm32g474re_nucleo64/mcuconf.h +++ b/testhal/STM32/multi/USB_CDC/cfg/stm32g474re_nucleo64/mcuconf.h @@ -62,17 +62,17 @@ #define STM32_PWR_PUCRG (0U) #define STM32_PWR_PDCRG (0U) #define STM32_HSI16_ENABLED TRUE -#define STM32_HSI48_ENABLED FALSE +#define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED TRUE #define STM32_LSI_ENABLED FALSE -#define STM32_LSE_ENABLED TRUE +#define STM32_LSE_ENABLED FALSE #define STM32_SW STM32_SW_PLLRCLK #define STM32_PLLSRC STM32_PLLSRC_HSE #define STM32_PLLM_VALUE 6 -#define STM32_PLLN_VALUE 72 -#define STM32_PLLPDIV_VALUE 3 +#define STM32_PLLN_VALUE 85 +#define STM32_PLLPDIV_VALUE 0 #define STM32_PLLP_VALUE 7 -#define STM32_PLLQ_VALUE 6 +#define STM32_PLLQ_VALUE 8 #define STM32_PLLR_VALUE 2 #define STM32_HPRE STM32_HPRE_DIV1 #define STM32_PPRE1 STM32_PPRE1_DIV2 @@ -98,7 +98,7 @@ #define STM32_SAI1SEL STM32_SAI1SEL_SYSCLK #define STM32_I2S23SEL STM32_I2S23SEL_SYSCLK #define STM32_FDCANSEL STM32_FDCANSEL_HSE -#define STM32_CLK48SEL STM32_CLK48SEL_PLLQCLK +#define STM32_CLK48SEL STM32_CLK48SEL_HSI48 #define STM32_ADC12SEL STM32_ADC12SEL_PLLPCLK #define STM32_ADC345SEL STM32_ADC345SEL_PLLPCLK #define STM32_QSPISEL STM32_QSPISEL_SYSCLK