andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

RAM vectors support. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@15045 27425a3e-05d8-49a3-a47f-9c15f0e5edd8
This commit is contained in:
Giovanni Di Sirio 2021-11-09 08:48:20 +00:00
parent 7cc1e87d76
commit b7678024ac
4 changed files with 42 additions and 98 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

42
os/common/startup/ARMCMx/compilers/GCC/crt0_v7m.S
View File

@ -111,6 +111,14 @@
#define CRT0_INIT_STACKS TRUE
#endif
/**
* @brief Vectors table initialization.
* @details Vectors are copied in RAM on startup.
*/
#if !defined(CRT0_INIT_VECTORS) || defined(__DOXYGEN__)
#define CRT0_INIT_VECTORS FALSE
#endif
/**
* @brief DATA segment initialization switch.
*/
@ -200,9 +208,9 @@ _crt0_entry:
msr PSP, r0
#if CRT0_VTOR_INIT == TRUE
/* Initial VTOR position enforced.*/
ldr r0, =_vectors
movw r1, #SCB_VTOR & 0xFFFF
movt r1, #SCB_VTOR >> 16
ldr r1, =SCB_VTOR
str r0, [r1]
#endif
@ -278,9 +286,30 @@ psloop:
blo psloop
#endif
#if CRT0_INIT_VECTORS == TRUE
/* Vectors initialization. Note, it assumes that the vectors
size is a multiple of 4 so the linker file must ensure
this.*/
ldr r1, =__textvectors_base__
ldr r2, =__vectors_base__
ldr r3, =__vectors_end__
mov r4, r2
vloop:
cmp r2, r3
ittt lo
ldrlo r0, [r1], #4
strlo r0, [r2], #4
blo vloop
/* VTOR now pointing to the RAM table.*/
ldr r1, =SCB_VTOR
str r4, [r1]
#endif
#if CRT0_INIT_DATA == TRUE
/* Data initialization. Note, it assumes that the DATA size
is a multiple of 4 so the linker file must ensure this.*/
/* Data initialization. Note, it assumes that the DATA
size is a multiple of 4 so the linker file must ensure
this.*/
ldr r1, =__textdata_base__
ldr r2, =__data_base__
ldr r3, =__data_end__
@ -293,8 +322,9 @@ dloop:
#endif
#if CRT0_INIT_BSS == TRUE
/* BSS initialization. Note, it assumes that the DATA size
is a multiple of 4 so the linker file must ensure this.*/
/* BSS initialization. Note, it assumes that the BSS
size is a multiple of 4 so the linker file must ensure
this.*/
movs r0, #0
ldr r1, =__bss_base__
ldr r2, =__bss_end__

3
os/common/startup/ARMCMx/compilers/GCC/ld/rules_code.ld
View File

@ -20,7 +20,10 @@ SECTIONS
{
.vectors : ALIGN(1024)
{
__textvectors_base__ = LOADADDR(.vectors);
__vectors_base__ = .;
KEEP(*(.vectors))
__vectors_end__ = .;
} > VECTORS_FLASH AT > VECTORS_FLASH_LMA
.xtors : ALIGN(4)

4
os/common/startup/ARMCMx/compilers/GCC/ld/rules_data.ld
View File

@ -20,8 +20,8 @@ SECTIONS
{
PROVIDE(_textdata = LOADADDR(.data));
PROVIDE(_data = .);
__textdata_base__ = LOADADDR(.data);
__data_base__ = .;
__textdata_base__ = LOADADDR(.data);
__data_base__ = .;
*(.data)
*(.data.*)
*(.ramtext)

91
readme.txt
View File

@ -74,93 +74,4 @@
*****************************************************************************
*** Next ***
- NEW: STM32 ADCv2 now supports return code on start function.
- NEW: Integrated FatFS with lwIP HTTPD, now it is possible to serve files
using HTTP from a storage device.
- NEW: Updated FatFS to version 0.14b.
- NEW: SPIv2 driver has been implemented on: STM32F0, STM32F1, STM32F3,
STM32F4, STM32F7, STM32G0, STM32G4, STM32L0, STM32L1, STM32L4,
STM32L4+, STM32H7.
- NEW: New SPIv2 driver model, it is compatible with the previous SPI driver
and introduces: better runtime errors handling, slave mode,
data synchronization function, various other improvements.
- NEW: Added an alternate port for ARMv7-M, it uses less RAM and it is
faster at interrupt processing, it is slightly slower at
thread-to-thread context switch so it is not a full replacement.
- NEW: Now all xxxStart() functions in HAL are able to report a driver
activation error.
- NEW: Support for STM32G031, STM32G041, STM32G0B1, STM32G0C1.
- NEW: Made STM32H7 non-cacheable memory option also shareable.
- NEW: EFL driver and demo for STM32F3xx.
- NEW: New unit test subsystem under /os/test. Now it is officially
ChibiOS/TEST.
- FIX: Fixed function nvicSetSystemHandlerPriority() failing with CM0+ cores
(bug #1199)(backported to 20.3.4)(TBP to 21.6.1).
- FIX: Fixed several problems in STM32L4xx PLL and GPIO settings (bug #1198)
(backported to 20.3.4)(TBP to 21.6.1).
- FIX: Fixed PLLSA1x input frequency calculated incorrectly (bug #1197)
(TBP to 21.6.1).
- FIX: Fixed ARMCMx port, MPU not enabled when PORT_ENABLE_GUARD_PAGES is set
(bug #1195)(backported to 20.3.4)(TBP to 21.6.1).
- FIX: Fixed removed incorrect ADCv4 checks for MONEN (bug #1194)
- FIX: Fixed hang in spi_lld_ignore() in SPIv3 on H7 (bug #1193)
- FIX: Fixed invalid references in e200 port (bug #1192)
(TBP to 21.6.1)
- FIX: Fixed NIL invalid references when debug options are enabled (bug #1191)
(TBP to 21.6.1)
- FIX: Fixed problem in stm32_pll.inc and stm32_pllv2.inc (bug #1190)
(TBP to 21.6.1)
- FIX: Fixed invalid RCC LPUART1 clock enable on STM32G0xx (bug #1189)
(TBP to 21.6.1)(backported to 20.3.4).
- FIX: Support for STM32G491 (bug #1187)(TBP to 21.6.1).
- FIX: Fixes for uart clock rounding, missing DMA streams and timers
(bug #1186)(TBP).
- FIX: Fixed invalid check in chVTResetTimeStamp() function (bug #1185)
(TBP).
- FIX: Fixed wrong configuration in testex LSM6DSL demos (bug #1184).
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed CH_CFG_NO_IDLE_THREAD option causes compiler errors (bug #1183)
(backported to 21.6.1).
- FIX: Fixed STM32 ADCv3 differences in headers (bug #1182)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed DMAv1 compile fail on STM32L011 (bug #1181)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed error in STM32_ADCCLK_MIN for STM32F37x/hal_lld.h (bug #1180)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed direct calls to RT in STM32 RTCv2 and RTCv3 (bug #1179)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed STM32G071 mcuconf.h template not showing TIM14/15/16/17
(bug #1178)(backported to 21.6.1).
- FIX: Fixed path ambiguity between STM32 USARTv2 and USARTv3 drivers
(bug #1177)(backported to 21.6.1).
- FIX: Fixed invalid DMAMUX settings in DMAv1 for some devices (bug #1176)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed wrong macro in the demo STM32F7xx-SPI-ADXL355 (bug #1175)
(backported to 21.6.1(backported to 21.6.1).
- FIX: Fixed problem with RC initialization mask of the GPIO for the
STM32L4x3 (bug #1174)(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed problem with N25Q driver (bug #1173)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed semaphores broken when CH_CFG_USE_SEMAPHORES_PRIORITY is enabled
(bug #1172)(backported to 21.6.1).
- FIX: Fixed idle thread stack area not cleared when CH_DBG_FILL_THREADS
is enabled (bug #1171)(backported to 21.6.1).
- FIX: Fixed function chRegNextThread() broken when CH_CFG_USE_DYNAMIC
is disabled (bug #1170)(backported to 21.6.1).
- FIX: Fixed insufficient information in RT registry (bug #1169)
(backported to 21.6.1).
- FIX: Fixed code base not compatible with -Wcast-align=strict (bug #1168)
(backported to 21.6.1).
- FIX: Fixed wrong chconf.h for ADuCM36x demos (bug #1167)
(backported to 21.6.1).
- FIX: Fixed missing constant in ADuCM36x hal_lld.c (bug #1166)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed missing chrfcu.c file in rt.mk (bug #1165)
(backported to 21.6.1).
- FIX: Fixed invalid STM32 TIM21/TIM22 debug freeze setting (bug #1164)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed missing RTC APB enable on STM32G0xx (bug #1163)
(backported to 21.6.1)
- FIX: Fixed I2S-related definitions missing in STM32F3xx registry (bug #1162)
(backported to 21.6.1)(backported to 20.3.4).
- FIX: Fixed AVR port broken (bug #1161)(backported to 21.6.1).
- NEW: Added option to copy vectors in RAM on startup for GCC ARMv7-M.