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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6395 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-10-29 16:12:49 +00:00
parent 498d5c6125
commit b7db852d0b
21 changed files with 1 additions and 20 deletions
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1
demos/ARMCM4-STM32F407-DISCOVERY-G++/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
demos/ARMCM4-STM32F407-LWIP-FATFS-USB/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
demos/ARMCM4-STM32F407-LWIP/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
readme.txt
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@ -116,6 +116,7 @@
(backported to 2.6.0). (backported to 2.6.0).
- FIX: Fixed MS2ST() and US2ST() macros error (bug #415)(backported to 2.6.0, - FIX: Fixed MS2ST() and US2ST() macros error (bug #415)(backported to 2.6.0,
2.4.4, 2.2.10, NilRTOS). 2.4.4, 2.2.10, NilRTOS).
- NEW: Added support for STM32F401/STM32F42x/STM32F43x devices.
- NEW: Added support for STM32F0xx platform in RTCv2 driver. - NEW: Added support for STM32F0xx platform in RTCv2 driver.
- NEW: Improvements to the STM32F4xx backup domain initialization. - NEW: Improvements to the STM32F4xx backup domain initialization.
- NEW: Added initializer for the DIER register to the STM32 GPT, ICU and - NEW: Added initializer for the DIER register to the STM32 GPT, ICU and

1
testhal/STM32F4xx/ADC/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/BKPSRAM/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE TRUE #define STM32_BKPRAM_ENABLE TRUE

1
testhal/STM32F4xx/CAN/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/DMA_STORM/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/EXT/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/GPT/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/I2C/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/IRQ_STORM/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/IRQ_STORM_FPU/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/PWM-ICU/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/RTC/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/RTC_FATTIME/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/SDC/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/SPI/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/UART/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE

1
testhal/STM32F4xx/USB_CDC/mcuconf.h
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@ -57,7 +57,6 @@
#define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_I2SSRC STM32_I2SSRC_CKIN
#define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 5 #define STM32_PLLI2SR_VALUE 5
#define STM32_VOS STM32_VOS_HIGH
#define STM32_PVD_ENABLE FALSE #define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0 #define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE #define STM32_BKPRAM_ENABLE FALSE