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Updated mcuconf.h for SMT32F446 and STM32F469 by adding PLLSAI and PLLI2S settings 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9572 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
Rocco Marco Guglielmi 2016-06-04 14:54:54 +00:00
parent 0ac96b000b
commit ba9897fa8d
3 changed files with 21 additions and 0 deletions
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7
demos/STM32/RT-STM32F446RE-NUCLEO64/mcuconf.h
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@ -63,6 +63,13 @@
#define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
#define STM32_PLLSAIN_VALUE 192
#define STM32_PLLSAIM_VALUE 4
#define STM32_PLLSAIP_VALUE 4
#define STM32_PLLSAIQ_VALUE 4
#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE

7
demos/STM32/RT-STM32F446ZE-NUCLEO144/mcuconf.h
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@ -63,6 +63,13 @@
#define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SP_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
#define STM32_PLLSAIN_VALUE 192
#define STM32_PLLSAIM_VALUE 4
#define STM32_PLLSAIP_VALUE 4
#define STM32_PLLSAIQ_VALUE 4
#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE

7
demos/STM32/RT-STM32F469I-DISCOVERY/mcuconf.h
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@ -61,6 +61,13 @@
#define STM32_PLLI2SN_VALUE 192
#define STM32_PLLI2SR_VALUE 4
#define STM32_PLLI2SQ_VALUE 4
#define STM32_PLLSAIN_VALUE 192
#define STM32_PLLSAIR_VALUE 4
#define STM32_PLLSAIP_VALUE 4
#define STM32_PLLSAIQ_VALUE 4
#define STM32_SAI1SEL STM32_SAI2SEL_PLLR
#define STM32_SAI2SEL STM32_SAI2SEL_PLLR
#define STM32_CK48MSEL STM32_CK48MSEL_PLL
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_BKPRAM_ENABLE FALSE