git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@666 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2009-01-22 15:37:29 +00:00
parent b094fe9dc1
commit bae98eb8d8
17 changed files with 102 additions and 78 deletions

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@ -3,21 +3,21 @@
* @{ * @{
* Response time jitter is one of the most sneaky source of problems when * Response time jitter is one of the most sneaky source of problems when
* designing a real time system. When using a RTOS like ChibiOS/RT one must * designing a real time system. When using a RTOS like ChibiOS/RT one must
* be aware of what Jitter is and how it can affect the performance of the * be aware of what the jitter is and how it can affect the performance of the
* system.<br> * system.<br>
* A good place to start is this * A good place to start is this
* <a href="http://en.wikipedia.org/wiki/Jitter">Wikipedia article</a>. * <a href="http://en.wikipedia.org/wiki/Jitter">Wikipedia article</a>.
* *
* <h2>Jitter Sources</h2> * <h2>Jitter Sources</h2>
* Under ChibiOS/RT (or any other similar RTOS) there are several jitter * Under ChibiOS/RT (or any other similar RTOS) there are several possible
* possible sources: * jitter sources:
* -# Hardware interrupts latency. * -# Hardware interrupts latency.
* -# Interrupts service time and priority. * -# Interrupts service time and priority.
* -# Kernel lock zones. * -# Kernel lock zones.
* -# Higher priority threads activity. * -# Higher priority threads activity.
* *
* <h2>Jitter mitigation countermeasures</h2> * <h2>Jitter mitigation countermeasures</h2>
* For each of the previously described jitter source there are possible * For each of the previously described jitter sources there are possible
* mitigation actions. * mitigation actions.
* *
* <h3>Hardware interrupts latency</h3> * <h3>Hardware interrupts latency</h3>
@ -49,13 +49,14 @@
* As example, in the ARM port, FIQ sources are not affected by the * As example, in the ARM port, FIQ sources are not affected by the
* kernel-generated jitter. The Cortex-M3 port is even better thanks to its * kernel-generated jitter. The Cortex-M3 port is even better thanks to its
* hardware-assisted interrupt architecture allowing handlers preemption, * hardware-assisted interrupt architecture allowing handlers preemption,
* late switch, tail chaining etc. See the notes about the various @ref Ports. * late arriving, tail chaining etc. See the notes about the various
* @ref Ports.
* *
* <h3>Kernel lock zones</h3> * <h3>Kernel lock zones</h3>
* The OS kernel protects some critical internal data structure by disabling * The OS kernel protects some critical internal data structure by disabling
* (fully in simple architecture, to some extent in more advanced * (fully in simple architecture, to some extent in more advanced
* microcontrollers) the interrupt sources. Because of this the kernel itself * microcontrollers) the interrupt sources. Because of this the kernel itself
* is a jitter source, a good OS design minimizes the jitter generated by the * is a jitter cause, a good OS design minimizes the jitter generated by the
* kernel by both using adequate data structure, algorithms and good coding * kernel by both using adequate data structure, algorithms and good coding
* practices.<br> * practices.<br>
* A good OS design is not the whole story, some OS primitives may generate * A good OS design is not the whole story, some OS primitives may generate
@ -72,6 +73,6 @@
* by carefully assigning priorities to the various threads and carefully * by carefully assigning priorities to the various threads and carefully
* designing mutual exclusion zones.<br> * designing mutual exclusion zones.<br>
* The use of the proper synchronization mechanism (semaphores, mutexes, events, * The use of the proper synchronization mechanism (semaphores, mutexes, events,
* messages and so on) also helps to improve the system performance. * messages and so on) also helps to improve the overall system performance.
*/ */
/** @} */ /** @} */

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@ -197,7 +197,10 @@ struct context {
* Disables the IRQ sources and keeps the FIQ sources enabled. * Disables the IRQ sources and keeps the FIQ sources enabled.
*/ */
#ifdef THUMB #ifdef THUMB
#define port_lock() _port_lock_thumb() //#define port_lock() _port_lock_thumb()
#define port_lock() { \
asm volatile ("bl _port_lock_thumb" : : : "r3", "lr"); \
}
#else /* THUMB */ #else /* THUMB */
#define port_lock() asm volatile ("msr CPSR_c, #0x9F") #define port_lock() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */ #endif /* !THUMB */
@ -206,7 +209,10 @@ struct context {
* Enables both the IRQ and FIQ sources. * Enables both the IRQ and FIQ sources.
*/ */
#ifdef THUMB #ifdef THUMB
#define port_unlock() _port_unlock_thumb() //#define port_unlock() _port_unlock_thumb()
#define port_unlock() { \
asm volatile ("bl _port_unlock_thumb" : : : "r3", "lr"); \
}
#else /* THUMB */ #else /* THUMB */
#define port_unlock() asm volatile ("msr CPSR_c, #0x1F") #define port_unlock() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */ #endif /* !THUMB */
@ -227,7 +233,10 @@ struct context {
* LPC214x datasheet. * LPC214x datasheet.
*/ */
#ifdef THUMB #ifdef THUMB
#define port_disable() _port_disable_thumb() //#define port_disable() _port_disable_thumb()
#define port_disable() { \
asm volatile ("bl _port_disable_thumb" : : : "r3", "lr"); \
}
#else /* THUMB */ #else /* THUMB */
#define port_disable() { \ #define port_disable() { \
asm volatile ("mrs r3, CPSR \n\t" \ asm volatile ("mrs r3, CPSR \n\t" \
@ -242,7 +251,9 @@ struct context {
* Disables the IRQ sources and enables the FIQ sources. * Disables the IRQ sources and enables the FIQ sources.
*/ */
#ifdef THUMB #ifdef THUMB
#define port_suspend() _port_suspend_thumb() #define port_suspend() { \
asm volatile ("bl _port_suspend_thumb" : : : "r3", "lr"); \
}
#else /* THUMB */ #else /* THUMB */
#define port_suspend() asm volatile ("msr CPSR_c, #0x9F") #define port_suspend() asm volatile ("msr CPSR_c, #0x9F")
#endif /* !THUMB */ #endif /* !THUMB */
@ -251,7 +262,9 @@ struct context {
* Enables both the IRQ and FIQ sources. * Enables both the IRQ and FIQ sources.
*/ */
#ifdef THUMB #ifdef THUMB
#define port_enable() _port_enable_thumb() #define port_enable() { \
asm volatile ("bl _port_enable_thumb" : : : "r3", "lr"); \
}
#else /* THUMB */ #else /* THUMB */
#define port_enable() asm volatile ("msr CPSR_c, #0x1F") #define port_enable() asm volatile ("msr CPSR_c, #0x1F")
#endif /* !THUMB */ #endif /* !THUMB */
@ -273,11 +286,6 @@ extern "C" {
void port_puts(char *msg); void port_puts(char *msg);
void port_halt(void); void port_halt(void);
#ifdef THUMB #ifdef THUMB
void _port_lock_thumb(void);
void _port_unlock_thumb(void);
void _port_disable_thumb(void);
void _port_suspend_thumb(void);
void _port_enable_thumb(void);
void _port_switch_thumb(Thread *otp, Thread *ntp); void _port_switch_thumb(Thread *otp, Thread *ntp);
#else /* THUMB */ #else /* THUMB */
void _port_switch_arm(Thread *otp, Thread *ntp); void _port_switch_arm(Thread *otp, Thread *ntp);

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@ -44,27 +44,28 @@
.balign 16 .balign 16
.code 16 .code 16
.thumb_func .thumb_func
.global _port_disable_all_thumb .global _port_disable_thumb
_port_disable_all_thumb: _port_disable_thumb:
mov r0, pc mov r3, pc
bx r0 bx r3
.code 32 .code 32
mrs r0, CPSR mrs r3, CPSR
orr r0, #I_BIT orr r3, #I_BIT
msr CPSR_c, r0 msr CPSR_c, r3
orr r0, #F_BIT orr r3, #F_BIT
msr CPSR_c, r0 msr CPSR_c, r3
bx lr bx lr
.balign 16 .balign 16
.code 16 .code 16
.thumb_func .thumb_func
.global _port_suspend_thumb .global _port_suspend_thumb
_port_disable_thumb: _port_suspend_thumb:
.thumb_func
.global _port_lock_thumb .global _port_lock_thumb
_port_lock_thumb: _port_lock_thumb:
mov r0, pc mov r3, pc
bx r0 bx r3
.code 32 .code 32
msr CPSR_c, #MODE_SYS | I_BIT msr CPSR_c, #MODE_SYS | I_BIT
bx lr bx lr
@ -74,10 +75,11 @@ _port_lock_thumb:
.thumb_func .thumb_func
.global _port_enable_thumb .global _port_enable_thumb
_port_enable_thumb: _port_enable_thumb:
.thumb_func
.global _port_unlock_thumb .global _port_unlock_thumb
_port_unlock_thumb: _port_unlock_thumb:
mov r0, pc mov r3, pc
bx r0 bx r3
.code 32 .code 32
msr CPSR_c, #MODE_SYS msr CPSR_c, #MODE_SYS
bx lr bx lr

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@ -77,6 +77,10 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- NEW: Added a configuration option to enable nested system locks/unlocks. - NEW: Added a configuration option to enable nested system locks/unlocks.
- NEW: Improved the interrupt handlers related code. Now interrupts are - NEW: Improved the interrupt handlers related code. Now interrupts are
handled in a very similar way in every architecture. handled in a very similar way in every architecture.
- OPT: Improved ARM7 thumb port code, thanks to some GCC tricks involving
registers usage now the kernel is much smaller, much faster and most OS APIs
use less RAM in stack frames (note, this is an ARM7 thumb mode specific
optimization).
- CHANGE: Renamed the macros chSysIRQEnter() and chSysIRQExit() in - CHANGE: Renamed the macros chSysIRQEnter() and chSysIRQExit() in
CH_IRQ_PROLOGUE() and CH_IRQ_EPILOGUE() in order to make very clear that CH_IRQ_PROLOGUE() and CH_IRQ_EPILOGUE() in order to make very clear that
those are not functions but inlined code. Also introduced a new macro those are not functions but inlined code. Also introduced a new macro
@ -86,7 +90,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Introduced the concept of system states, see the documentation. - Introduced the concept of system states, see the documentation.
- Huge improvements to the ports documentation. - Huge improvements to the ports documentation.
- Articles and notes previously in the wiki now merged in the general - Articles and notes previously in the wiki now merged in the general
documentation, the wiki entries are obsolete and will be removed. documentation and updated, the wiki entries are obsolete and will be removed.
- New application notes and articles added. - New application notes and articles added.
*** 1.0.0rc2 *** *** 1.0.0rc2 ***
@ -355,7 +359,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- OPT: Removed an unrequired initialization and made other small optimizations - OPT: Removed an unrequired initialization and made other small optimizations
to the chThdCreate(). to the chThdCreate().
- OPT: Improvements to the test framework, now a virtual timer is used instead - OPT: Improvements to the test framework, now a virtual timer is used instead
of software loops into the bechmarks in order to have more stable results. of software loops into the benchmarks in order to have more stable results.
- New benchmark added to the test suite. - New benchmark added to the test suite.
- Added the C++ wrapper entries to the documentation. - Added the C++ wrapper entries to the documentation.
- Fixed the documentation entry for the chThdCreate() API. - Fixed the documentation entry for the chThdCreate() API.
@ -432,7 +436,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Fixes in various headers to make some macros compatible with both C and C++. - Fixes in various headers to make some macros compatible with both C and C++.
- Fixed a regression in the LPC214x minimal demo that broke interrupt - Fixed a regression in the LPC214x minimal demo that broke interrupt
handling. handling.
- Some fixes to the doxigen documentation. - Some fixes to the doxygen documentation.
- More work done on the ARM-CM3 port but it is still not complete. - More work done on the ARM-CM3 port but it is still not complete.
*** 0.6.1 *** *** 0.6.1 ***
@ -450,7 +454,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Started work on ARM Cortex-M3 architecture. The target chip is the STM32F103 - Started work on ARM Cortex-M3 architecture. The target chip is the STM32F103
on a Olimex STM32-P103 board. on a Olimex STM32-P103 board.
- Added a threads state diagram to the documentation. - Added a threads state diagram to the documentation.
- Various fixes to the doxigen documentation. - Various fixes to the doxygen documentation.
*** 0.6.0 *** *** 0.6.0 ***
- Code refactory, all the old sized-integer definitions like LONG32, UWORD16 - Code refactory, all the old sized-integer definitions like LONG32, UWORD16
@ -487,9 +491,9 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
the new demo were added. the new demo were added.
*** 0.5.4 *** *** 0.5.4 ***
- Port for Atmel AT91SAM7X256 introduced, the port should be useable also on - Port for Atmel AT91SAM7X256 introduced, the port should be usable also on
SAM7S and SAM7XC but no tests were performed. Other SAM7 processors should SAM7S and SAM7XC but no tests were performed. Other SAM7 processors should
also be useable with limited changes. also be usable with limited changes.
The demo currently just performs basic operations, will be enhanced in next The demo currently just performs basic operations, will be enhanced in next
ChibiOS/RT releases, see the demo readme.txt file. ChibiOS/RT releases, see the demo readme.txt file.
- Small fix to the thumb mode IRQ code on the LPC214x port, removed some extra - Small fix to the thumb mode IRQ code on the LPC214x port, removed some extra
@ -522,12 +526,12 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
the P_MSGBYPRIO option when creating a message server thread. the P_MSGBYPRIO option when creating a message server thread.
This change allows the implementation of a priority ceiling protocol into This change allows the implementation of a priority ceiling protocol into
message servers threads. Threads serving messages by priority and threads message servers threads. Threads serving messages by priority and threads
serving messages in FIFO orded can exist at the same time in the system. serving messages in FIFO order can exist at the same time in the system.
This feature can be enabled or disabled by toggling the option This feature can be enabled or disabled by toggling the option
CH_USE_MESSAGES_PRIORITY into the chconf.h file (disabled by default, old CH_USE_MESSAGES_PRIORITY into the chconf.h file (disabled by default, old
behavior). behavior).
Note: This option brings a small overhead when sending a message regardless Note: This option brings a small overhead when sending a message regardless
if in FIFO or priority order, if you dont need priority ordering for your if in FIFO or priority order, if you don't need priority ordering for your
messages it is better to keep the feature disabled in chconf.h. messages it is better to keep the feature disabled in chconf.h.
- Added to the ARM demos load scripts the capability to load code in RAM - Added to the ARM demos load scripts the capability to load code in RAM
instead flash, the function must be marked as: instead flash, the function must be marked as:
@ -535,7 +539,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
The option -mlong-calls should be specified in the makefile too or the The option -mlong-calls should be specified in the makefile too or the
function declared with the "long-call" attribute. function declared with the "long-call" attribute.
- Fixed the MSVC demo project files. - Fixed the MSVC demo project files.
- Fixed some syntax incompatibilites between GCC and MSVC into chmtx.c. - Fixed some syntax incompatibilities between GCC and MSVC into chmtx.c.
*** 0.5.0 *** *** 0.5.0 ***
- NEW: Mutexes, the new mechanism provides a complete implementation of the - NEW: Mutexes, the new mechanism provides a complete implementation of the
@ -664,7 +668,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Added a spreadsheet in the documentation that describes the advantages - Added a spreadsheet in the documentation that describes the advantages
and disadvantages of the various optimization options (both GCC options and and disadvantages of the various optimization options (both GCC options and
ChibiOS/RT options), very interesting read IMO. ChibiOS/RT options), very interesting read IMO.
- The GCC option +falign-functions=16 is now default in the Makefile, it is - The GCC option -falign-functions=16 is now default in the Makefile, it is
required because of the MAM unit into the LPC chips, without this option required because of the MAM unit into the LPC chips, without this option
the code performance is less predictable and can change of some % points the code performance is less predictable and can change of some % points
depending on how the code is aligned in the flash memory, unpredictability depending on how the code is aligned in the flash memory, unpredictability
@ -710,7 +714,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Added experimental MMC/SD block driver to the LPC2148 demo in order to - Added experimental MMC/SD block driver to the LPC2148 demo in order to
support file systems. The driver features also events generation on card support file systems. The driver features also events generation on card
insert/remove, hot plugging supported. insert/remove, hot plugging supported.
- Added missing chThdSuspend() declararion in threads.h. - Added missing chThdSuspend() declaration in threads.h.
*** 0.3.5 *** *** 0.3.5 ***
- Space optimization in events code. - Space optimization in events code.
@ -748,7 +752,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
is done in order to ensure that the initializations performed into the is done in order to ensure that the initializations performed into the
main() procedure are finished before any thread starts. main() procedure are finished before any thread starts.
- Added chThdSetPriority() new API. - Added chThdSetPriority() new API.
- Added a generic events generator timer modulee to the library code. - Added a generic events generator timer module to the library code.
- Modified the ARM7-LPC214x-GCC demo to show the use of the event timer. - Modified the ARM7-LPC214x-GCC demo to show the use of the event timer.
- Added the "#ifdef __cplusplus" stuff to the header files. - Added the "#ifdef __cplusplus" stuff to the header files.
- Removed an obsolete definition in ./src/templates/chtypes.h. - Removed an obsolete definition in ./src/templates/chtypes.h.
@ -792,7 +796,7 @@ Win32-MinGW - ChibiOS/RT simulator and demo into a WIN32 process,
- Thread Local Storage implemented as a single API: chThdLS(). - Thread Local Storage implemented as a single API: chThdLS().
The API simply returns a pointer into the thread working area, see the The API simply returns a pointer into the thread working area, see the
documentation on the web site. documentation on the web site.
- Moved some documentation and images from the web site into the Doxigen - Moved some documentation and images from the web site into the Doxygen
generated HTMLs. generated HTMLs.
*** 0.2.1 *** *** 0.2.1 ***

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@ -32,7 +32,7 @@
#if defined(CH_USE_CONDVARS) && defined(CH_USE_MUTEXES) #if defined(CH_USE_CONDVARS) && defined(CH_USE_MUTEXES)
/** /**
* CondVar structure. * @brief CondVar structure.
*/ */
typedef struct CondVar { typedef struct CondVar {
ThreadsQueue c_queue; ThreadsQueue c_queue;

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@ -33,7 +33,7 @@
typedef struct EventListener EventListener; typedef struct EventListener EventListener;
/** /**
* Event Listener structure. * @brief Event Listener structure.
*/ */
struct EventListener { struct EventListener {
/** Next Event Listener registered on the Event Source.*/ /** Next Event Listener registered on the Event Source.*/
@ -45,7 +45,7 @@ struct EventListener {
}; };
/** /**
* Event Source structure. * @brief Event Source structure.
*/ */
typedef struct EventSource { typedef struct EventSource {
/** First Event Listener registered on the Event Source.*/ /** First Event Listener registered on the Event Source.*/

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@ -32,7 +32,7 @@ typedef struct Thread Thread;
#define notempty(p) ((p)->p_next != (Thread *)(p)) #define notempty(p) ((p)->p_next != (Thread *)(p))
/** /**
* Generic threads queue header and element. * @brief Generic threads queue header and element.
* @extends ThreadsList * @extends ThreadsList
*/ */
typedef struct { typedef struct {
@ -43,17 +43,22 @@ typedef struct {
} ThreadsQueue; } ThreadsQueue;
/** /**
* Generic threads single link list, it works like a stack. * @brief Generic threads single link list.
* @details This list behaves like a stack.
*/ */
typedef struct { typedef struct {
/** Last pushed @p Thread on the stack list, or @p ThreadList when empty. */ /** Last pushed @p Thread on the stack list, or @p ThreadList when empty. */
Thread *p_next; Thread *p_next;
} ThreadsList; } ThreadsList;
/* /**
* Threads Lists functions and macros. * Queue initialization.
*/ */
#define queue_init(tqp) ((tqp)->p_next = (tqp)->p_prev = (Thread *)(tqp)); #define queue_init(tqp) ((tqp)->p_next = (tqp)->p_prev = (Thread *)(tqp));
/**
* List initialization.
*/
#define list_init(tlp) ((tlp)->p_next = (Thread *)(tlp)) #define list_init(tlp) ((tlp)->p_next = (Thread *)(tlp))
#ifndef CH_OPTIMIZE_SPEED #ifndef CH_OPTIMIZE_SPEED

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@ -28,7 +28,7 @@
#ifdef CH_USE_MUTEXES #ifdef CH_USE_MUTEXES
/** /**
* Mutex structure. * @brief Mutex structure.
*/ */
typedef struct Mutex { typedef struct Mutex {
/** Queue of the threads sleeping on this Mutex.*/ /** Queue of the threads sleeping on this Mutex.*/

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@ -41,7 +41,8 @@ typedef void (*qnotify_t)(void);
#ifdef CH_USE_QUEUES #ifdef CH_USE_QUEUES
/** /**
* I/O queue structure, it is used by both Input and Output Queues, * @brief I/O queue structure.
* @details This structure is used by both Input and Output Queues,
* the difference is on how the semaphore is initialized. * the difference is on how the semaphore is initialized.
*/ */
typedef struct { typedef struct {
@ -116,7 +117,7 @@ extern "C" {
#ifdef CH_USE_QUEUES_HALFDUPLEX #ifdef CH_USE_QUEUES_HALFDUPLEX
/** /**
* Half duplex queue structure. * @brief Half duplex queue structure.
*/ */
typedef struct { typedef struct {
/** Pointer to the queue buffer. */ /** Pointer to the queue buffer. */

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@ -53,7 +53,8 @@
#define firstprio(rlp) ((rlp)->p_next->p_prio) #define firstprio(rlp) ((rlp)->p_next->p_prio)
/** /**
* Ready list header. * @brief Ready list header.
*
* @extends ThreadsQueue * @extends ThreadsQueue
*/ */
typedef struct { typedef struct {

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@ -28,7 +28,7 @@
#ifdef CH_USE_SEMAPHORES #ifdef CH_USE_SEMAPHORES
/** /**
* Semaphore structure. * @brief Semaphore structure.
*/ */
typedef struct Semaphore { typedef struct Semaphore {
/** Queue of the threads sleeping on this Semaphore.*/ /** Queue of the threads sleeping on this Semaphore.*/

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@ -46,7 +46,7 @@ typedef uint16_t dflags_t;
#ifdef CH_USE_SERIAL_FULLDUPLEX #ifdef CH_USE_SERIAL_FULLDUPLEX
/** /**
* Full Duplex Serial Driver main structure. * @brief Full Duplex Serial Driver main structure.
*/ */
typedef struct { typedef struct {
@ -111,7 +111,7 @@ extern "C" {
#ifdef CH_USE_SERIAL_HALFDUPLEX #ifdef CH_USE_SERIAL_HALFDUPLEX
/** /**
* Full Duplex Serial Driver main structure. * @brief Full Duplex Serial Driver main structure.
*/ */
typedef struct { typedef struct {

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@ -26,7 +26,8 @@
#define _THREADS_H_ #define _THREADS_H_
/** /**
* Structure representing a thread. * @brief Structure representing a thread.
*
* @extends ThreadsQueue * @extends ThreadsQueue
* @note Not all the listed fields are always needed, by switching off some * @note Not all the listed fields are always needed, by switching off some
* not needed ChibiOS/RT subsystems it is possible to save RAM space by * not needed ChibiOS/RT subsystems it is possible to save RAM space by

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@ -48,7 +48,7 @@ typedef void (*vtfunc_t)(void *);
typedef struct VirtualTimer VirtualTimer; typedef struct VirtualTimer VirtualTimer;
/** /**
* Virtual Timer descriptor structure. * @brief Virtual Timer descriptor structure.
* @extends DeltaList * @extends DeltaList
*/ */
struct VirtualTimer { struct VirtualTimer {
@ -66,7 +66,7 @@ struct VirtualTimer {
}; };
/** /**
* Delta List header. * @brief Virtual timers list header.
* @note The delta list is implemented as a double link bidirectional list in * @note The delta list is implemented as a double link bidirectional list in
* order to make the unlink time constant, the reset of a virtual timer * order to make the unlink time constant, the reset of a virtual timer
* is often used in the code. * is often used in the code.

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@ -281,12 +281,12 @@ namespace chibios_rt {
#ifdef CH_USE_SEMAPHORES #ifdef CH_USE_SEMAPHORES
/** /**
* @brief Class encapsulating a @p Semaphore. * @brief Class encapsulating a semaphore.
*/ */
class Semaphore { class Semaphore {
public: public:
/** /**
* @brief Embedded @p Semaphore structure. * @brief Embedded @p ::Semaphore structure.
*/ */
struct ::Semaphore sem; struct ::Semaphore sem;
@ -349,12 +349,12 @@ namespace chibios_rt {
#ifdef CH_USE_MUTEXES #ifdef CH_USE_MUTEXES
/** /**
* @brief Class encapsulating a @p Mutex. * @brief Class encapsulating a mutex.
*/ */
class Mutex { class Mutex {
public: public:
/** /**
* @brief Embedded @p Mutex structure. * @brief Embedded @p ::Mutex structure.
*/ */
struct ::Mutex mutex; struct ::Mutex mutex;
@ -398,12 +398,12 @@ namespace chibios_rt {
#ifdef CH_USE_CONDVARS #ifdef CH_USE_CONDVARS
/** /**
* @brief Class encapsulating a @p CondVar. * @brief Class encapsulating a conditional variable.
*/ */
class CondVar { class CondVar {
public: public:
/** /**
* @brief Embedded @p CondVar structure. * @brief Embedded @p ::CondVar structure.
*/ */
struct ::CondVar condvar; struct ::CondVar condvar;
@ -453,12 +453,12 @@ namespace chibios_rt {
#ifdef CH_USE_EVENTS #ifdef CH_USE_EVENTS
/** /**
* @brief Class encapsulating an @p EventSource. * @brief Class encapsulating an event source.
*/ */
class Event { class Event {
public: public:
/** /**
* @brief Embedded @p EventSource structure. * @brief Embedded @p ::EventSource structure.
*/ */
struct ::EventSource event; struct ::EventSource event;

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@ -26,7 +26,7 @@
#define _EVTIMER_H_ #define _EVTIMER_H_
/** /**
* Event timer structure. * @brief Event timer structure.
*/ */
typedef struct { typedef struct {
VirtualTimer et_vt; VirtualTimer et_vt;

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@ -38,24 +38,25 @@
typedef uint8_t stkalign_t; typedef uint8_t stkalign_t;
/** /**
* Interrupt saved context. * @brief Interrupt saved context.
* This structure represents the stack frame saved during a preemption-capable * @details This structure represents the stack frame saved during a
* interrupt handler. * preemption-capable interrupt handler.
*/ */
struct extctx { struct extctx {
}; };
/** /**
* System saved context. * @brief System saved context.
* This structure represents the inner stack frame during a context switching. * @details This structure represents the inner stack frame during a context
* switching.
*/ */
struct intctx { struct intctx {
}; };
/** /**
* Platform dependent part of the @p Thread structure. * @brief Platform dependent part of the @p Thread structure.
* This structure usually contains just the saved stack pointer defined as a * @details This structure usually contains just the saved stack pointer
* pointer to a @p intctx structure. * defined as a pointer to a @p intctx structure.
*/ */
struct context { struct context {
struct intctx *sp; struct intctx *sp;