SDC. Added F4x-specyfic DMA transaction end code.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4123 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -176,6 +176,22 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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return CH_FAILED;
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}
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#if (defined(STM32F4XX) || defined(STM32F2XX))
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/* Wait until DMA channel enabled to be sure that all data transferred.*/
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while (sdcp->dma->stream->CR & STM32_DMA_CR_EN)
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;
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/* DMA event flags must be manually cleared.*/
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dmaStreamClearInterrupt(sdcp->dma);
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SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
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SDIO->DCTRL = 0;
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chSysUnlock();
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/* Wait until interrupt flags to be cleared.*/
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/*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
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dmaStreamClearInterrupt(sdcp->dma);*/
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#else
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/* Waits for transfer completion at DMA level, the the stream is
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disabled and cleared.*/
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dmaWaitCompletion(sdcp->dma);
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@ -183,10 +199,7 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
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SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
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SDIO->DCTRL = 0;
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chSysUnlock();
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/* Wait until interrupt flags to be cleared.*/
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/* while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
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dmaStreamClearInterrupt(sdcp->dma);*/
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#endif
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/* Finalize transaction.*/
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if (n > 1)
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