From bcdb92f134f82921cbfe12774cc83e83ddee8eef Mon Sep 17 00:00:00 2001 From: gdisirio Date: Sat, 19 Nov 2011 08:48:19 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3508 35acf78f-673a-0410-8e92-d51de3d6d3f4 --- os/hal/platforms/STM32F1xx/stm32_dma.h | 2 +- os/hal/platforms/STM32F4xx/adc_lld.c | 12 +++++++++--- os/hal/platforms/STM32F4xx/stm32_dma.h | 2 +- os/hal/platforms/STM32L1xx/stm32_dma.h | 2 +- 4 files changed, 12 insertions(+), 6 deletions(-) diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.h b/os/hal/platforms/STM32F1xx/stm32_dma.h index fdfd0bc7b..7e230d851 100644 --- a/os/hal/platforms/STM32F1xx/stm32_dma.h +++ b/os/hal/platforms/STM32F1xx/stm32_dma.h @@ -347,7 +347,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); #define dmaStartMemCopy(dmastp, mode, src, dst, n) { \ dmaStreamSetPeripheral(dmastp, src); \ dmaStreamSetMemory0(dmastp, dst); \ - dmaStreamGetTransactionSize(dmastp, n); \ + dmaStreamSetTransactionSize(dmastp, n); \ dmaStreamSetMode(dmastp, (mode) | \ STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \ STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \ diff --git a/os/hal/platforms/STM32F4xx/adc_lld.c b/os/hal/platforms/STM32F4xx/adc_lld.c index 69cef5d57..603b32135 100644 --- a/os/hal/platforms/STM32F4xx/adc_lld.c +++ b/os/hal/platforms/STM32F4xx/adc_lld.c @@ -116,7 +116,9 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) { #if STM32_ADC_USE_ADC1 sr = ADC1->SR; ADC1->SR = 0; - if (sr & ADC_SR_OVR) { + /* Note, an overflow may occur after the conversion ended before the driver + is able to stop the ADC, this is why the DMA channel is checked too.*/ + if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD1.dmastp) > 0)) { /* ADC overflow condition, this could happen only if the DMA is unable to read data fast enough.*/ _adc_isr_error_code(&ADCD1, ADC_ERR_OVERFLOW); @@ -127,7 +129,9 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) { #if STM32_ADC_USE_ADC2 sr = ADC2->SR; ADC2->SR = 0; - if (sr & ADC_SR_OVR) { + /* Note, an overflow may occur after the conversion ended before the driver + is able to stop the ADC, this is why the DMA channel is checked too.*/ + if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD2.dmastp) > 0)) { /* ADC overflow condition, this could happen only if the DMA is unable to read data fast enough.*/ _adc_isr_error_code(&ADCD2, ADC_ERR_OVERFLOW); @@ -138,7 +142,9 @@ CH_IRQ_HANDLER(ADC1_2_3_IRQHandler) { #if STM32_ADC_USE_ADC3 sr = ADC3->SR; ADC3->SR = 0; - if (sr & ADC_SR_OVR) { + /* Note, an overflow may occur after the conversion ended before the driver + is able to stop the ADC, this is why the DMA channel is checked too.*/ + if ((sr & ADC_SR_OVR) && (dmaStreamGetTransactionSize(ADCD3.dmastp) > 0)) { /* ADC overflow condition, this could happen only if the DMA is unable to read data fast enough.*/ _adc_isr_error_code(&ADCD3, ADC_ERR_OVERFLOW); diff --git a/os/hal/platforms/STM32F4xx/stm32_dma.h b/os/hal/platforms/STM32F4xx/stm32_dma.h index 4b3302f39..fe15dbd22 100644 --- a/os/hal/platforms/STM32F4xx/stm32_dma.h +++ b/os/hal/platforms/STM32F4xx/stm32_dma.h @@ -400,7 +400,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); #define dmaStartMemCopy(dmastp, mode, src, dst, n) { \ dmaStreamSetPeripheral(dmastp, src); \ dmaStreamSetMemory0(dmastp, dst); \ - dmaStreamGetTransactionSize(dmastp, n); \ + dmaStreamSetTransactionSize(dmastp, n); \ dmaStreamSetMode(dmastp, (mode) | \ STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \ STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \ diff --git a/os/hal/platforms/STM32L1xx/stm32_dma.h b/os/hal/platforms/STM32L1xx/stm32_dma.h index 0d80a39e7..6afadfcc1 100644 --- a/os/hal/platforms/STM32L1xx/stm32_dma.h +++ b/os/hal/platforms/STM32L1xx/stm32_dma.h @@ -338,7 +338,7 @@ typedef void (*stm32_dmaisr_t)(void *p, uint32_t flags); #define dmaStartMemCopy(dmastp, mode, src, dst, n) { \ dmaStreamSetPeripheral(dmastp, src); \ dmaStreamSetMemory0(dmastp, dst); \ - dmaStreamGetTransactionSize(dmastp, n); \ + dmaStreamSetTransactionSize(dmastp, n); \ dmaStreamSetMode(dmastp, (mode) | \ STM32_DMA_CR_MINC | STM32_DMA_CR_PINC | \ STM32_DMA_CR_DIR_M2M | STM32_DMA_CR_EN); \