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ChibiOS
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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@4869 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2012-12-04 13:03:14 +00:00
parent 1c60f17682
commit bd809f5f65
4 changed files with 29 additions and 8 deletions
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4
boards/ST_STM32F3_DISCOVERY/board.h
View File

@ -653,7 +653,7 @@
* PE0 - L3GD20_INT1 (input pullup). * PE0 - L3GD20_INT1 (input pullup).
* PE1 - L3GD20_INT2 (input pullup). * PE1 - L3GD20_INT2 (input pullup).
* PE2 - LSM303_DRDY (input pullup). * PE2 - LSM303_DRDY (input pullup).
* PE3 - SPI1_CS (output pushpull minimum). * PE3 - SPI1_CS (output pushpull maximum).
* PE4 - LSM303_INT1 (input pullup). * PE4 - LSM303_INT1 (input pullup).
* PE5 - LSM303_INT2 (input pullup). * PE5 - LSM303_INT2 (input pullup).
* PE6 - PIN6 (input pullup). * PE6 - PIN6 (input pullup).
@ -702,7 +702,7 @@
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_2M(GPIOE_L3GD20_INT1) | \ #define VAL_GPIOE_OSPEEDR (PIN_OSPEED_2M(GPIOE_L3GD20_INT1) | \
PIN_OSPEED_2M(GPIOE_L3GD20_INT2) | \ PIN_OSPEED_2M(GPIOE_L3GD20_INT2) | \
PIN_OSPEED_2M(GPIOE_LSM303_DRDY) | \ PIN_OSPEED_2M(GPIOE_LSM303_DRDY) | \
PIN_OSPEED_2M(GPIOE_SPI1_CS) | \ PIN_OSPEED_100M(GPIOE_SPI1_CS) | \
PIN_OSPEED_2M(GPIOE_LSM303_INT1) | \ PIN_OSPEED_2M(GPIOE_LSM303_INT1) | \
PIN_OSPEED_2M(GPIOE_LSM303_INT2) | \ PIN_OSPEED_2M(GPIOE_LSM303_INT2) | \
PIN_OSPEED_2M(GPIOE_PIN6) | \ PIN_OSPEED_2M(GPIOE_PIN6) | \

2
boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg
View File

@ -561,7 +561,7 @@
<pin3 <pin3
ID="SPI1_CS" ID="SPI1_CS"
Type="PushPull" Type="PushPull"
Speed="Minimum" Speed="Maximum"
Resistor="Floating" Resistor="Floating"
Level="High" Level="High"
Mode="Output" Mode="Output"

29
demos/ARMCM4-STM32F303-DISCOVERY/main.c
View File

@ -32,11 +32,30 @@ static msg_t Thread1(void *arg) {
(void)arg; (void)arg;
chRegSetThreadName("blinker"); chRegSetThreadName("blinker");
while (TRUE) { while (TRUE) {
/* TODO */ palSetPad(GPIOE, GPIOE_LED3_RED);
// palSetPad(GPIOD, GPIOD_LED3); /* Orange. */ chThdSleepMilliseconds(100);
chThdSleepMilliseconds(500); palClearPad(GPIOE, GPIOE_LED3_RED);
// palClearPad(GPIOD, GPIOD_LED3); /* Orange. */ palSetPad(GPIOE, GPIOE_LED5_ORANGE);
chThdSleepMilliseconds(500); chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED5_ORANGE);
palSetPad(GPIOE, GPIOE_LED7_GREEN);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED7_GREEN);
palSetPad(GPIOE, GPIOE_LED9_BLUE);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED9_BLUE);
palSetPad(GPIOE, GPIOE_LED10_RED);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED10_RED);
palSetPad(GPIOE, GPIOE_LED8_ORANGE);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED8_ORANGE);
palSetPad(GPIOE, GPIOE_LED6_GREEN);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED6_GREEN);
palSetPad(GPIOE, GPIOE_LED4_BLUE);
chThdSleepMilliseconds(100);
palClearPad(GPIOE, GPIOE_LED4_BLUE);
} }
} }

2
os/hal/platforms/STM32/GPIOv2/pal_lld.c
View File

@ -111,6 +111,8 @@ void _pal_lld_init(const PALConfig *config) {
RCC->AHBLPENR |= AHB_LPEN_MASK; RCC->AHBLPENR |= AHB_LPEN_MASK;
#elif defined(STM32F0XX) #elif defined(STM32F0XX)
rccEnableAHB(AHB_EN_MASK, TRUE); rccEnableAHB(AHB_EN_MASK, TRUE);
#elif defined(STM32F30X)
rccEnableAHB(AHB_EN_MASK, TRUE);
#elif defined(STM32F2XX) || defined(STM32F4XX) #elif defined(STM32F2XX) || defined(STM32F4XX)
RCC->AHB1ENR |= AHB1_EN_MASK; RCC->AHB1ENR |= AHB1_EN_MASK;
RCC->AHB1LPENR |= AHB1_LPEN_MASK; RCC->AHB1LPENR |= AHB1_LPEN_MASK;