diff --git a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
index 66fc12e8d..cebb1df45 100644
--- a/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
+++ b/os/hal/ports/STM32/LLD/ADCv4/hal_adc_lld.c
@@ -572,12 +572,12 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
       cfgr = grpp->cfgr | ADC_CFGR_DMNGT_CIRCULAR;
       if (adcp->depth > 1) {
         /* If circular buffer depth > 1, then the half transfer interrupt
-          is enabled in order to allow streaming processing.*/
+           is enabled in order to allow streaming processing.*/
         dmamode |= STM32_DMA_CR_HTIE;
       }
-      else {
-        cfgr = grpp->cfgr | ADC_CFGR_DMNGT_ONESHOT;
-      }
+    }
+    else {
+      cfgr = grpp->cfgr | ADC_CFGR_DMNGT_ONESHOT;
     }
 
     /* DMA setup.*/
@@ -603,12 +603,12 @@ void adc_lld_start_conversion(ADCDriver *adcp) {
       cfgr = grpp->cfgr | ADC_CFGR_DMNGT_CIRCULAR;
       if (adcp->depth > 1) {
         /* If circular buffer depth > 1, then the half transfer interrupt
-          is enabled in order to allow streaming processing.*/
+           is enabled in order to allow streaming processing.*/
         dmamode |= STM32_BDMA_CR_HTIE;
       }
-      else {
-        cfgr = grpp->cfgr | ADC_CFGR_DMNGT_ONESHOT;
-      }
+    }
+    else {
+      cfgr = grpp->cfgr | ADC_CFGR_DMNGT_ONESHOT;
     }
 
     /* DMA setup.*/