git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2356 35acf78f-673a-0410-8e92-d51de3d6d3f4
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@ -28,7 +28,7 @@
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* Board identifiers.
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*/
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#define BOARD_ST_STM8L_DISCOVERY
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#define BOARD_NAME "ST STM8L-Discovery"
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#define BOARD_NAME "ST STM8L-Discovery"
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/*
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* Board frequencies and bypass modes.
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@ -101,7 +101,7 @@
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*/
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#define VAL_GPIOAODR 0
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#define VAL_GPIOADDR 0 /* All inputs. */
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#define VAL_GPIOACR1 0xFF /* All pull-up. */
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#define VAL_GPIOACR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOACR2 0
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/*
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@ -109,15 +109,15 @@
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*/
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#define VAL_GPIOBODR 0
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#define VAL_GPIOBDDR 0 /* All inputs. */
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#define VAL_GPIOBCR1 0xFF /* All pull-up. */
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#define VAL_GPIOBCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOBCR2 0
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/*
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* Port C initial setup.
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*/
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#define VAL_GPIOCODR (1 < PC_LED4)
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#define VAL_GPIOCODR 0
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#define VAL_GPIOCDDR (1 < PC_LED4)
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#define VAL_GPIOCCR1 0xFF /* All pull-up/open drain. */
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#define VAL_GPIOCCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOCCR2 0
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/*
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@ -125,15 +125,15 @@
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*/
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#define VAL_GPIODODR 0
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#define VAL_GPIODDDR 0 /* All inputs. */
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#define VAL_GPIODCR1 0xFF /* All pull-up. */
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#define VAL_GPIODCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIODCR2 0
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/*
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* Port E initial setup.
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*/
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#define VAL_GPIOEODR (1 < PE_LED3)
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#define VAL_GPIOEODR 0
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#define VAL_GPIOEDDR (1 < PE_LED3)
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#define VAL_GPIOECR1 0xFF /* All pull-up/open drain. */
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#define VAL_GPIOECR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOECR2 0
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/*
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@ -141,17 +141,9 @@
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*/
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#define VAL_GPIOFODR 0
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#define VAL_GPIOFDDR 0 /* All inputs. */
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#define VAL_GPIOFCR1 0xFF /* All pull-up. */
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#define VAL_GPIOFCR1 0xFF /* All pull-up/push-pull. */
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#define VAL_GPIOFCR2 0
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/*
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* Port G initial setup (not present but still initialized).
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*/
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#define VAL_GPIOGODR 0
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#define VAL_GPIOGDDR 0 /* All inputs. */
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#define VAL_GPIOGCR1 0xFF /* All pull-up. */
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#define VAL_GPIOGCR2 0
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#ifdef __cplusplus
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extern "C" {
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#endif
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@ -90,7 +90,7 @@
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* @brief Enables the SERIAL subsystem.
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*/
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#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
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#define HAL_USE_SERIAL TRUE
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#define HAL_USE_SERIAL FALSE
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#endif
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/**
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@ -51,6 +51,10 @@ void main(void) {
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*/
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hwinit();
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palClearPad(GPIOC, PC_LED4);
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palSetPad(GPIOE, PE_LED3);
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while(1);
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/*
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* OS initialization.
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*/
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@ -28,7 +28,7 @@
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/*
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* HAL general settings.
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*/
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#define STM8L_CLOCK_INIT TRUE
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#define STM8L_NO_CLOCK_INIT TRUE
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#define STM8L_HSI_ENABLED TRUE
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#define STM8L_LSI_ENABLED TRUE
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#define STM8L_HSE_ENABLED FALSE
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@ -49,10 +49,14 @@ ROMCONST PALConfig pal_default_config =
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{VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
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{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
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{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
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#if STM8L_HAS_GPIOG
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{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
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#if defined(STM8L15X_MDP) || defined(STM8L15X_HD)
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#if STM8L_HAS_GPIOI
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{VAL_GPIOHODR, 0, VAL_GPIOHDDR, VAL_GPIOHCR1, VAL_GPIOHCR2},
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#if STM8L_HAS_GPIOH
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{VAL_GPIOIODR, 0, VAL_GPIOIDDR, VAL_GPIOICR1, VAL_GPIOICR2},
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#endif
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#endif
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#endif
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}
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};
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*/
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void hal_lld_init(void) {
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#if STM8L_CLOCK_INIT
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#if !STM8L_NO_CLOCK_INIT
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/* Makes sure that HSI is stable before proceeding.*/
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CLK->ICKCR |= CLK_ICKCR_HSION;
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while ((CLK->ICKCR & CLK_ICKCR_HSIRDY) == 0)
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#if !STM8L_HSI_ENABLED
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CLK->ICKCR &= ~CLK_ICKCR_HSION;
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#endif
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#endif /* STM8L_CLOCK_INIT */
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#endif /* !STM8L_NO_CLOCK_INIT */
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}
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/** @} */
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@ -102,10 +102,10 @@
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/*===========================================================================*/
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/**
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* @brief Enables the clock initialization in the HAL.
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* @brief Disables the clock initialization in the HAL.
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*/
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#if !defined(STM8L_NO_CLOCK_INIT) || defined(__DOXYGEN__)
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#define STM8L_CLOCK_INIT TRUE
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#define STM8L_NO_CLOCK_INIT FALSE
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#endif
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/**
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@ -55,7 +55,7 @@
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#define STM8L_HAS_GPIOD TRUE
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#define STM8L_HAS_GPIOE TRUE
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#define STM8L_HAS_GPIOF TRUE
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#define STM8L_HAS_GPIOG TRUE
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#define STM8L_HAS_GPIOG FALSE
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#define STM8L_HAS_GPIOH FALSE
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#define STM8L_HAS_GPIOI FALSE
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* or whole ports can be reprogrammed at later time.
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*/
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typedef struct {
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#if defined(STM8L15X_MD) || defined(__DOXYGEN__)
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GPIO_TypeDef P[7];
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#elif defined(STM8L15X_MDP) || defined(STM8L15X_HD)
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#if STM8L_HAS_GPIOI || defined(__DOXYGEN__)
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GPIO_TypeDef P[9];
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#elif STM8L_HAS_GPIOH || defined(__DOXYGEN__)
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GPIO_TypeDef P[8];
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#elif STM8L_HAS_GPIOG || defined(__DOXYGEN__)
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GPIO_TypeDef P[7];
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#else
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GPIO_TypeDef P[6];
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#endif
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} PALConfig;
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