From be70523cc528b1c5ea04455276642ddbb4c0b47e Mon Sep 17 00:00:00 2001 From: Giovanni Di Sirio Date: Fri, 4 Jun 2021 14:10:54 +0000 Subject: [PATCH] git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@14467 27425a3e-05d8-49a3-a47f-9c15f0e5edd8 --- os/common/ports/ARM/chcore.h | 11 ++- os/common/ports/ARM/compilers/GCC/chcoreasm.S | 2 +- os/common/ports/ARM/compilers/GCC/chtypes.h | 85 +++++++++---------- os/common/ports/ARMv6-M-RP2/chcore.c | 4 +- os/common/ports/ARMv6-M-RP2/chcore.h | 17 ++-- os/common/ports/ARMv6-M-RP2/chcore_timer.h | 2 +- .../ARMv6-M-RP2/compilers/GCC/chcoreasm.S | 6 +- .../ports/ARMv6-M-RP2/compilers/GCC/chtypes.h | 81 ++++++++++-------- os/common/ports/ARMv6-M/chcore.h | 13 ++- .../ports/ARMv6-M/compilers/GCC/chtypes.h | 81 ++++++++++-------- os/common/ports/ARMv7-M/chcore_timer.h | 4 +- .../ports/ARMv7-M/compilers/GCC/chtypes.h | 4 +- os/common/ports/ARMv7-M/mpu.h | 6 +- os/common/ports/ARMv8-M-ML/chcore_timer.h | 2 +- .../ports/ARMv8-M-ML/compilers/GCC/chtypes.h | 83 ++++++++++-------- 15 files changed, 206 insertions(+), 195 deletions(-) diff --git a/os/common/ports/ARM/chcore.h b/os/common/ports/ARM/chcore.h index 1197071b8..c749dbcef 100644 --- a/os/common/ports/ARM/chcore.h +++ b/os/common/ports/ARM/chcore.h @@ -213,12 +213,6 @@ asm module.*/ #if !defined(_FROM_ASM_) -/** - * @brief Type of stack and memory alignment enforcement. - * @note In this architecture the stack alignment is enforced to 64 bits. - */ -typedef uint64_t stkalign_t; - /** * @brief Generic ARM register. */ @@ -283,6 +277,11 @@ struct port_context { */ #define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) false +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + /** * @brief Platform dependent part of the @p chThdCreateI() API. * @details This code usually setup the context switching frame represented diff --git a/os/common/ports/ARM/compilers/GCC/chcoreasm.S b/os/common/ports/ARM/compilers/GCC/chcoreasm.S index c5feeaf8f..d46461240 100644 --- a/os/common/ports/ARM/compilers/GCC/chcoreasm.S +++ b/os/common/ports/ARM/compilers/GCC/chcoreasm.S @@ -21,7 +21,7 @@ * @file ARM/compilers/GCC/chcoreasm.S * @brief ARM architecture port low level code. * - * @addtogroup ARM_CORE + * @addtogroup ARM_GCC_CORE * @{ */ diff --git a/os/common/ports/ARM/compilers/GCC/chtypes.h b/os/common/ports/ARM/compilers/GCC/chtypes.h index d6af7ac5d..c5d374f03 100644 --- a/os/common/ports/ARM/compilers/GCC/chtypes.h +++ b/os/common/ports/ARM/compilers/GCC/chtypes.h @@ -32,83 +32,74 @@ #include #include -/** - * @name Common constants - */ -/** - * @brief Generic 'false' boolean constant. - */ -#if !defined(FALSE) || defined(__DOXYGEN__) -#define FALSE 0 -#endif +#include "ccportab.h" /** - * @brief Generic 'true' boolean constant. + * @name Architecture data constraints */ -#if !defined(TRUE) || defined(__DOXYGEN__) -#define TRUE 1 -#endif +#define PORT_ARCH_SIZEOF_DATA_PTR 4 +#define PORT_ARCH_SIZEOF_CODE_PTR 4 +#define PORT_ARCH_REGISTERS_WIDTH 32 +#define PORT_ARCH_REVERSE_ORDER 1 /** @} */ /** - * @name Kernel types + * @name Port types * @{ */ -typedef uint32_t rtcnt_t; /**< Realtime counter. */ -typedef uint64_t rttime_t; /**< Realtime accumulator. */ -typedef uint32_t syssts_t; /**< System status word. */ -typedef uint8_t tmode_t; /**< Thread flags. */ -typedef uint8_t tstate_t; /**< Thread state. */ -typedef uint8_t trefs_t; /**< Thread references counter. */ -typedef uint8_t tslices_t; /**< Thread time slices counter.*/ -typedef uint32_t tprio_t; /**< Thread priority. */ -typedef int32_t msg_t; /**< Inter-thread message. */ -typedef int32_t eventid_t; /**< Numeric event identifier. */ -typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ -typedef uint32_t eventflags_t; /**< Mask of event flags. */ -typedef int32_t cnt_t; /**< Generic signed counter. */ -typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** + * @brief Realtime counter. + */ +typedef uint32_t port_rtcnt_t; + +/** + * @brief Realtime accumulator. + */ +typedef uint64_t port_rttime_t; + +/** + * @brief System status word. + */ +typedef uint32_t port_syssts_t; + +/** + * @brief Type of stack and memory alignment enforcement. + * @note In this architecture the stack alignment is enforced to 64 bits, + * 32 bits alignment is supported by hardware but deprecated by ARM, + * the implementation choice is to not offer the option. + */ +typedef uint64_t port_stkalign_t; /** @} */ +/** + * @brief This port does not define OS-related types. + */ +#define PORT_DOES_NOT_PROVIDE_TYPES + /** * @brief ROM constant modifier. * @note It is set to use the "const" keyword in this port. */ -#define ROMCONST const +#define ROMCONST CC_ROMCONST /** * @brief Makes functions not inlineable. * @note If the compiler does not support such attribute then some * time-dependent services could be degraded. */ -#define NOINLINE __attribute__((noinline)) - -/** - * @brief Optimized thread function declaration macro. - */ -#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) - -/** - * @brief Packed variable specifier. - */ -#define PACKED_VAR __attribute__((packed)) +#define NOINLINE CC_NO_INLINE /** * @brief Memory alignment enforcement for variables. */ -#define ALIGNED_VAR(n) __attribute__((aligned(n))) +#define ALIGNED_VAR(n) CC_ALIGN_DATA(n) /** * @brief Size of a pointer. * @note To be used where the sizeof operator cannot be used, preprocessor * expressions for example. */ -#define SIZEOF_PTR 4 - -/** - * @brief True if alignment is low-high in current architecture. - */ -#define REVERSE_ORDER 1 +#define SIZEOF_PTR PORT_ARCH_SIZEOF_DATA_PTR #endif /* CHTYPES_H */ diff --git a/os/common/ports/ARMv6-M-RP2/chcore.c b/os/common/ports/ARMv6-M-RP2/chcore.c index a3d652437..35c4d9731 100644 --- a/os/common/ports/ARMv6-M-RP2/chcore.c +++ b/os/common/ports/ARMv6-M-RP2/chcore.c @@ -18,8 +18,8 @@ */ /** - * @file ARMv6-M/chcore.c - * @brief ARMv6-M port code. + * @file ARMv6-M-RP2/chcore.c + * @brief ARMv6-M-RP2 port code. * * @addtogroup ARMv6_M_RP2_CORE * @{ diff --git a/os/common/ports/ARMv6-M-RP2/chcore.h b/os/common/ports/ARMv6-M-RP2/chcore.h index 0d0a36ab7..22d363eec 100644 --- a/os/common/ports/ARMv6-M-RP2/chcore.h +++ b/os/common/ports/ARMv6-M-RP2/chcore.h @@ -18,8 +18,8 @@ */ /** - * @file ARMv6-M/chcore.h - * @brief ARMv6-M port macros and structures. + * @file ARMv6-M-RP2/chcore.h + * @brief ARMv6-M-RP2 port macros and structures. * * @addtogroup ARMv6_M_RP2_CORE * @{ @@ -295,14 +295,6 @@ asm module.*/ #if !defined(_FROM_ASM_) -/** - * @brief Type of stack and memory alignment enforcement. - * @note In this architecture the stack alignment is enforced to 64 bits, - * 32 bits alignment is supported by hardware but deprecated by ARM, - * the implementation choice is to not offer the option. - */ -typedef uint64_t stkalign_t; - /** * @brief Interrupt saved context. * @details This structure represents the stack frame saved during a @@ -363,6 +355,11 @@ struct port_context { #define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \ (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS)) +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + /** * @brief Platform dependent part of the @p chThdCreateI() API. * @details This code usually setup the context switching frame represented diff --git a/os/common/ports/ARMv6-M-RP2/chcore_timer.h b/os/common/ports/ARMv6-M-RP2/chcore_timer.h index 2693330e3..4d3712e14 100644 --- a/os/common/ports/ARMv6-M-RP2/chcore_timer.h +++ b/os/common/ports/ARMv6-M-RP2/chcore_timer.h @@ -18,7 +18,7 @@ */ /** - * @file chcore_timer.h + * @file ARMv6-M-RP2/chcore_timer.h * @brief System timer header file. * * @addtogroup ARMv6_M_RP2_TIMER diff --git a/os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S b/os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S index 2cfce94ab..c655f458f 100644 --- a/os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S +++ b/os/common/ports/ARMv6-M-RP2/compilers/GCC/chcoreasm.S @@ -18,10 +18,10 @@ */ /** - * @file ARMv6-M/compilers/GCC/chcoreasm.S - * @brief ARMv6-M port low level code. + * @file ARMv6-M-RP2/compilers/GCC/chcoreasm.S + * @brief ARMv6-M-RP2 port low level code. * - * @addtogroup ARMv6_M_GCC_CORE + * @addtogroup ARMv6_M_RP2_GCC_CORE * @{ */ diff --git a/os/common/ports/ARMv6-M-RP2/compilers/GCC/chtypes.h b/os/common/ports/ARMv6-M-RP2/compilers/GCC/chtypes.h index 6b336f1d9..730cb38f1 100644 --- a/os/common/ports/ARMv6-M-RP2/compilers/GCC/chtypes.h +++ b/os/common/ports/ARMv6-M-RP2/compilers/GCC/chtypes.h @@ -18,8 +18,8 @@ */ /** - * @file ARMCMx/compilers/GCC/chtypes.h - * @brief ARM Cortex-Mx port system types. + * @file ARMv6-M-RP2/compilers/GCC/chtypes.h + * @brief ARMv6-M port system types. * * @addtogroup ARMv6_M_RP2_GCC_CORE * @{ @@ -32,65 +32,74 @@ #include #include +#include "ccportab.h" + /** - * @name Kernel types + * @name Architecture data constraints + */ +#define PORT_ARCH_SIZEOF_DATA_PTR 4 +#define PORT_ARCH_SIZEOF_CODE_PTR 4 +#define PORT_ARCH_REGISTERS_WIDTH 32 +#define PORT_ARCH_REVERSE_ORDER 1 +/** @} */ + +/** + * @name Port types * @{ */ -typedef uint32_t rtcnt_t; /**< Realtime counter. */ -typedef uint64_t rttime_t; /**< Realtime accumulator. */ -typedef uint32_t syssts_t; /**< System status word. */ -typedef uint8_t tmode_t; /**< Thread flags. */ -typedef uint8_t tstate_t; /**< Thread state. */ -typedef uint8_t trefs_t; /**< Thread references counter. */ -typedef uint8_t tslices_t; /**< Thread time slices counter.*/ -typedef uint32_t tprio_t; /**< Thread priority. */ -typedef int32_t msg_t; /**< Inter-thread message. */ -typedef int32_t eventid_t; /**< Numeric event identifier. */ -typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ -typedef uint32_t eventflags_t; /**< Mask of event flags. */ -typedef int32_t cnt_t; /**< Generic signed counter. */ -typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** + * @brief Realtime counter. + */ +typedef uint32_t port_rtcnt_t; + +/** + * @brief Realtime accumulator. + */ +typedef uint64_t port_rttime_t; + +/** + * @brief System status word. + */ +typedef uint32_t port_syssts_t; + +/** + * @brief Type of stack and memory alignment enforcement. + * @note In this architecture the stack alignment is enforced to 64 bits, + * 32 bits alignment is supported by hardware but deprecated by ARM, + * the implementation choice is to not offer the option. + */ +typedef uint64_t port_stkalign_t; /** @} */ +/** + * @brief This port does not define OS-related types. + */ +#define PORT_DOES_NOT_PROVIDE_TYPES + /** * @brief ROM constant modifier. * @note It is set to use the "const" keyword in this port. */ -#define ROMCONST const +#define ROMCONST CC_ROMCONST /** * @brief Makes functions not inlineable. * @note If the compiler does not support such attribute then some * time-dependent services could be degraded. */ -#define NOINLINE __attribute__((noinline)) - -/** - * @brief Optimized thread function declaration macro. - */ -#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) - -/** - * @brief Packed variable specifier. - */ -#define PACKED_VAR __attribute__((packed)) +#define NOINLINE CC_NO_INLINE /** * @brief Memory alignment enforcement for variables. */ -#define ALIGNED_VAR(n) __attribute__((aligned(n))) +#define ALIGNED_VAR(n) CC_ALIGN_DATA(n) /** * @brief Size of a pointer. * @note To be used where the sizeof operator cannot be used, preprocessor * expressions for example. */ -#define SIZEOF_PTR 4 - -/** - * @brief True if alignment is low-high in current architecture. - */ -#define REVERSE_ORDER 1 +#define SIZEOF_PTR PORT_ARCH_SIZEOF_DATA_PTR #endif /* CHTYPES_H */ diff --git a/os/common/ports/ARMv6-M/chcore.h b/os/common/ports/ARMv6-M/chcore.h index aad1ba747..bbb56fac1 100644 --- a/os/common/ports/ARMv6-M/chcore.h +++ b/os/common/ports/ARMv6-M/chcore.h @@ -268,14 +268,6 @@ asm module.*/ #if !defined(_FROM_ASM_) -/** - * @brief Type of stack and memory alignment enforcement. - * @note In this architecture the stack alignment is enforced to 64 bits, - * 32 bits alignment is supported by hardware but deprecated by ARM, - * the implementation choice is to not offer the option. - */ -typedef uint64_t stkalign_t; - /** * @brief Interrupt saved context. * @details This structure represents the stack frame saved during a @@ -336,6 +328,11 @@ struct port_context { #define PORT_IRQ_IS_VALID_KERNEL_PRIORITY(n) \ (((n) >= CORTEX_MAX_KERNEL_PRIORITY) && ((n) < CORTEX_PRIORITY_LEVELS)) +/** + * @brief Optimized thread function declaration macro. + */ +#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) + /** * @brief Platform dependent part of the @p chThdCreateI() API. * @details This code usually setup the context switching frame represented diff --git a/os/common/ports/ARMv6-M/compilers/GCC/chtypes.h b/os/common/ports/ARMv6-M/compilers/GCC/chtypes.h index db1f418f8..78151969e 100644 --- a/os/common/ports/ARMv6-M/compilers/GCC/chtypes.h +++ b/os/common/ports/ARMv6-M/compilers/GCC/chtypes.h @@ -18,8 +18,8 @@ */ /** - * @file ARMCMx/compilers/GCC/chtypes.h - * @brief ARM Cortex-Mx port system types. + * @file ARMv6-M/compilers/GCC/chtypes.h + * @brief ARMv6-M port system types. * * @addtogroup ARMv6_M_GCC_CORE * @{ @@ -32,65 +32,74 @@ #include #include +#include "ccportab.h" + /** - * @name Kernel types + * @name Architecture data constraints + */ +#define PORT_ARCH_SIZEOF_DATA_PTR 4 +#define PORT_ARCH_SIZEOF_CODE_PTR 4 +#define PORT_ARCH_REGISTERS_WIDTH 32 +#define PORT_ARCH_REVERSE_ORDER 1 +/** @} */ + +/** + * @name Port types * @{ */ -typedef uint32_t rtcnt_t; /**< Realtime counter. */ -typedef uint64_t rttime_t; /**< Realtime accumulator. */ -typedef uint32_t syssts_t; /**< System status word. */ -typedef uint8_t tmode_t; /**< Thread flags. */ -typedef uint8_t tstate_t; /**< Thread state. */ -typedef uint8_t trefs_t; /**< Thread references counter. */ -typedef uint8_t tslices_t; /**< Thread time slices counter.*/ -typedef uint32_t tprio_t; /**< Thread priority. */ -typedef int32_t msg_t; /**< Inter-thread message. */ -typedef int32_t eventid_t; /**< Numeric event identifier. */ -typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ -typedef uint32_t eventflags_t; /**< Mask of event flags. */ -typedef int32_t cnt_t; /**< Generic signed counter. */ -typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** + * @brief Realtime counter. + */ +typedef uint32_t port_rtcnt_t; + +/** + * @brief Realtime accumulator. + */ +typedef uint64_t port_rttime_t; + +/** + * @brief System status word. + */ +typedef uint32_t port_syssts_t; + +/** + * @brief Type of stack and memory alignment enforcement. + * @note In this architecture the stack alignment is enforced to 64 bits, + * 32 bits alignment is supported by hardware but deprecated by ARM, + * the implementation choice is to not offer the option. + */ +typedef uint64_t port_stkalign_t; /** @} */ +/** + * @brief This port does not define OS-related types. + */ +#define PORT_DOES_NOT_PROVIDE_TYPES + /** * @brief ROM constant modifier. * @note It is set to use the "const" keyword in this port. */ -#define ROMCONST const +#define ROMCONST CC_ROMCONST /** * @brief Makes functions not inlineable. * @note If the compiler does not support such attribute then some * time-dependent services could be degraded. */ -#define NOINLINE __attribute__((noinline)) - -/** - * @brief Optimized thread function declaration macro. - */ -#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) - -/** - * @brief Packed variable specifier. - */ -#define PACKED_VAR __attribute__((packed)) +#define NOINLINE CC_NO_INLINE /** * @brief Memory alignment enforcement for variables. */ -#define ALIGNED_VAR(n) __attribute__((aligned(n))) +#define ALIGNED_VAR(n) CC_ALIGN_DATA(n) /** * @brief Size of a pointer. * @note To be used where the sizeof operator cannot be used, preprocessor * expressions for example. */ -#define SIZEOF_PTR 4 - -/** - * @brief True if alignment is low-high in current architecture. - */ -#define REVERSE_ORDER 1 +#define SIZEOF_PTR PORT_ARCH_SIZEOF_DATA_PTR #endif /* CHTYPES_H */ diff --git a/os/common/ports/ARMv7-M/chcore_timer.h b/os/common/ports/ARMv7-M/chcore_timer.h index 98e6592c6..76e8d1cca 100644 --- a/os/common/ports/ARMv7-M/chcore_timer.h +++ b/os/common/ports/ARMv7-M/chcore_timer.h @@ -18,10 +18,10 @@ */ /** - * @file chcore_timer.h + * @file ARMv7-M/chcore_timer.h * @brief System timer header file. * - * @addtogroup ARMCMx_TIMER + * @addtogroup ARMv7_M_TIMER * @{ */ diff --git a/os/common/ports/ARMv7-M/compilers/GCC/chtypes.h b/os/common/ports/ARMv7-M/compilers/GCC/chtypes.h index 47ec1210d..f2e3605cf 100644 --- a/os/common/ports/ARMv7-M/compilers/GCC/chtypes.h +++ b/os/common/ports/ARMv7-M/compilers/GCC/chtypes.h @@ -18,8 +18,8 @@ */ /** - * @file ARMCMx/compilers/GCC/chtypes.h - * @brief ARM Cortex-Mx port system types. + * @file ARMv7-M/compilers/GCC/chtypes.h + * @brief ARMv7-M port system types. * * @addtogroup ARMv7_M_GCC_CORE * @{ diff --git a/os/common/ports/ARMv7-M/mpu.h b/os/common/ports/ARMv7-M/mpu.h index 850be915b..48dfd416b 100644 --- a/os/common/ports/ARMv7-M/mpu.h +++ b/os/common/ports/ARMv7-M/mpu.h @@ -15,10 +15,10 @@ */ /** - * @file common/ARMCMx/mpu.h - * @brief Cortex-Mx MPU support macros and structures. + * @file ARMv7-M/mpu.h + * @brief ARMv7-M MPU support macros and structures. * - * @addtogroup COMMON_ARMCMx_MPU + * @addtogroup ARMv7_M_MPU * @{ */ diff --git a/os/common/ports/ARMv8-M-ML/chcore_timer.h b/os/common/ports/ARMv8-M-ML/chcore_timer.h index 98e6592c6..fbf1b2275 100644 --- a/os/common/ports/ARMv8-M-ML/chcore_timer.h +++ b/os/common/ports/ARMv8-M-ML/chcore_timer.h @@ -21,7 +21,7 @@ * @file chcore_timer.h * @brief System timer header file. * - * @addtogroup ARMCMx_TIMER + * @addtogroup ARMv8_M_ML_TIMER * @{ */ diff --git a/os/common/ports/ARMv8-M-ML/compilers/GCC/chtypes.h b/os/common/ports/ARMv8-M-ML/compilers/GCC/chtypes.h index 2163f3d48..c96223336 100644 --- a/os/common/ports/ARMv8-M-ML/compilers/GCC/chtypes.h +++ b/os/common/ports/ARMv8-M-ML/compilers/GCC/chtypes.h @@ -18,10 +18,10 @@ */ /** - * @file ARMCMx/compilers/GCC/chtypes.h - * @brief ARM Cortex-Mx port system types. + * @file ARMv8-M-ML/compilers/GCC/chtypes.h + * @brief ARMv8-M-ML port system types. * - * @addtogroup ARMCMx_GCC_CORE + * @addtogroup ARMv8_M_ML_GCC_CORE * @{ */ @@ -32,65 +32,74 @@ #include #include +#include "ccportab.h" + /** - * @name Kernel types + * @name Architecture data constraints + */ +#define PORT_ARCH_SIZEOF_DATA_PTR 4 +#define PORT_ARCH_SIZEOF_CODE_PTR 4 +#define PORT_ARCH_REGISTERS_WIDTH 32 +#define PORT_ARCH_REVERSE_ORDER 1 +/** @} */ + +/** + * @name Port types * @{ */ -typedef uint32_t rtcnt_t; /**< Realtime counter. */ -typedef uint64_t rttime_t; /**< Realtime accumulator. */ -typedef uint32_t syssts_t; /**< System status word. */ -typedef uint8_t tmode_t; /**< Thread flags. */ -typedef uint8_t tstate_t; /**< Thread state. */ -typedef uint8_t trefs_t; /**< Thread references counter. */ -typedef uint8_t tslices_t; /**< Thread time slices counter.*/ -typedef uint32_t tprio_t; /**< Thread priority. */ -typedef int32_t msg_t; /**< Inter-thread message. */ -typedef int32_t eventid_t; /**< Numeric event identifier. */ -typedef uint32_t eventmask_t; /**< Mask of event identifiers. */ -typedef uint32_t eventflags_t; /**< Mask of event flags. */ -typedef int32_t cnt_t; /**< Generic signed counter. */ -typedef uint32_t ucnt_t; /**< Generic unsigned counter. */ +/** + * @brief Realtime counter. + */ +typedef uint32_t port_rtcnt_t; + +/** + * @brief Realtime accumulator. + */ +typedef uint64_t port_rttime_t; + +/** + * @brief System status word. + */ +typedef uint32_t port_syssts_t; + +/** + * @brief Type of stack and memory alignment enforcement. + * @note In this architecture the stack alignment is enforced to 64 bits, + * 32 bits alignment is supported by hardware but deprecated by ARM, + * the implementation choice is to not offer the option. + */ +typedef uint64_t port_stkalign_t; /** @} */ +/** + * @brief This port does not define OS-related types. + */ +#define PORT_DOES_NOT_PROVIDE_TYPES + /** * @brief ROM constant modifier. * @note It is set to use the "const" keyword in this port. */ -#define ROMCONST const +#define ROMCONST CC_ROMCONST /** * @brief Makes functions not inlineable. * @note If the compiler does not support such attribute then some * time-dependent services could be degraded. */ -#define NOINLINE __attribute__((noinline)) - -/** - * @brief Optimized thread function declaration macro. - */ -#define PORT_THD_FUNCTION(tname, arg) void tname(void *arg) - -/** - * @brief Packed variable specifier. - */ -#define PACKED_VAR __attribute__((packed)) +#define NOINLINE CC_NO_INLINE /** * @brief Memory alignment enforcement for variables. */ -#define ALIGNED_VAR(n) __attribute__((aligned(n))) +#define ALIGNED_VAR(n) CC_ALIGN_DATA(n) /** * @brief Size of a pointer. * @note To be used where the sizeof operator cannot be used, preprocessor * expressions for example. */ -#define SIZEOF_PTR 4 - -/** - * @brief True if alignment is low-high in current architecture. - */ -#define REVERSE_ORDER 1 +#define SIZEOF_PTR PORT_ARCH_SIZEOF_DATA_PTR #endif /* CHTYPES_H */