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git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@6308 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2013-09-20 12:25:11 +00:00
parent b295f4426c
commit be933e6129
6 changed files with 209 additions and 174 deletions
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4
os/hal/boards/NONSTANDARD_STM32F4_BARTHESS1/board.c
View File

@ -60,7 +60,7 @@ void boardInit(void) {
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) { bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp; (void)sdcp;
return !palReadPad(GPIOE, GPIOE_SDIO_DETECT); return !palReadPad(GPIOE, GPIOE_SDIO_DETECT);
@ -74,7 +74,7 @@ bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) { bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp; (void)sdcp;
return FALSE; return FALSE;

181
os/hal/ports/STM32/sdc_lld.c
View File

@ -28,7 +28,6 @@
#include <string.h> #include <string.h>
#include "ch.h"
#include "hal.h" #include "hal.h"
#if HAL_USE_SDC || defined(__DOXYGEN__) #if HAL_USE_SDC || defined(__DOXYGEN__)
@ -75,13 +74,13 @@ static union {
* @param[in] resp pointer to the response buffer * @param[in] resp pointer to the response buffer
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk, static bool sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
uint32_t n, uint32_t *resp) { uint32_t n, uint32_t *resp) {
/* Driver handles data in 512 bytes blocks (just like HC cards). But if we /* Driver handles data in 512 bytes blocks (just like HC cards). But if we
have not HC card than we must convert address from blocks to bytes.*/ have not HC card than we must convert address from blocks to bytes.*/
@ -92,16 +91,16 @@ static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
/* Send read multiple blocks command to card.*/ /* Send read multiple blocks command to card.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_MULTIPLE_BLOCK, if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_MULTIPLE_BLOCK,
startblk, resp) || MMCSD_R1_ERROR(resp[0])) startblk, resp) || MMCSD_R1_ERROR(resp[0]))
return CH_FAILED; return HAL_FAILED;
} }
else{ else{
/* Send read single block command.*/ /* Send read single block command.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_SINGLE_BLOCK, if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_READ_SINGLE_BLOCK,
startblk, resp) || MMCSD_R1_ERROR(resp[0])) startblk, resp) || MMCSD_R1_ERROR(resp[0]))
return CH_FAILED; return HAL_FAILED;
} }
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -113,13 +112,13 @@ static bool_t sdc_lld_prepare_read(SDCDriver *sdcp, uint32_t startblk,
* @param[in] resp pointer to the response buffer * @param[in] resp pointer to the response buffer
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk, static bool sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
uint32_t n, uint32_t *resp) { uint32_t n, uint32_t *resp) {
/* Driver handles data in 512 bytes blocks (just like HC cards). But if we /* Driver handles data in 512 bytes blocks (just like HC cards). But if we
have not HC card than we must convert address from blocks to bytes.*/ have not HC card than we must convert address from blocks to bytes.*/
@ -130,16 +129,16 @@ static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
/* Write multiple blocks command.*/ /* Write multiple blocks command.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK, if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_MULTIPLE_BLOCK,
startblk, resp) || MMCSD_R1_ERROR(resp[0])) startblk, resp) || MMCSD_R1_ERROR(resp[0]))
return CH_FAILED; return HAL_FAILED;
} }
else{ else{
/* Write single block command.*/ /* Write single block command.*/
if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_BLOCK, if (sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_WRITE_BLOCK,
startblk, resp) || MMCSD_R1_ERROR(resp[0])) startblk, resp) || MMCSD_R1_ERROR(resp[0]))
return CH_FAILED; return HAL_FAILED;
} }
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -150,26 +149,20 @@ static bool_t sdc_lld_prepare_write(SDCDriver *sdcp, uint32_t startblk,
* @param[in] resp pointer to the response buffer * @param[in] resp pointer to the response buffer
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
*/ */
static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n, static bool sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
uint32_t *resp) { uint32_t *resp) {
/* Note the mask is checked before going to sleep because the interrupt /* Note the mask is checked before going to sleep because the interrupt
may have occurred before reaching the critical zone.*/ may have occurred before reaching the critical zone.*/
chSysLock(); osalSysLock();
if (SDIO->MASK != 0) { if (SDIO->MASK != 0)
chDbgAssert(sdcp->thread == NULL, osalThreadSuspendS(&sdcp->thread);
"sdc_lld_start_data_transaction(), #1", "not NULL");
sdcp->thread = chThdSelf();
chSchGoSleepS(THD_STATE_SUSPENDED);
chDbgAssert(sdcp->thread == NULL,
"sdc_lld_start_data_transaction(), #2", "not NULL");
}
if ((SDIO->STA & SDIO_STA_DATAEND) == 0) { if ((SDIO->STA & SDIO_STA_DATAEND) == 0) {
chSysUnlock(); osalSysUnlock();
return CH_FAILED; return HAL_FAILED;
} }
#if (defined(STM32F4XX) || defined(STM32F2XX)) #if (defined(STM32F4XX) || defined(STM32F2XX))
@ -182,7 +175,7 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS; SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
SDIO->DCTRL = 0; SDIO->DCTRL = 0;
chSysUnlock(); osalSysUnlock();
/* Wait until interrupt flags to be cleared.*/ /* Wait until interrupt flags to be cleared.*/
/*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF) /*while (((DMA2->LISR) >> (sdcp->dma->ishift)) & STM32_DMA_ISR_TCIF)
@ -194,14 +187,14 @@ static bool_t sdc_lld_wait_transaction_end(SDCDriver *sdcp, uint32_t n,
SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS; SDIO->ICR = STM32_SDIO_ICR_ALL_FLAGS;
SDIO->DCTRL = 0; SDIO->DCTRL = 0;
chSysUnlock(); osalSysUnlock();
#endif #endif
/* Finalize transaction.*/ /* Finalize transaction.*/
if (n > 1) if (n > 1)
return sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp); return sdc_lld_send_cmd_short_crc(sdcp, MMCSD_CMD_STOP_TRANSMISSION, 0, resp);
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -271,24 +264,21 @@ static void sdc_lld_error_cleanup(SDCDriver *sdcp,
* *
* @isr * @isr
*/ */
CH_IRQ_HANDLER(STM32_SDIO_HANDLER) { OSAL_IRQ_HANDLER(STM32_SDIO_HANDLER) {
CH_IRQ_PROLOGUE(); OSAL_IRQ_PROLOGUE();
chSysLockFromIsr() osalSysLockFromISR();
/* Disables the source but the status flags are not reset because the /* Disables the source but the status flags are not reset because the
read/write functions needs to check them.*/ read/write functions needs to check them.*/
SDIO->MASK = 0; SDIO->MASK = 0;
if (SDCD1.thread != NULL) { osalThreadResumeI(&SDCD1.thread, MSG_OK);
chSchReadyI(SDCD1.thread);
SDCD1.thread = NULL;
}
chSysUnlockFromIsr(); osalSysUnlockFromISR();
CH_IRQ_EPILOGUE(); OSAL_IRQ_EPILOGUE();
} }
/*===========================================================================*/ /*===========================================================================*/
@ -333,15 +323,14 @@ void sdc_lld_start(SDCDriver *sdcp) {
if (sdcp->state == BLK_STOP) { if (sdcp->state == BLK_STOP) {
/* Note, the DMA must be enabled before the IRQs.*/ /* Note, the DMA must be enabled before the IRQs.*/
bool_t b; bool b;
b = dmaStreamAllocate(sdcp->dma, STM32_SDC_SDIO_IRQ_PRIORITY, NULL, NULL); b = dmaStreamAllocate(sdcp->dma, STM32_SDC_SDIO_IRQ_PRIORITY, NULL, NULL);
chDbgAssert(!b, "sdc_lld_start(), #1", "stream already allocated"); osalDbgAssert(!b, "stream already allocated");
dmaStreamSetPeripheral(sdcp->dma, &SDIO->FIFO); dmaStreamSetPeripheral(sdcp->dma, &SDIO->FIFO);
#if (defined(STM32F4XX) || defined(STM32F2XX)) #if (defined(STM32F4XX) || defined(STM32F2XX))
dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL); dmaStreamSetFIFO(sdcp->dma, STM32_DMA_FCR_DMDIS | STM32_DMA_FCR_FTH_FULL);
#endif #endif
nvicEnableVector(STM32_SDIO_NUMBER, nvicEnableVector(STM32_SDIO_NUMBER, STM32_SDC_SDIO_IRQ_PRIORITY);
CORTEX_PRIORITY_MASK(STM32_SDC_SDIO_IRQ_PRIORITY));
rccEnableSDIO(FALSE); rccEnableSDIO(FALSE);
} }
@ -478,13 +467,13 @@ void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg) {
* @param[out] resp pointer to the response buffer (one word) * @param[out] resp pointer to the response buffer (one word)
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp) { uint32_t *resp) {
uint32_t sta; uint32_t sta;
(void)sdcp; (void)sdcp;
@ -497,10 +486,10 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
SDIO->ICR = sta; SDIO->ICR = sta;
if ((sta & (SDIO_STA_CTIMEOUT)) != 0) { if ((sta & (SDIO_STA_CTIMEOUT)) != 0) {
sdc_lld_collect_errors(sdcp, sta); sdc_lld_collect_errors(sdcp, sta);
return CH_FAILED; return HAL_FAILED;
} }
*resp = SDIO->RESP1; *resp = SDIO->RESP1;
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -512,13 +501,13 @@ bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
* @param[out] resp pointer to the response buffer (one word) * @param[out] resp pointer to the response buffer (one word)
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp) { uint32_t *resp) {
uint32_t sta; uint32_t sta;
(void)sdcp; (void)sdcp;
@ -531,10 +520,10 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
SDIO->ICR = sta; SDIO->ICR = sta;
if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0) { if ((sta & (SDIO_STA_CTIMEOUT | SDIO_STA_CCRCFAIL)) != 0) {
sdc_lld_collect_errors(sdcp, sta); sdc_lld_collect_errors(sdcp, sta);
return CH_FAILED; return HAL_FAILED;
} }
*resp = SDIO->RESP1; *resp = SDIO->RESP1;
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -546,13 +535,13 @@ bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
* @param[out] resp pointer to the response buffer (four words) * @param[out] resp pointer to the response buffer (four words)
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp) { uint32_t *resp) {
uint32_t sta; uint32_t sta;
(void)sdcp; (void)sdcp;
@ -566,14 +555,14 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
SDIO->ICR = sta; SDIO->ICR = sta;
if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0) { if ((sta & (STM32_SDIO_STA_ERROR_MASK)) != 0) {
sdc_lld_collect_errors(sdcp, sta); sdc_lld_collect_errors(sdcp, sta);
return CH_FAILED; return HAL_FAILED;
} }
/* Save bytes in reverse order because MSB in response comes first.*/ /* Save bytes in reverse order because MSB in response comes first.*/
*resp++ = SDIO->RESP4; *resp++ = SDIO->RESP4;
*resp++ = SDIO->RESP3; *resp++ = SDIO->RESP3;
*resp++ = SDIO->RESP2; *resp++ = SDIO->RESP2;
*resp = SDIO->RESP1; *resp = SDIO->RESP1;
return CH_SUCCESS; return HAL_SUCCESS;
} }
/** /**
@ -585,22 +574,22 @@ bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
* @param[in] n number of blocks to read * @param[in] n number of blocks to read
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buf, uint32_t n) { uint8_t *buf, uint32_t n) {
uint32_t resp[1]; uint32_t resp[1];
chDbgCheck((n < (0x1000000 / MMCSD_BLOCK_SIZE)), "max transaction size"); osalDbgCheck(n < 0x1000000 / MMCSD_BLOCK_SIZE);
SDIO->DTIMER = STM32_SDC_READ_TIMEOUT; SDIO->DTIMER = STM32_SDC_READ_TIMEOUT;
/* Checks for errors and waits for the card to be ready for reading.*/ /* Checks for errors and waits for the card to be ready for reading.*/
if (_sdc_wait_for_transfer_state(sdcp)) if (_sdc_wait_for_transfer_state(sdcp))
return CH_FAILED; return HAL_FAILED;
/* Prepares the DMA channel for writing.*/ /* Prepares the DMA channel for writing.*/
dmaStreamSetMemory0(sdcp->dma, buf); dmaStreamSetMemory0(sdcp->dma, buf);
@ -631,11 +620,11 @@ bool_t sdc_lld_read_aligned(SDCDriver *sdcp, uint32_t startblk,
if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE) if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE)
goto error; goto error;
return CH_SUCCESS; return HAL_SUCCESS;
error: error:
sdc_lld_error_cleanup(sdcp, n, resp); sdc_lld_error_cleanup(sdcp, n, resp);
return CH_FAILED; return HAL_FAILED;
} }
/** /**
@ -647,22 +636,22 @@ error:
* @param[in] n number of blocks to write * @param[in] n number of blocks to write
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) { const uint8_t *buf, uint32_t n) {
uint32_t resp[1]; uint32_t resp[1];
chDbgCheck((n < (0x1000000 / MMCSD_BLOCK_SIZE)), "max transaction size"); osalDbgCheck(n < 0x1000000 / MMCSD_BLOCK_SIZE);
SDIO->DTIMER = STM32_SDC_WRITE_TIMEOUT; SDIO->DTIMER = STM32_SDC_WRITE_TIMEOUT;
/* Checks for errors and waits for the card to be ready for writing.*/ /* Checks for errors and waits for the card to be ready for writing.*/
if (_sdc_wait_for_transfer_state(sdcp)) if (_sdc_wait_for_transfer_state(sdcp))
return CH_FAILED; return HAL_FAILED;
/* Prepares the DMA channel for writing.*/ /* Prepares the DMA channel for writing.*/
dmaStreamSetMemory0(sdcp->dma, buf); dmaStreamSetMemory0(sdcp->dma, buf);
@ -692,11 +681,11 @@ bool_t sdc_lld_write_aligned(SDCDriver *sdcp, uint32_t startblk,
if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE) if (sdc_lld_wait_transaction_end(sdcp, n, resp) == TRUE)
goto error; goto error;
return CH_SUCCESS; return HAL_SUCCESS;
error: error:
sdc_lld_error_cleanup(sdcp, n, resp); sdc_lld_error_cleanup(sdcp, n, resp);
return CH_FAILED; return HAL_FAILED;
} }
/** /**
@ -708,25 +697,25 @@ error:
* @param[in] n number of blocks to read * @param[in] n number of blocks to read
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buf, uint32_t n) { uint8_t *buf, uint32_t n) {
#if STM32_SDC_SDIO_UNALIGNED_SUPPORT #if STM32_SDC_SDIO_UNALIGNED_SUPPORT
if (((unsigned)buf & 3) != 0) { if (((unsigned)buf & 3) != 0) {
uint32_t i; uint32_t i;
for (i = 0; i < n; i++) { for (i = 0; i < n; i++) {
if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1)) if (sdc_lld_read_aligned(sdcp, startblk, u.buf, 1))
return CH_FAILED; return HAL_FAILED;
memcpy(buf, u.buf, MMCSD_BLOCK_SIZE); memcpy(buf, u.buf, MMCSD_BLOCK_SIZE);
buf += MMCSD_BLOCK_SIZE; buf += MMCSD_BLOCK_SIZE;
startblk++; startblk++;
} }
return CH_SUCCESS; return HAL_SUCCESS;
} }
#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */ #endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */
return sdc_lld_read_aligned(sdcp, startblk, buf, n); return sdc_lld_read_aligned(sdcp, startblk, buf, n);
@ -741,13 +730,13 @@ bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
* @param[in] n number of blocks to write * @param[in] n number of blocks to write
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS operation succeeded. * @retval HAL_SUCCESS operation succeeded.
* @retval CH_FAILED operation failed. * @retval HAL_FAILED operation failed.
* *
* @notapi * @notapi
*/ */
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n) { const uint8_t *buf, uint32_t n) {
#if STM32_SDC_SDIO_UNALIGNED_SUPPORT #if STM32_SDC_SDIO_UNALIGNED_SUPPORT
if (((unsigned)buf & 3) != 0) { if (((unsigned)buf & 3) != 0) {
@ -756,10 +745,10 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
memcpy(u.buf, buf, MMCSD_BLOCK_SIZE); memcpy(u.buf, buf, MMCSD_BLOCK_SIZE);
buf += MMCSD_BLOCK_SIZE; buf += MMCSD_BLOCK_SIZE;
if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1)) if (sdc_lld_write_aligned(sdcp, startblk, u.buf, 1))
return CH_FAILED; return HAL_FAILED;
startblk++; startblk++;
} }
return CH_SUCCESS; return HAL_SUCCESS;
} }
#endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */ #endif /* STM32_SDC_SDIO_UNALIGNED_SUPPORT */
return sdc_lld_write_aligned(sdcp, startblk, buf, n); return sdc_lld_write_aligned(sdcp, startblk, buf, n);
@ -771,16 +760,16 @@ bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
* @param[in] sdcp pointer to the @p SDCDriver object * @param[in] sdcp pointer to the @p SDCDriver object
* *
* @return The operation status. * @return The operation status.
* @retval CH_SUCCESS the operation succeeded. * @retval HAL_SUCCESS the operation succeeded.
* @retval CH_FAILED the operation failed. * @retval HAL_FAILED the operation failed.
* *
* @api * @api
*/ */
bool_t sdc_lld_sync(SDCDriver *sdcp) { bool sdc_lld_sync(SDCDriver *sdcp) {
/* TODO: Implement.*/ /* TODO: Implement.*/
(void)sdcp; (void)sdcp;
return CH_SUCCESS; return HAL_SUCCESS;
} }
#endif /* HAL_USE_SDC */ #endif /* HAL_USE_SDC */

65
os/hal/ports/STM32/sdc_lld.h
View File

@ -74,15 +74,15 @@
/** /**
* @brief Write timeout in milliseconds. * @brief Write timeout in milliseconds.
*/ */
#if !defined(SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__) #if !defined(STM32_SDC_WRITE_TIMEOUT_MS) || defined(__DOXYGEN__)
#define SDC_WRITE_TIMEOUT_MS 250 #define STM32_SDC_WRITE_TIMEOUT_MS 250
#endif #endif
/** /**
* @brief Read timeout in milliseconds. * @brief Read timeout in milliseconds.
*/ */
#if !defined(SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__) #if !defined(STM32_SDC_READ_TIMEOUT_MS) || defined(__DOXYGEN__)
#define SDC_READ_TIMEOUT_MS 5 #define STM32_SDC_READ_TIMEOUT_MS 5
#endif #endif
/** /**
@ -92,21 +92,6 @@
#if !defined(STM32_SDC_SDIO_UNALIGNED_SUPPORT) || defined(__DOXYGEN__) #if !defined(STM32_SDC_SDIO_UNALIGNED_SUPPORT) || defined(__DOXYGEN__)
#define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE #define STM32_SDC_SDIO_UNALIGNED_SUPPORT TRUE
#endif #endif
#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
/**
* @brief DMA stream used for SDC operations.
* @note This option is only available on platforms with enhanced DMA.
*/
#if !defined(STM32_SDC_SDIO_DMA_STREAM) || defined(__DOXYGEN__)
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
#endif
#else /* !STM32_ADVANCED_DMA*/
#define STM32_SDC_SDIO_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
#endif /* !STM32_ADVANCED_DMA*/
/** @} */ /** @} */
/*===========================================================================*/ /*===========================================================================*/
@ -125,6 +110,20 @@
#error "Invalid DMA priority assigned to SDIO" #error "Invalid DMA priority assigned to SDIO"
#endif #endif
/* The following checks are only required when there is a DMA able to
reassign streams to different channels.*/
#if STM32_ADVANCED_DMA
/* Check on the presence of the DMA streams settings in mcuconf.h.*/
#if !defined(STM32_SDC_SDIO_DMA_STREAM)
#error "SDIO DMA streams not defined"
#endif
/* Check on the validity of the assigned DMA channels.*/
#if !STM32_DMA_IS_VALID_ID(STM32_SDC_SDIO_DMA_STREAM, STM32_SDC_SDIO_DMA_MSK)
#error "invalid DMA stream associated to SDIO"
#endif
#endif /* STM32_ADVANCED_DMA */
#if !defined(STM32_DMA_REQUIRED) #if !defined(STM32_DMA_REQUIRED)
#define STM32_DMA_REQUIRED #define STM32_DMA_REQUIRED
#endif #endif
@ -245,7 +244,7 @@ struct SDCDriver {
/** /**
* @brief Thread waiting for I/O completion IRQ. * @brief Thread waiting for I/O completion IRQ.
*/ */
Thread *thread; thread_reference_t thread;
/** /**
* @brief DMA mode bit mask. * @brief DMA mode bit mask.
*/ */
@ -286,19 +285,19 @@ extern "C" {
void sdc_lld_stop_clk(SDCDriver *sdcp); void sdc_lld_stop_clk(SDCDriver *sdcp);
void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode); void sdc_lld_set_bus_mode(SDCDriver *sdcp, sdcbusmode_t mode);
void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg); void sdc_lld_send_cmd_none(SDCDriver *sdcp, uint8_t cmd, uint32_t arg);
bool_t sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_short(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp); uint32_t *resp);
bool_t sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_short_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp); uint32_t *resp);
bool_t sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg, bool sdc_lld_send_cmd_long_crc(SDCDriver *sdcp, uint8_t cmd, uint32_t arg,
uint32_t *resp); uint32_t *resp);
bool_t sdc_lld_read(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_read(SDCDriver *sdcp, uint32_t startblk,
uint8_t *buf, uint32_t n); uint8_t *buf, uint32_t n);
bool_t sdc_lld_write(SDCDriver *sdcp, uint32_t startblk, bool sdc_lld_write(SDCDriver *sdcp, uint32_t startblk,
const uint8_t *buf, uint32_t n); const uint8_t *buf, uint32_t n);
bool_t sdc_lld_sync(SDCDriver *sdcp); bool sdc_lld_sync(SDCDriver *sdcp);
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp); bool sdc_lld_is_card_inserted(SDCDriver *sdcp);
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp); bool sdc_lld_is_write_protected(SDCDriver *sdcp);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

4
os/hal/src/sdc.c
View File

@ -86,7 +86,7 @@ bool _sdc_wait_for_transfer_state(SDCDriver *sdcp) {
case MMCSD_STS_RCV: case MMCSD_STS_RCV:
case MMCSD_STS_PRG: case MMCSD_STS_PRG:
#if SDC_NICE_WAITING #if SDC_NICE_WAITING
osalThreadSleepMilliseconds(1); osalThreadSleep(MS2ST(1));
#endif #endif
continue; continue;
default: default:
@ -257,7 +257,7 @@ bool sdcConnect(SDCDriver *sdcp) {
} }
if (++i >= SDC_INIT_RETRY) if (++i >= SDC_INIT_RETRY)
goto failed; goto failed;
osalThreadSleepMilliseconds(10); osalThreadSleep(MS2ST(10));
} }
} }

71
os/various/evtimer.c
View File

@ -25,40 +25,61 @@
#include "ch.h" #include "ch.h"
#include "evtimer.h" #include "evtimer.h"
static void tmrcb(void *p) { /*===========================================================================*/
EvTimer *etp = p; /* Module local definitions. */
/*===========================================================================*/
chSysLockFromIsr(); /*===========================================================================*/
/* Module exported variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Module local types. */
/*===========================================================================*/
/*===========================================================================*/
/* Module local variables. */
/*===========================================================================*/
/*===========================================================================*/
/* Module local functions. */
/*===========================================================================*/
static void tmrcb(void *p) {
event_timer_t *etp = p;
chSysLockFromISR();
chEvtBroadcastI(&etp->et_es); chEvtBroadcastI(&etp->et_es);
chVTSetI(&etp->et_vt, etp->et_interval, tmrcb, etp); chVTDoSetI(&etp->et_vt, etp->et_interval, tmrcb, etp);
chSysUnlockFromIsr(); chSysUnlockFromISR();
}
/*===========================================================================*/
/* Module exported functions. */
/*===========================================================================*/
/**
* @brief Initializes an @p event_timer_t structure.
*
* @param[out] etp the @p event_timer_t structure to be initialized
* @param[in] time the interval in system ticks
*/
void evtObjectInit(event_timer_t *etp, systime_t time) {
chEvtObjectInit(&etp->et_es);
chVTObjectInit(&etp->et_vt);
etp->et_interval = time;
} }
/** /**
* @brief Starts the timer * @brief Starts the timer
* @details If the timer was already running then the function has no effect. * @details If the timer was already running then the function has no effect.
* *
* @param etp pointer to an initialized @p EvTimer structure. * @param[in] etp pointer to an initialized @p event_timer_t structure.
*/ */
void evtStart(EvTimer *etp) { void evtStart(event_timer_t *etp) {
chSysLock(); chVTSet(&etp->et_vt, etp->et_interval, tmrcb, etp);
if (!chVTIsArmedI(&etp->et_vt))
chVTSetI(&etp->et_vt, etp->et_interval, tmrcb, etp);
chSysUnlock();
}
/**
* @brief Stops the timer.
* @details If the timer was already stopped then the function has no effect.
*
* @param etp pointer to an initialized @p EvTimer structure.
*/
void evtStop(EvTimer *etp) {
chVTReset(&etp->et_vt);
} }
/** @} */ /** @} */

58
os/various/evtimer.h
View File

@ -25,42 +25,68 @@
#ifndef _EVTIMER_H_ #ifndef _EVTIMER_H_
#define _EVTIMER_H_ #define _EVTIMER_H_
/*===========================================================================*/
/* Module constants. */
/*===========================================================================*/
/*===========================================================================*/
/* Module pre-compile time settings. */
/*===========================================================================*/
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
/* /*
* Module dependencies check. * Module dependencies check.
*/ */
#if !CH_USE_EVENTS #if !CH_CFG_USE_EVENTS
#error "Event Timers require CH_USE_EVENTS" #error "Event Timers require CH_CFG_USE_EVENTS"
#endif #endif
/*===========================================================================*/
/* Module data structures and types. */
/*===========================================================================*/
/** /**
* @brief Event timer structure. * @brief Type of a event timer structure.
*/ */
typedef struct { typedef struct {
VirtualTimer et_vt; virtual_timer_t et_vt;
EventSource et_es; event_source_t et_es;
systime_t et_interval; systime_t et_interval;
} EvTimer; } event_timer_t;
/*===========================================================================*/
/* Module macros. */
/*===========================================================================*/
/*===========================================================================*/
/* External declarations. */
/*===========================================================================*/
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
void evtStart(EvTimer *etp); void evtObjectInit(event_timer_t *etp, systime_t time);
void evtStop(EvTimer *etp); void evtStart(event_timer_t *etp);
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/*===========================================================================*/
/* Module inline functions. */
/*===========================================================================*/
/** /**
* @brief Initializes an @p EvTimer structure. * @brief Stops the timer.
* @details If the timer was already stopped then the function has no effect.
* *
* @param etp the EvTimer structure to be initialized * @param[in] etp pointer to an initialized @p event_timer_t structure.
* @param time the interval in system ticks
*/ */
#define evtInit(etp, time) { \ static inline void vevtStop(event_timer_t *etp) {
chEvtInit(&(etp)->et_es); \
(etp)->et_vt.vt_func = NULL; \ chVTReset(&etp->et_vt);
(etp)->et_interval = (time); \
} }
#endif /* _EVTIMER_H_ */ #endif /* _EVTIMER_H_ */