diff --git a/os/ex/ST/l3gd20.c b/os/ex/ST/l3gd20.c index 3e9c93640..255026fba 100644 --- a/os/ex/ST/l3gd20.c +++ b/os/ex/ST/l3gd20.c @@ -33,58 +33,7 @@ /* Driver local definitions. */ /*===========================================================================*/ -#define L3GD20_SENS_250DPS ((float)0.00875f) -#define L3GD20_SENS_500DPS ((float)0.01750f) -#define L3GD20_SENS_2000DPS ((float)0.07000f) - -#define L3GD20_DI ((uint8_t)0xFF) -#define L3GD20_DI_0 ((uint8_t)0x01) -#define L3GD20_DI_1 ((uint8_t)0x02) -#define L3GD20_DI_2 ((uint8_t)0x04) -#define L3GD20_DI_3 ((uint8_t)0x08) -#define L3GD20_DI_4 ((uint8_t)0x10) -#define L3GD20_DI_5 ((uint8_t)0x20) -#define L3GD20_DI_6 ((uint8_t)0x40) -#define L3GD20_DI_7 ((uint8_t)0x80) - -#define L3GD20_AD ((uint8_t)0x3F) -#define L3GD20_AD_0 ((uint8_t)0x01) -#define L3GD20_AD_1 ((uint8_t)0x02) -#define L3GD20_AD_2 ((uint8_t)0x04) -#define L3GD20_AD_3 ((uint8_t)0x08) -#define L3GD20_AD_4 ((uint8_t)0x10) -#define L3GD20_AD_5 ((uint8_t)0x20) -#define L3GD20_MS ((uint8_t)0x40) -#define L3GD20_RW ((uint8_t)0x80) - -#define L3GD20_AD_WHO_AM_I ((uint8_t)0x0F) -#define L3GD20_AD_CTRL_REG1 ((uint8_t)0x20) -#define L3GD20_AD_CTRL_REG2 ((uint8_t)0x21) -#define L3GD20_AD_CTRL_REG3 ((uint8_t)0x22) -#define L3GD20_AD_CTRL_REG4 ((uint8_t)0x23) -#define L3GD20_AD_CTRL_REG5 ((uint8_t)0x24) -#define L3GD20_AD_REFERENCE ((uint8_t)0x25) -#define L3GD20_AD_OUT_TEMP ((uint8_t)0x26) -#define L3GD20_AD_STATUS_REG ((uint8_t)0x27) -#define L3GD20_AD_OUT_X_L ((uint8_t)0x28) -#define L3GD20_AD_OUT_X_H ((uint8_t)0x29) -#define L3GD20_AD_OUT_Y_L ((uint8_t)0x2A) -#define L3GD20_AD_OUT_Y_H ((uint8_t)0x2B) -#define L3GD20_AD_OUT_Z_L ((uint8_t)0x2C) -#define L3GD20_AD_OUT_Z_H ((uint8_t)0x2D) -#define L3GD20_AD_FIFO_CTRL_REG ((uint8_t)0x2E) -#define L3GD20_AD_FIFO_SRC_REG ((uint8_t)0x2F) -#define L3GD20_AD_INT1_CFG ((uint8_t)0x30) -#define L3GD20_AD_INT1_SRC ((uint8_t)0x31) -#define L3GD20_AD_INT1_TSH_XH ((uint8_t)0x32) -#define L3GD20_AD_INT1_TSH_XL ((uint8_t)0x33) -#define L3GD20_AD_INT1_TSH_YH ((uint8_t)0x34) -#define L3GD20_AD_INT1_TSH_YL ((uint8_t)0x35) -#define L3GD20_AD_INT1_TSH_ZH ((uint8_t)0x36) -#define L3GD20_AD_INT1_TSH_ZL ((uint8_t)0x37) -#define L3GD20_AD_INT1_DURATION ((uint8_t)0x38) - -#define L3GD20_CTRL_REG4_FS_MASK ((uint8_t)0x30) +#define PI 3.14159f /*===========================================================================*/ /* Driver exported variables. */ @@ -94,389 +43,464 @@ /* Driver local variables and types. */ /*===========================================================================*/ -/** - * @brief L3GD20 Power Mode - */ -typedef enum { - L3GD20_PM_POWER_DOWN = 0x00, /**< Power down enabled. */ - L3GD20_PM_SLEEP_NORMAL = 0x08 /**< Normal operation mode. */ -}l3gd20_pm_t; - /*===========================================================================*/ /* Driver local functions. */ /*===========================================================================*/ #if (L3GD20_USE_SPI) || defined(__DOXYGEN__) /** - * @brief Reads a generic register value using SPI. - * @pre The SPI interface must be initialized and the driver started. - * - * @param[in] spip pointer to the SPI interface - * @param[in] reg register number - * @return register value. - */ -static uint8_t l3gd20SPIReadRegister(SPIDriver *spip, uint8_t reg) { - uint8_t txbuf[2] = {L3GD20_RW | reg, 0xFF}; - uint8_t rxbuf[2] = {0x00, 0x00}; - spiSelect(spip); - spiExchange(spip, 2, txbuf, rxbuf); - spiUnselect(spip); - return rxbuf[1]; -} - -/** - * @brief Writes a value into a generic register using SPI. - * @pre The SPI interface must be initialized and the driver started. - * - * @param[in] spip pointer to the SPI interface - * @param[in] reg register number - * @param[in] value register value. - */ -static void l3gd20SPIWriteRegister(SPIDriver *spip, uint8_t reg, - uint8_t value) { - - switch (reg) { - default: - /* Reserved register must not be written, according to the datasheet - * this could permanently damage the device. - */ - osalDbgAssert(FALSE, "l3gd20SPIWriteRegister(), reserved register"); - case L3GD20_AD_WHO_AM_I: - case L3GD20_AD_OUT_TEMP : - case L3GD20_AD_STATUS_REG: - case L3GD20_AD_OUT_X_L: - case L3GD20_AD_OUT_X_H: - case L3GD20_AD_OUT_Y_L: - case L3GD20_AD_OUT_Y_H: - case L3GD20_AD_OUT_Z_L: - case L3GD20_AD_OUT_Z_H: - case L3GD20_AD_FIFO_SRC_REG: - case L3GD20_AD_INT1_SRC: - /* Read only registers cannot be written, the command is ignored.*/ - return; - case L3GD20_AD_CTRL_REG1: - case L3GD20_AD_CTRL_REG2: - case L3GD20_AD_CTRL_REG3: - case L3GD20_AD_CTRL_REG4: - case L3GD20_AD_CTRL_REG5: - case L3GD20_AD_REFERENCE: - case L3GD20_AD_FIFO_CTRL_REG: - case L3GD20_AD_INT1_CFG: - case L3GD20_AD_INT1_TSH_XH: - case L3GD20_AD_INT1_TSH_XL: - case L3GD20_AD_INT1_TSH_YH: - case L3GD20_AD_INT1_TSH_YL: - case L3GD20_AD_INT1_TSH_ZH: - case L3GD20_AD_INT1_TSH_ZL: - case L3GD20_AD_INT1_DURATION: - spiSelect(spip); - uint8_t txbuf[2] = {reg, value}; - spiSend(spip, 2, txbuf); - spiUnselect(spip); - } -} -#endif /* L3GD20_USE_SPI */ - -/* - * Interface implementation. - */ -static size_t get_axes_number(void *ip) { - - osalDbgCheck(ip != NULL); - return L3GD20_NUMBER_OF_AXES; -} - -static msg_t read_raw(void *ip, int32_t axes[L3GD20_NUMBER_OF_AXES]) { - int16_t tmp; - osalDbgCheck((ip != NULL) && (axes != NULL)); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), - "read_raw(), invalid state"); - -#if L3GD20_USE_SPI - osalDbgAssert((((L3GD20Driver *)ip)->config->spip->state == SPI_READY), - "read_raw(), channel not ready"); -#if L3GD20_SHARED_SPI - spiAcquireBus(((L3GD20Driver *)ip)->config->spip); - spiStart(((L3GD20Driver *)ip)->config->spip, - ((L3GD20Driver *)ip)->config->spicfg); -#endif /* L3GD20_SHARED_SPI */ - if(((L3GD20Driver *)ip)->config->axesenabling & L3GD20_AE_X){ - tmp = l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_X_L); - tmp += l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_X_H) << 8; - axes[0] = (int32_t)tmp + ((L3GD20Driver *)ip)->bias[0]; - } - if(((L3GD20Driver *)ip)->config->axesenabling & L3GD20_AE_Y){ - tmp = l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_Y_L); - tmp += l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_Y_H) << 8; - axes[1] = (int32_t)tmp + ((L3GD20Driver *)ip)->bias[1]; - } - if(((L3GD20Driver *)ip)->config->axesenabling & L3GD20_AE_Z){ - tmp = l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_Z_L); - tmp += l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_Z_H) << 8; - axes[2] = (int32_t)tmp + ((L3GD20Driver *)ip)->bias[2]; - } -#if L3GD20_SHARED_SPI - spiReleaseBus(((L3GD20Driver *)ip)->config->spip); -#endif /* L3GD20_SHARED_SPI */ -#endif /* L3GD20_USE_SPI */ - return MSG_OK; -} - -static msg_t read_cooked(void *ip, float axes[]) { - uint32_t i; - int32_t raw[L3GD20_NUMBER_OF_AXES]; - msg_t msg; - - osalDbgCheck((ip != NULL) && (axes != NULL)); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), - "read_cooked(), invalid state"); - - msg = read_raw(ip, raw); - for(i = 0; i < L3GD20_NUMBER_OF_AXES ; i++){ - axes[i] = raw[i] * ((L3GD20Driver *)ip)->sensitivity[i]; - } - return msg; -} - -static msg_t sample_bias(void *ip) { - uint32_t i, j; - int32_t raw[L3GD20_NUMBER_OF_AXES]; - int32_t buff[L3GD20_NUMBER_OF_AXES] = {0, 0, 0}; - - osalDbgCheck(ip != NULL); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), - "sample_bias(), invalid state"); - - for(i = 0; i < L3GD20_BIAS_ACQ_TIMES; i++){ - read_raw(ip, raw); - for(j = 0; j < L3GD20_NUMBER_OF_AXES; j++){ - buff[j] += raw[j]; - } - osalThreadSleepMicroseconds(L3GD20_BIAS_SETTLING_uS); - } - - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++){ - ((L3GD20Driver *)ip)->bias[i] = buff[i] / L3GD20_BIAS_ACQ_TIMES; - } - return MSG_OK; -} - -static msg_t set_bias(void *ip, int32_t *bp) { - uint32_t i; - - osalDbgCheck((ip != NULL) && (bp !=NULL)); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY) || - (((L3GD20Driver *)ip)->state == L3GD20_STOP), - "set_bias(), invalid state"); - - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { - ((L3GD20Driver *)ip)->bias[i] = bp[i]; - } - return MSG_OK; -} - -static msg_t reset_bias(void *ip) { - uint32_t i; - - osalDbgCheck(ip != NULL); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY) || - (((L3GD20Driver *)ip)->state == L3GD20_STOP), - "reset_bias(), invalid state"); - - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - ((L3GD20Driver *)ip)->bias[i] = 0; - return MSG_OK; -} - -static msg_t set_sensivity(void *ip, float *sp) { - uint32_t i; - - osalDbgCheck((ip != NULL) && (sp !=NULL)); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), - "set_sensivity(), invalid state"); - - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { - ((L3GD20Driver *)ip)->sensitivity[i] = sp[i]; - } - return MSG_OK; -} - -static msg_t reset_sensivity(void *ip) { - uint32_t i; - - osalDbgCheck(ip != NULL); - - osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), - "reset_sensivity(), invalid state"); - - if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_250DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_250DPS; - else if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_500DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_500DPS; - else if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_2000DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_2000DPS; - else { - osalDbgAssert(FALSE, "reset_sensivity(), full scale issue"); - return MSG_RESET; - } - return MSG_OK; -} - -static msg_t get_temperature(void *ip, float* tempp) { - -#if L3GD20_USE_SPI - osalDbgAssert((((L3GD20Driver *)ip)->config->spip->state == SPI_READY), - "read_raw(), channel not ready"); -#if L3GD20_SHARED_SPI - spiAcquireBus(((L3GD20Driver *)ip)->config->spip); - spiStart(((L3GD20Driver *)ip)->config->spip, - ((L3GD20Driver *)ip)->config->spicfg); -#endif /* L3GD20_SHARED_SPI */ - *tempp = (int8_t)l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, - L3GD20_AD_OUT_TEMP); -#if L3GD20_SHARED_SPI - spiReleaseBus(((L3GD20Driver *)ip)->config->spip); -#endif /* L3GD20_SHARED_SPI */ -#endif /* L3GD20_USE_SPI */ - return MSG_OK; -} - -static const struct BaseSensorVMT vmt_basesensor = { - get_axes_number, read_raw, read_cooked -}; - -static const struct BaseGyroscopeVMT vmt_basegyroscope = { - get_axes_number, read_raw, read_cooked, - sample_bias, set_bias, reset_bias, - set_sensivity, reset_sensivity -}; - -static const struct L3GD20VMT vmt_l3gd20 = { - get_axes_number, read_raw, read_cooked, - sample_bias, set_bias, reset_bias, - set_sensivity, reset_sensivity, get_temperature -}; - -/*===========================================================================*/ -/* Driver exported functions. */ -/*===========================================================================*/ - -/** - * @brief Initializes an instance. - * - * @param[out] devp pointer to the @p L3GD20Driver object - * - * @init - */ -void l3gd20ObjectInit(L3GD20Driver *devp) { - uint32_t i; - devp->vmt_basesensor = &vmt_basesensor; - devp->vmt_basegyroscope = &vmt_basegyroscope; - devp->vmt_l3gd20 = &vmt_l3gd20; - devp->config = NULL; - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - devp->bias[i] = 0; - devp->state = L3GD20_STOP; -} - -/** - * @brief Configures and activates L3GD20 Complex Driver peripheral. - * - * @param[in] devp pointer to the @p L3GD20Driver object - * @param[in] config pointer to the @p L3GD20Config object - * - * @api - */ -void l3gd20Start(L3GD20Driver *devp, const L3GD20Config *config) { - uint32_t i; - osalDbgCheck((devp != NULL) && (config != NULL)); - - osalDbgAssert((devp->state == L3GD20_STOP) || (devp->state == L3GD20_READY), - "l3gd20Start(), invalid state"); - - devp->config = config; - -#if L3GD20_USE_SPI -#if L3GD20_SHARED_SPI - spiAcquireBus((devp)->config->spip); -#endif /* L3GD20_SHARED_SPI */ - spiStart((devp)->config->spip, - (devp)->config->spicfg); - l3gd20SPIWriteRegister(devp->config->spip, L3GD20_AD_CTRL_REG1, - devp->config->axesenabling | - L3GD20_PM_SLEEP_NORMAL | - devp->config->outputdatarate); - l3gd20SPIWriteRegister(devp->config->spip, L3GD20_AD_CTRL_REG4, - devp->config->fullscale | - devp->config->blockdataupdate | - devp->config->endianness); -#if L3GD20_SHARED_SPI - spiReleaseBus((devp)->config->spip); -#endif /* L3GD20_SHARED_SPI */ -#endif /* L3GD20_USE_SPI */ - - /* Storing sensitivity information according to full scale value */ - if(devp->config->fullscale == L3GD20_FS_250DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - devp->sensitivity[i] = L3GD20_SENS_250DPS; - else if(devp->config->fullscale == L3GD20_FS_500DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - devp->sensitivity[i] = L3GD20_SENS_500DPS; - else if(devp->config->fullscale == L3GD20_FS_2000DPS) - for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) - devp->sensitivity[i] = L3GD20_SENS_2000DPS; - else - osalDbgAssert(FALSE, "l3gd20Start(), full scale issue"); - /* This is the Gyroscope transient recovery time */ - osalThreadSleepMilliseconds(10); - - devp->state = L3GD20_READY; -} - -/** - * @brief Deactivates the L3GD20 Complex Driver peripheral. - * - * @param[in] devp pointer to the @p L3GD20Driver object - * - * @api - */ -void l3gd20Stop(L3GD20Driver *devp) { - - osalDbgCheck(devp != NULL); - - osalDbgAssert((devp->state == L3GD20_STOP) || (devp->state == L3GD20_READY), - "l3gd20Stop(), invalid state"); - -#if (L3GD20_USE_SPI) - if (devp->state == L3GD20_STOP) { -#if L3GD20_SHARED_SPI - spiAcquireBus((devp)->config->spip); - spiStart((devp)->config->spip, - (devp)->config->spicfg); -#endif /* L3GD20_SHARED_SPI */ - l3gd20SPIWriteRegister(devp->config->spip, L3GD20_AD_CTRL_REG1, - L3GD20_PM_POWER_DOWN | L3GD20_AE_DISABLED); - spiStop((devp)->config->spip); -#if L3GD20_SHARED_SPI - spiReleaseBus((devp)->config->spip); -#endif /* L3GD20_SHARED_SPI */ - } -#endif /* L3GD20_USE_SPI */ - devp->state = L3GD20_STOP; -} -/** @} */ + * @brief Reads a generic register value using SPI. + * @pre The SPI interface must be initialized and the driver started. + * + * @param[in] spip pointer to the SPI interface + * @param[in] reg starting register address + * @param[in] n number of adjacent registers to write + * @param[in] b pointer to a buffer. + */ +static void l3gd20SPIReadRegister(SPIDriver *spip, uint8_t reg, size_t n, + uint8_t* b) { + uint8_t cmd; + (n == 1) ? (cmd = reg) : (cmd = reg | L3GD20_RW | L3GD20_MS); + spiSelect(spip); + spiSend(spip, 1, &cmd); + spiReceive(spip, n, b); + spiUnselect(spip); +} + +/** + * @brief Writes a value into a generic register using SPI. + * @pre The SPI interface must be initialized and the driver started. + * + * @param[in] spip pointer to the SPI interface + * @param[in] reg starting register address + * @param[in] n number of adjacent registers to write + * @param[in] value pointer to a buffer of values. + */ +static void l3gd20SPIWriteRegister(SPIDriver *spip, uint8_t reg, size_t n, + uint8_t* b) { + uint8_t cmd; + (n == 1) ? (cmd = reg) : (cmd = reg | L3GD20_MS); + spiSelect(spip); + spiSend(spip, 1, &cmd); + spiSend(spip, n, b); + spiUnselect(spip); +} +#endif /* L3GD20_USE_SPI */ + +/* + * Interface implementation. + */ +static size_t get_axes_number(void *ip) { + + osalDbgCheck(ip != NULL); + return L3GD20_NUMBER_OF_AXES; +} + +static msg_t read_raw(void *ip, int32_t axes[L3GD20_NUMBER_OF_AXES]) { + uint8_t buff [L3GD20_NUMBER_OF_AXES * 2], i; + int16_t tmp; + osalDbgCheck((ip != NULL) && (axes != NULL)); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), + "read_raw(), invalid state"); + +#if L3GD20_USE_SPI + osalDbgAssert((((L3GD20Driver *)ip)->config->spip->state == SPI_READY), + "read_raw(), channel not ready"); +#if L3GD20_SHARED_SPI + spiAcquireBus(((L3GD20Driver *)ip)->config->spip); + spiStart(((L3GD20Driver *)ip)->config->spip, + ((L3GD20Driver *)ip)->config->spicfg); +#endif /* L3GD20_SHARED_SPI */ + l3gd20SPIReadRegister(((L3GD20Driver *)ip)->config->spip, L3GD20_AD_OUT_X_L, + L3GD20_NUMBER_OF_AXES * 2, buff); + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + tmp = buff[2*i] + (buff[2*i+1] << 8); + axes[i] = (int32_t)tmp; + } +#if L3GD20_SHARED_SPI + spiReleaseBus(((L3GD20Driver *)ip)->config->spip); +#endif /* L3GD20_SHARED_SPI */ +#endif /* L3GD20_USE_SPI */ + return MSG_OK; +} + +static msg_t read_cooked(void *ip, float axes[]) { + uint32_t i; + int32_t raw[L3GD20_NUMBER_OF_AXES]; + msg_t msg; + + osalDbgCheck((ip != NULL) && (axes != NULL)); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), + "read_cooked(), invalid state"); + + msg = read_raw(ip, raw); + for(i = 0; i < L3GD20_NUMBER_OF_AXES ; i++){ + axes[i] = (raw[i] * ((L3GD20Driver *)ip)->sensitivity[i]); + axes[i] -= ((L3GD20Driver *)ip)->bias[i]; + } + return msg; +} + +static msg_t sample_bias(void *ip) { + uint32_t i, j; + int32_t raw[L3GD20_NUMBER_OF_AXES]; + int32_t buff[L3GD20_NUMBER_OF_AXES] = {0, 0, 0}; + + osalDbgCheck(ip != NULL); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), + "sample_bias(), invalid state"); + + for(i = 0; i < L3GD20_BIAS_ACQ_TIMES; i++){ + read_raw(ip, raw); + for(j = 0; j < L3GD20_NUMBER_OF_AXES; j++){ + buff[j] += raw[j]; + } + osalThreadSleepMicroseconds(L3GD20_BIAS_SETTLING_uS); + } + + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++){ + ((L3GD20Driver *)ip)->bias[i] = (buff[i] / L3GD20_BIAS_ACQ_TIMES); + ((L3GD20Driver *)ip)->bias[i] *= ((L3GD20Driver *)ip)->sensitivity[i]; + } + return MSG_OK; +} + +static msg_t set_bias(void *ip, int32_t *bp) { + uint32_t i; + + osalDbgCheck((ip != NULL) && (bp !=NULL)); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY) || + (((L3GD20Driver *)ip)->state == L3GD20_STOP), + "set_bias(), invalid state"); + + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + ((L3GD20Driver *)ip)->bias[i] = bp[i]; + } + return MSG_OK; +} + +static msg_t reset_bias(void *ip) { + uint32_t i; + + osalDbgCheck(ip != NULL); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY) || + (((L3GD20Driver *)ip)->state == L3GD20_STOP), + "reset_bias(), invalid state"); + + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->bias[i] = 0; + return MSG_OK; +} + +static msg_t set_sensivity(void *ip, float *sp) { + uint32_t i; + + osalDbgCheck((ip != NULL) && (sp !=NULL)); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), + "set_sensivity(), invalid state"); + + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + ((L3GD20Driver *)ip)->sensitivity[i] = sp[i]; + } + return MSG_OK; +} + +static msg_t reset_sensivity(void *ip) { + uint32_t i; + + osalDbgCheck(ip != NULL); + + osalDbgAssert((((L3GD20Driver *)ip)->state == L3GD20_READY), + "reset_sensivity(), invalid state"); + + if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_250DPS) + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_250DPS; + else if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_500DPS) + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_500DPS; + else if(((L3GD20Driver *)ip)->config->fullscale == L3GD20_FS_2000DPS) + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->sensitivity[i] = L3GD20_SENS_2000DPS; + else { + osalDbgAssert(FALSE, "reset_sensivity(), full scale issue"); + return MSG_RESET; + } + return MSG_OK; +} + +static msg_t set_full_scale(void *ip, l3gd20_fs_t fs) { + float newfs, scale; + unsigned i; + + if(fs == L3GD20_FS_250DPS) { + newfs = L3GD20_250DPS; + } + else if(fs == L3GD20_FS_500DPS) { + newfs = L3GD20_500DPS; + } + else if(fs == L3GD20_FS_2000DPS) { + newfs = L3GD20_2000DPS; + } + else { + return MSG_RESET; + } + + if(newfs != ((L3GD20Driver *)ip)->fullscale) { + scale = newfs / ((L3GD20Driver *)ip)->fullscale; + ((L3GD20Driver *)ip)->fullscale = newfs; + /* Scaling sensitivity and bias. Re-calibration is suggested anyway. */ + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + ((L3GD20Driver *)ip)->sensitivity[i] *= scale; + ((L3GD20Driver *)ip)->bias[i] *= scale; + } + } + return MSG_OK; +} + +static l3gd20_fs_t get_full_scale(void *ip) { + if(((L3GD20Driver *)ip)->fullscale == L3GD20_250DPS) { + return L3GD20_FS_250DPS; + } + else if(((L3GD20Driver *)ip)->fullscale == L3GD20_500DPS) { + return L3GD20_FS_500DPS; + } + else { + return L3GD20_FS_2000DPS; + } +} + +static msg_t set_meas_unit(void *ip, l3gd20_unit_t unit) { + unsigned i; + if(unit != ((L3GD20Driver *)ip)->meas_unit) { + ((L3GD20Driver *)ip)->meas_unit = unit; + /* From RPS to DPS */ + if(unit == L3GD20_UNIT_DPS) + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->sensitivity[i] *= (2 * PI); + /* From DPS to RPS */ + else if(unit == L3GD20_UNIT_RPS) + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + ((L3GD20Driver *)ip)->sensitivity[i] /= (2 * PI); + else + return MSG_RESET; + } + return MSG_OK; +} + +static l3gd20_unit_t get_meas_unit(void *ip) { + + return ((L3GD20Driver *)ip)->meas_unit; +} + +static const struct BaseSensorVMT vmt_basesensor = { + get_axes_number, read_raw, read_cooked +}; + +static const struct BaseGyroscopeVMT vmt_basegyroscope = { + get_axes_number, read_raw, read_cooked, + sample_bias, set_bias, reset_bias, + set_sensivity, reset_sensivity +}; + +static const struct L3GD20VMT vmt_l3gd20 = { + get_axes_number, read_raw, read_cooked, + sample_bias, set_bias, reset_bias, + set_sensivity, reset_sensivity, + set_full_scale, get_full_scale, + set_meas_unit, get_meas_unit +}; + +/*===========================================================================*/ +/* Driver exported functions. */ +/*===========================================================================*/ + +/** + * @brief Initializes an instance. + * + * @param[out] devp pointer to the @p L3GD20Driver object + * + * @init + */ +void l3gd20ObjectInit(L3GD20Driver *devp) { + uint32_t i; + devp->vmt_basesensor = &vmt_basesensor; + devp->vmt_basegyroscope = &vmt_basegyroscope; + devp->vmt_l3gd20 = &vmt_l3gd20; + devp->config = NULL; + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) + devp->bias[i] = 0; + devp->state = L3GD20_STOP; +} + +/** + * @brief Configures and activates L3GD20 Complex Driver peripheral. + * + * @param[in] devp pointer to the @p L3GD20Driver object + * @param[in] config pointer to the @p L3GD20Config object + * + * @api + */ +void l3gd20Start(L3GD20Driver *devp, const L3GD20Config *config) { + uint32_t i; + uint8_t cr[5] = {0, 0, 0, 0, 0}; + osalDbgCheck((devp != NULL) && (config != NULL)); + + osalDbgAssert((devp->state == L3GD20_STOP) || (devp->state == L3GD20_READY), + "l3gd20Start(), invalid state"); + + devp->config = config; + +#if L3GD20_USE_SPI +#if L3GD20_SHARED_SPI + spiAcquireBus((devp)->config->spip); +#endif /* L3GD20_SHARED_SPI */ + spiStart((devp)->config->spip, + (devp)->config->spicfg); + + /* Control register 1 configuration block */ + { + cr[0] = L3GD20_CTRL_REG1_XEN | L3GD20_CTRL_REG1_YEN | + L3GD20_CTRL_REG1_ZEN | L3GD20_CTRL_REG1_PD | + devp->config->outputdatarate; +#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__) + cr[0] |= devp->config->bandwidth; +#endif + } + + /* Control register 2 configuration block */ + { +#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__) + if(devp->config->hpmode != L3GD20_HPM_BYPASSED) + cr[1] = devp->config->hpmode | devp->config->hpconfiguration; +#endif + } + + /* Control register 3 configuration block */ + { + } + + /* Control register 4 configuration block */ + { + cr[3] = devp->config->fullscale; +#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__) + cr[3] |= devp->config->blockdataupdate | + devp->config->endianness; +#endif + } + + /* Control register 5 configuration block */ + { + +#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__) + if((devp->config->hpmode != L3GD20_HPM_BYPASSED)) { + cr[4] = L3GD20_CTRL_REG5_HPEN; + if(devp->config->lp2mode != L3GD20_LP2M_BYPASSED) { + cr[4] |= L3GD20_CTRL_REG5_INT1_SEL1 | + L3GD20_CTRL_REG5_OUT_SEL1; + } + else { + cr[4] |= L3GD20_CTRL_REG5_INT1_SEL0 | + L3GD20_CTRL_REG5_OUT_SEL0; + } + } +#endif + } + l3gd20SPIWriteRegister(devp->config->spip, L3GD20_AD_CTRL_REG1, + 5, cr); +#if L3GD20_SHARED_SPI + spiReleaseBus((devp)->config->spip); +#endif /* L3GD20_SHARED_SPI */ +#endif /* L3GD20_USE_SPI */ + + /* Storing sensitivity information according to full scale and unit value */ + if(devp->config->fullscale == L3GD20_FS_250DPS) { + devp->fullscale = L3GD20_250DPS; + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + if(devp->meas_unit == L3GD20_UNIT_DPS) { + devp->sensitivity[i] = L3GD20_SENS_250DPS; + } + else if (devp->meas_unit == L3GD20_UNIT_RPS) { + devp->sensitivity[i] = L3GD20_SENS_250DPS / (2 * PI); + } + else { + devp->sensitivity[i] = 1.0; + } + } + } + else if(devp->config->fullscale == L3GD20_FS_500DPS) { + devp->fullscale = L3GD20_500DPS; + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + if(devp->meas_unit == L3GD20_UNIT_DPS) { + devp->sensitivity[i] = L3GD20_SENS_500DPS; + } + else if (devp->meas_unit == L3GD20_UNIT_RPS) { + devp->sensitivity[i] = L3GD20_SENS_500DPS / (2 * PI); + } + else { + devp->sensitivity[i] = 1.0; + } + } + } + else if(devp->config->fullscale == L3GD20_FS_2000DPS) { + devp->fullscale = L3GD20_2000DPS; + for(i = 0; i < L3GD20_NUMBER_OF_AXES; i++) { + if(devp->meas_unit == L3GD20_UNIT_DPS) { + devp->sensitivity[i] = L3GD20_SENS_500DPS; + } + else if (devp->meas_unit == L3GD20_UNIT_RPS) { + devp->sensitivity[i] = L3GD20_SENS_500DPS / (2 * PI); + } + else { + devp->sensitivity[i] = 1.0; + } + } + } + else + osalDbgAssert(FALSE, "l3gd20Start(), full scale issue"); + /* This is the Gyroscope transient recovery time */ + osalThreadSleepMilliseconds(10); + + devp->state = L3GD20_READY; +} + +/** + * @brief Deactivates the L3GD20 Complex Driver peripheral. + * + * @param[in] devp pointer to the @p L3GD20Driver object + * + * @api + */ +void l3gd20Stop(L3GD20Driver *devp) { + uint8_t cr1; + osalDbgCheck(devp != NULL); + + osalDbgAssert((devp->state == L3GD20_STOP) || (devp->state == L3GD20_READY), + "l3gd20Stop(), invalid state"); + +#if (L3GD20_USE_SPI) + if (devp->state == L3GD20_STOP) { +#if L3GD20_SHARED_SPI + spiAcquireBus((devp)->config->spip); + spiStart((devp)->config->spip, + (devp)->config->spicfg); +#endif /* L3GD20_SHARED_SPI */ + /* Disabling all axes and enabling power down mode */ + cr1 = 0; + l3gd20SPIWriteRegister(devp->config->spip, L3GD20_AD_CTRL_REG1, + 1, &cr1); + spiStop((devp)->config->spip); +#if L3GD20_SHARED_SPI + spiReleaseBus((devp)->config->spip); +#endif /* L3GD20_SHARED_SPI */ + } +#endif /* L3GD20_USE_SPI */ + devp->state = L3GD20_STOP; +} +/** @} */ diff --git a/os/ex/ST/l3gd20.h b/os/ex/ST/l3gd20.h index 5e7011a76..49b11130e 100644 --- a/os/ex/ST/l3gd20.h +++ b/os/ex/ST/l3gd20.h @@ -35,296 +35,505 @@ /*===========================================================================*/ /** - * @brief L3GD20 number of axes. - */ -#define L3GD20_NUMBER_OF_AXES ((size_t) 3U) - -/*===========================================================================*/ -/* Driver pre-compile time settings. */ -/*===========================================================================*/ - -/** - * @name Configuration options - * @{ - */ -/** - * @brief L3GD20 SPI interface switch. - * @details If set to @p TRUE the support for SPI is included. - * @note The default is @p TRUE. - */ -#if !defined(L3GD20_USE_SPI) || defined(__DOXYGEN__) -#define L3GD20_USE_SPI TRUE -#endif - -/** - * @brief L3GD20 I2C interface switch. - * @details If set to @p TRUE the support for I2C is included. - * @note The default is @p FALSE. - */ -#if !defined(L3GD20_USE_I2C) || defined(__DOXYGEN__) -#define L3GD20_USE_I2C FALSE -#endif - -/** - * @brief L3GD20 shared SPI switch. - * @details If set to @p TRUE the device acquires SPI bus ownership - * on each transaction. - * @note The default is @p FALSE. Requires SPI_USE_MUTUAL_EXCLUSION - */ -#if !defined(L3GD20_SHARED_SPI) || defined(__DOXYGEN__) -#define L3GD20_SHARED_SPI FALSE -#endif - -/** - * @brief Number of acquisitions for bias removal - * @details This is the number of acquisitions performed to compute the - * bias. A repetition is required in order to remove noise. - */ -#if !defined(L3GD20_BIAS_ACQ_TIMES) || defined(__DOXYGEN__) -#define L3GD20_BIAS_ACQ_TIMES 50 -#endif - -/** - * @brief Settling time for bias removal - * @details This is the time between each bias acquisition. - */ -#if !defined(L3GD20_BIAS_SETTLING_uS) || defined(__DOXYGEN__) -#define L3GD20_BIAS_SETTLING_uS 5000 -#endif -/** @} */ - -/*===========================================================================*/ -/* Derived constants and error checks. */ -/*===========================================================================*/ - -#if !(L3GD20_USE_SPI ^ L3GD20_USE_I2C) -#error "L3GD20_USE_SPI and L3GD20_USE_I2C cannot be both true or both false" -#endif - -#if L3GD20_USE_SPI && !HAL_USE_SPI -#error "L3GD20_USE_SPI requires HAL_USE_SPI" -#endif - -#if L3GD20_USE_I2C && !HAL_USE_I2C -#error "L3GD20_USE_I2C requires HAL_USE_I2C" -#endif - -#if L3GD20_SHARED_SPI && !SPI_USE_MUTUAL_EXCLUSION -#error "L3GD20_SHARED_SPI requires SPI_USE_MUTUAL_EXCLUSION" -#endif - -/*===========================================================================*/ -/* Driver data structures and types. */ -/*===========================================================================*/ - -/** - * @name L3GD20 data structures and types - * @{ - */ -/** - * @brief L3GD20 full scale - */ -typedef enum { - L3GD20_FS_250DPS = 0x00, /**< Full scale 250 degree per second. */ - L3GD20_FS_500DPS = 0x10, /**< Full scale 500 degree per second. */ - L3GD20_FS_2000DPS = 0x20 /**< Full scale 2000 degree per second. */ -}l3gd20_fs_t; - -/** - * @brief L3GD20 output data rate and bandwidth - */ -typedef enum { - L3GD20_ODR_95HZ_FC_12_5 = 0x00, /**< ODR 95 Hz, BW 12.5 Hz. */ - L3GD20_ODR_95HZ_FC_25 = 0x10, /**< ODR 95 Hz, BW 25Hz. */ - L3GD20_ODR_190HZ_FC_12_5 = 0x40, /**< ODR 190 Hz, BW 12.5 Hz. */ - L3GD20_ODR_190HZ_FC_25 = 0x50, /**< ODR 190 Hz, BW 25 Hz. */ - L3GD20_ODR_190HZ_FC_50 = 0x60, /**< ODR 190 Hz, BW 50 Hz. */ - L3GD20_ODR_190HZ_FC_70 = 0x70, /**< ODR 190 Hz, BW 70 Hz. */ - L3GD20_ODR_380HZ_FC_20 = 0x80, /**< ODR 380 Hz, BW 20 Hz. */ - L3GD20_ODR_380HZ_FC_25 = 0x90, /**< ODR 380 Hz, BW 25 Hz. */ - L3GD20_ODR_380HZ_FC_50 = 0xA0, /**< ODR 380 Hz, BW 50 Hz. */ - L3GD20_ODR_380HZ_FC_100 = 0xB0, /**< ODR 380 Hz, BW 100 Hz. */ - L3GD20_ODR_760HZ_FC_30 = 0xC0, /**< ODR 760 Hz, BW 30 Hz. */ - L3GD20_ODR_760HZ_FC_35 = 0xD0, /**< ODR 760 Hz, BW 35 Hz. */ - L3GD20_ODR_760HZ_FC_50 = 0xE0, /**< ODR 760 Hz, BW 50 Hz. */ - L3GD20_ODR_760HZ_FC_100 = 0xF0 /**< ODR 760 Hz, BW 100 Hz. */ -}l3gd20_odr_t; - -/** - * @brief L3GD20 axes enabling - */ -typedef enum { - L3GD20_AE_DISABLED = 0x00, /**< All axes disabled. */ - L3GD20_AE_X = 0x01, /**< Only X-axis enabled. */ - L3GD20_AE_Y = 0x02, /**< Only Y-axis enabled. */ - L3GD20_AE_XY = 0x03, /**< X and Y axes enabled. */ - L3GD20_AE_Z = 0x04, /**< Only Z-axis enabled. */ - L3GD20_AE_XZ = 0x05, /**< X and Z axes enabled. */ - L3GD20_AE_YZ = 0x06, /**< Y and Z axes enabled. */ - L3GD20_AE_XYZ = 0x07 /**< All axes enabled. */ -}l3gd20_ae_t; - -/** - * @brief L3GD20 block data update - */ -typedef enum { - L3GD20_BDU_CONTINUOUS = 0x00, /**< Block data continuously updated. */ - L3GD20_BDU_BLOCKED = 0x80 /**< Block data updated after reading. */ -}l3gd20_bdu_t; - -/** - * @brief L3GD20 endianness - */ -typedef enum { - L3GD20_END_LITTLE = 0x00, /**< Little endian. */ - L3GD20_END_BIG = 0x40 /**< Big endian. */ -}l3gd20_end_t; - -/** - * @brief Driver state machine possible states. - */ -typedef enum { - L3GD20_UNINIT = 0, /**< Not initialized. */ - L3GD20_STOP = 1, /**< Stopped. */ - L3GD20_READY = 2, /**< Ready. */ -} l3gd20_state_t; - -/** - * @brief L3GD20 configuration structure. - */ -typedef struct { - -#if (L3GD20_USE_SPI) || defined(__DOXYGEN__) - /** - * @brief SPI driver associated to this L3GD20. - */ - SPIDriver *spip; - /** - * @brief SPI configuration associated to this L3GD20. - */ - const SPIConfig *spicfg; -#endif /* L3GD20_USE_SPI */ -#if (L3GD20_USE_I2C) || defined(__DOXYGEN__) - /** - * @brief I2C driver associated to this L3GD20. - */ - I2CDriver *i2cp; - /** - * @brief I2C configuration associated to this L3GD20. - */ - const I2CConfig *i2ccfg; -#endif /* L3GD20_USE_I2C */ - /** - * @brief L3GD20 full scale value. - */ - l3gd20_fs_t fullscale; - /** - * @brief L3GD20 output data rate selection. - */ - l3gd20_odr_t outputdatarate; - /** - * @brief L3GD20 axes enabling. - */ - l3gd20_ae_t axesenabling; - /** - * @brief L3GD20 block data update. - */ - l3gd20_bdu_t blockdataupdate; - /** - * @brief L3GD20 endianness. - */ - l3gd20_end_t endianness; -} L3GD20Config; - -/** - * @brief Structure representing a L3GD20 driver. - */ -typedef struct L3GD20Driver L3GD20Driver; - -/** - * @brief @p L3GD20 specific methods. - */ -#define _l3gd20_methods \ - _base_gyroscope_methods \ - /* Retrieve the temperature of L3GD20 chip.*/ \ - msg_t (*get_temperature)(void *instance, float* temperature); - - -/** - * @extends BaseGyroscopeVMT - * - * @brief @p L3GD20 virtual methods table. - */ -struct L3GD20VMT { - _l3gd20_methods -}; - -/** - * @brief @p L3GD20Driver specific data. - */ -#define _l3gd20_data \ - _base_gyroscope_data \ - /* Driver state.*/ \ - l3gd20_state_t state; \ - /* Current configuration data.*/ \ - const L3GD20Config *config; \ - /* Current sensitivity.*/ \ - float sensitivity[L3GD20_NUMBER_OF_AXES]; \ - /* Bias data.*/ \ - int32_t bias[L3GD20_NUMBER_OF_AXES]; - -/** - * @extends BaseGyroscope - * - * @brief L3GD20 3-axis gyroscope class. - * @details This class extends @p BaseGyroscope by adding physical - * driver implementation. - */ -struct L3GD20Driver { - /** @brief BaseSensor Virtual Methods Table. */ - const struct BaseSensorVMT *vmt_basesensor; - /** @brief BaseGyroscope Virtual Methods Table. */ - const struct BaseGyroscopeVMT *vmt_basegyroscope; - /** @brief L3GD20 Virtual Methods Table. */ - const struct L3GD20VMT *vmt_l3gd20; - _l3gd20_data -}; -/** @} */ - -/*===========================================================================*/ -/* Driver macros. */ -/*===========================================================================*/ - -/** - * @brief Get current MEMS temperature. - * @detail This information is very useful especially for high accuracy IMU - * - * @param[in] ip pointer to a @p BaseGyroscope class. - * @param[out] temp the MEMS temperature as single precision floating. - * - * @return The operation status. - * @retval MSG_OK if the function succeeded. - * @retval MSG_RESET if one or more errors occurred. - * @api - */ -#define gyroscopeGetTemp(ip, tpp) \ - (ip)->vmt_l3gd20->get_temperature(ip, tpp) - -/*===========================================================================*/ -/* External declarations. */ -/*===========================================================================*/ - -#ifdef __cplusplus -extern "C" { -#endif - void l3gd20ObjectInit(L3GD20Driver *devp); - void l3gd20Start(L3GD20Driver *devp, const L3GD20Config *config); - void l3gd20Stop(L3GD20Driver *devp); -#ifdef __cplusplus -} -#endif - -#endif /* _L3GD20_H_ */ - -/** @} */ - + * @brief L3GD20 characteristics + */ +#define L3GD20_NUMBER_OF_AXES 3U + +#define L3GD20_250DPS 250.0f +#define L3GD20_500DPS 500.0f +#define L3GD20_2000DPS 2000.0f + +#define L3GD20_SENS_250DPS 0.00875f +#define L3GD20_SENS_500DPS 0.01750f +#define L3GD20_SENS_2000DPS 0.07000f +/** @} */ + +/** + * @name L3GD20 communication interfaces related bit masks + * @{ + */ +#define L3GD20_DI_MASK 0xFF /**< Data In mask */ +#define L3GD20_DI(n) (1 << n) /**< Data In bit n */ +#define L3GD20_AD_MASK 0x3F /**< Address Data mask */ +#define L3GD20_AD(n) (1 << n) /**< Address Data bit n */ +#define L3GD20_MS (1 << 6) /**< Multiple read write */ +#define L3GD20_RW (1 << 7) /**< Read Write selector */ +/** @} */ + +/** + * @name L3GD20 register addresses + * @{ + */ +#define L3GD20_AD_WHO_AM_I 0x0F +#define L3GD20_AD_CTRL_REG1 0x20 +#define L3GD20_AD_CTRL_REG2 0x21 +#define L3GD20_AD_CTRL_REG3 0x22 +#define L3GD20_AD_CTRL_REG4 0x23 +#define L3GD20_AD_CTRL_REG5 0x24 +#define L3GD20_AD_REFERENCE 0x25 +#define L3GD20_AD_OUT_TEMP 0x26 +#define L3GD20_AD_STATUS_REG 0x27 +#define L3GD20_AD_OUT_X_L 0x28 +#define L3GD20_AD_OUT_X_H 0x29 +#define L3GD20_AD_OUT_Y_L 0x2A +#define L3GD20_AD_OUT_Y_H 0x2B +#define L3GD20_AD_OUT_Z_L 0x2C +#define L3GD20_AD_OUT_Z_H 0x2D +#define L3GD20_AD_FIFO_CTRL_REG 0x2E +#define L3GD20_AD_FIFO_SRC_REG 0x2F +#define L3GD20_AD_INT1_CFG 0x30 +#define L3GD20_AD_INT1_SRC 0x31 +#define L3GD20_AD_INT1_TSH_XH 0x32 +#define L3GD20_AD_INT1_TSH_XL 0x33 +#define L3GD20_AD_INT1_TSH_YH 0x34 +#define L3GD20_AD_INT1_TSH_YL 0x35 +#define L3GD20_AD_INT1_TSH_ZH 0x36 +#define L3GD20_AD_INT1_TSH_ZL 0x37 +#define L3GD20_AD_INT1_DURATION 0x38 +/** @} */ + +/** + * @name L3GD20_CTRL_REG1 register bits definitions + * @{ + */ +#define L3GD20_CTRL_REG1_MASK 0xFF /**< L3GD20_CTRL_REG1 mask */ +#define L3GD20_CTRL_REG1_XEN (1 << 0) /**< X axis enable */ +#define L3GD20_CTRL_REG1_YEN (1 << 1) /**< Y axis enable */ +#define L3GD20_CTRL_REG1_ZEN (1 << 2) /**< Z axis enable */ +#define L3GD20_CTRL_REG1_PD (1 << 3) /**< Power-down mode enable */ +#define L3GD20_CTRL_REG1_BW0 (1 << 4) /**< Bandwidth bit 0 */ +#define L3GD20_CTRL_REG1_BW1 (1 << 5) /**< Bandwidth bit 1 */ +#define L3GD20_CTRL_REG1_DR0 (1 << 6) /**< Output data rate bit 0 */ +#define L3GD20_CTRL_REG1_DR1 (1 << 7) /**< Output data rate bit 1 */ +/** @} */ + +/** + * @name L3GD20_CTRL_REG2 register bits definitions + * @{ + */ +#define L3GD20_CTRL_REG2_MASK 0x3F /**< L3GD20_CTRL_REG2 mask */ +#define L3GD20_CTRL_REG2_HPCF0 (1 << 0) /**< HP filter cutoff bit 0 */ +#define L3GD20_CTRL_REG2_HPCF1 (1 << 1) /**< HP filter cutoff bit 1 */ +#define L3GD20_CTRL_REG2_HPCF2 (1 << 2) /**< HP filter cutoff bit 2 */ +#define L3GD20_CTRL_REG2_HPCF3 (1 << 3) /**< HP filter cutoff bit 3 */ +#define L3GD20_CTRL_REG2_HPM0 (1 << 4) /**< HP filter mode bit 0 */ +#define L3GD20_CTRL_REG2_HPM1 (1 << 5) /**< HP filter mode bit 1 */ +/** @} */ + +/** + * @name L3GD20_CTRL_REG3 register bits definitions + * @{ + */ +#define L3GD20_CTRL_REG3_MASK 0xFF /**< L3GD20_CTRL_REG3 mask */ +#define L3GD20_CTRL_REG3_I2_EMPTY (1 << 0) /**< FIFO empty IRQ */ +#define L3GD20_CTRL_REG3_I2_ORUN (1 << 1) /**< FIFO overrun IRQ */ +#define L3GD20_CTRL_REG3_I2_WTM (1 << 2) /**< FIFO watermark IRQ */ +#define L3GD20_CTRL_REG3_I2_DRDY (1 << 3) /**< Data ready */ +#define L3GD20_CTRL_REG3_PP_OD (1 << 4) /**< Push-pull / Open Drain */ +#define L3GD20_CTRL_REG3_H_LACTIVE (1 << 5) /**< IRQ active */ +#define L3GD20_CTRL_REG3_I1_BOOT (1 << 6) /**< Boot status available */ +#define L3GD20_CTRL_REG3_I1_INT1 (1 << 7) /**< IRQ enable */ +/** @} */ + +/** + * @name L3GD20_CTRL_REG4 register bits definitions + * @{ + */ +#define L3GD20_CTRL_REG4_MASK 0xF1 /**< L3GD20_CTRL_REG4 mask */ +#define L3GD20_CTRL_REG4_SIM (1 << 0) /**< SPI mode */ +#define L3GD20_CTRL_REG4_FS_MASK (3 << 4) /**< Full scale mask */ +#define L3GD20_CTRL_REG4_FS0 (1 << 4) /**< Full scale bit 0 */ +#define L3GD20_CTRL_REG4_FS1 (1 << 5) /**< Full scale bit 1 */ +#define L3GD20_CTRL_REG4_BLE (1 << 6) /**< Big/little endian data */ +#define L3GD20_CTRL_REG4_BDU (1 << 7) /**< Block data update */ +/** @} */ + +/** + * @name L3GD20_CTRL_REG5 register bits definitions + * @{ + */ +#define L3GD20_CTRL_REG5_MASK 0xDF /**< L3GD20_CTRL_REG5 mask */ +#define L3GD20_CTRL_REG5_OUT_SEL0 (1 << 0) /**< Out selection bit 0 */ +#define L3GD20_CTRL_REG5_OUT_SEL1 (1 << 1) /**< Out selection bit 1 */ +#define L3GD20_CTRL_REG5_INT1_SEL0 (1 << 2) /**< INT1 selection bit 0 */ +#define L3GD20_CTRL_REG5_INT1_SEL1 (1 << 3) /**< INT1 selection bit 1 */ +#define L3GD20_CTRL_REG5_HPEN (1 << 4) /**< HP filter enable */ +#define L3GD20_CTRL_REG5_FIFO_EN (1 << 6) /**< FIFO enable */ +#define L3GD20_CTRL_REG5_BOOT (1 << 7) /**< Reboot memory content */ +/** @} */ + +/*===========================================================================*/ +/* Driver pre-compile time settings. */ +/*===========================================================================*/ + +/** + * @name Configuration options + * @{ + */ +/** + * @brief L3GD20 SPI interface switch. + * @details If set to @p TRUE the support for SPI is included. + * @note The default is @p TRUE. + */ +#if !defined(L3GD20_USE_SPI) || defined(__DOXYGEN__) +#define L3GD20_USE_SPI TRUE +#endif + +/** + * @brief L3GD20 I2C interface switch. + * @details If set to @p TRUE the support for I2C is included. + * @note The default is @p FALSE. + */ +#if !defined(L3GD20_USE_I2C) || defined(__DOXYGEN__) +#define L3GD20_USE_I2C FALSE +#endif + +/** + * @brief L3GD20 advanced configurations switch. + * @details If set to @p TRUE more configurations are available. + * @note The default is @p FALSE. + */ +#if !defined(L3GD20_USE_ADVANCED) || defined(__DOXYGEN__) +#define L3GD20_USE_ADVANCED FALSE +#endif + +/** + * @brief L3GD20 shared SPI switch. + * @details If set to @p TRUE the device acquires SPI bus ownership + * on each transaction. + * @note The default is @p FALSE. Requires SPI_USE_MUTUAL_EXCLUSION + */ +#if !defined(L3GD20_SHARED_SPI) || defined(__DOXYGEN__) +#define L3GD20_SHARED_SPI FALSE +#endif + +/** + * @brief Number of acquisitions for bias removal + * @details This is the number of acquisitions performed to compute the + * bias. A repetition is required in order to remove noise. + */ +#if !defined(L3GD20_BIAS_ACQ_TIMES) || defined(__DOXYGEN__) +#define L3GD20_BIAS_ACQ_TIMES 50 +#endif + +/** + * @brief Settling time for bias removal + * @details This is the time between each bias acquisition. + */ +#if !defined(L3GD20_BIAS_SETTLING_uS) || defined(__DOXYGEN__) +#define L3GD20_BIAS_SETTLING_uS 5000 +#endif +/** @} */ + +/*===========================================================================*/ +/* Derived constants and error checks. */ +/*===========================================================================*/ + +#if !(L3GD20_USE_SPI ^ L3GD20_USE_I2C) +#error "L3GD20_USE_SPI and L3GD20_USE_I2C cannot be both true or both false" +#endif + +#if L3GD20_USE_SPI && !HAL_USE_SPI +#error "L3GD20_USE_SPI requires HAL_USE_SPI" +#endif + +#if L3GD20_USE_I2C && !HAL_USE_I2C +#error "L3GD20_USE_I2C requires HAL_USE_I2C" +#endif + +#if L3GD20_SHARED_SPI && !SPI_USE_MUTUAL_EXCLUSION +#error "L3GD20_SHARED_SPI requires SPI_USE_MUTUAL_EXCLUSION" +#endif + +/*===========================================================================*/ +/* Driver data structures and types. */ +/*===========================================================================*/ + +/** + * @name L3GD20 data structures and types. + * @{ + */ +/** + * @brief L3GD20 full scale. + */ +typedef enum { + L3GD20_FS_250DPS = 0x00, /**< Full scale 250 degree per second. */ + L3GD20_FS_500DPS = 0x10, /**< Full scale 500 degree per second. */ + L3GD20_FS_2000DPS = 0x20 /**< Full scale 2000 degree per second. */ +}l3gd20_fs_t; + +/** + * @brief L3GD20 output data rate and bandwidth. + */ +typedef enum { + L3GD20_ODR_95HZ = 0x00, /**< Output data rate 95 Hz. */ + L3GD20_ODR_190HZ = 0x40, /**< Output data rate 190 Hz. */ + L3GD20_ODR_380HZ = 0x80, /**< Output data rate 380 Hz. */ + L3GD20_ODR_760HZ = 0xC0 /**< Output data rate 760 Hz. */ +}l3gd20_odr_t; + +/** + * @brief L3GD20 low pass filter 1 bandwidth. + */ +typedef enum { + L3GD20_BW0 = 0x00, /**< LPF1 bandwidth. Depends on ODR. */ + L3GD20_BW1 = 0x40, /**< LPF1 bandwidth. Depends on ODR. */ + L3GD20_BW2 = 0x80, /**< LPF1 bandwidth. Depends on ODR. */ + L3GD20_BW3 = 0xC0 /**< LPF1 bandwidth. Depends on ODR. */ +}l3gd20_bw_t; +/** + * @brief L3GD20 block data update. + */ +typedef enum { + L3GD20_BDU_CONTINUOUS = 0x00, /**< Block data continuously updated. */ + L3GD20_BDU_BLOCKED = 0x80 /**< Block data updated after reading. */ +}l3gd20_bdu_t; + +/** + * @brief L3GD20 HP filter mode. + */ +typedef enum { + L3GD20_HPM_NORMAL = 0x00, /**< Normal mode. */ + L3GD20_HPM_REFERENCE = 0x10, /**< Reference signal for filtering. */ + L3GD20_HPM_AUTORESET = 0x30, /**< Autoreset on interrupt event. */ + L3GD20_HPM_BYPASSED = 0xFF /**< HP filter bypassed */ +}l3gd20_hpm_t; + +/** + * @brief L3GD20 HP configuration. + */ +typedef enum { + L3GD20_HPCF_0 = 0x00, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_1 = 0x01, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_2 = 0x02, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_3 = 0x03, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_4 = 0x04, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_5 = 0x05, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_6 = 0x06, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_7 = 0x07, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_8 = 0x08, /**< Depends on ODR (Table 26 for more).*/ + L3GD20_HPCF_9 = 0x09 /**< Depends on ODR (Table 26 for more).*/ +}l3gd20_hpcf_t; + +/** + * @brief L3GD20 LP2 filter mode. + * @detail To activate LP2 HP should be active + */ +typedef enum { + L3GD20_LP2M_ON = 0x00, /**< LP2 filter activated. */ + L3GD20_LP2M_BYPASSED = 0xFF, /**< LP2 filter bypassed. */ +}l3gd20_lp2m_t; + +/** + * @brief L3GD20 endianness. + */ +typedef enum { + L3GD20_END_LITTLE = 0x00, /**< Little endian. */ + L3GD20_END_BIG = 0x40 /**< Big endian. */ +}l3gd20_end_t; + +/** + * @brief L3GD20 measurement unit. + */ +typedef enum { + L3GD20_UNIT_DPS = 0x00, /**< Cooked data in degrees per seconds.*/ + L3GD20_UNIT_RPS = 0x01, /**< Cooked data in radians per seconds.*/ +} l3gd20_unit_t; + +/** + * @brief Driver state machine possible states. + */ +typedef enum { + L3GD20_UNINIT = 0, /**< Not initialized. */ + L3GD20_STOP = 1, /**< Stopped. */ + L3GD20_READY = 2, /**< Ready. */ +} l3gd20_state_t; + +/** + * @brief L3GD20 configuration structure. + */ +typedef struct { + +#if L3GD20_USE_SPI || defined(__DOXYGEN__) + /** + * @brief SPI driver associated to this L3GD20. + */ + SPIDriver *spip; + /** + * @brief SPI configuration associated to this L3GD20. + */ + const SPIConfig *spicfg; +#endif /* L3GD20_USE_SPI */ +#if L3GD20_USE_I2C || defined(__DOXYGEN__) + /** + * @brief I2C driver associated to this L3GD20. + */ + I2CDriver *i2cp; + /** + * @brief I2C configuration associated to this L3GD20. + */ + const I2CConfig *i2ccfg; +#endif /* L3GD20_USE_I2C */ + /** + * @brief L3GD20 initial sensitivity. + */ + float sensitivity[L3GD20_NUMBER_OF_AXES]; + /** + * @brief L3GD20 initial bias. + */ + float bias[L3GD20_NUMBER_OF_AXES]; + /** + * @brief L3GD20 initial full scale value. + */ + l3gd20_fs_t fullscale; + /** + * @brief L3GD20 output data rate selection. + */ + l3gd20_odr_t outputdatarate; +#if L3GD20_USE_ADVANCED || defined(__DOXYGEN__) + /** + * @brief L3GD20 block data update. + */ + l3gd20_bdu_t blockdataupdate; + /** + * @brief L3GD20 endianness. + */ + l3gd20_end_t endianness; + /** + * @brief L3GD20 LP1 filter bandwidth. + */ + l3gd20_bw_t bandwidth; + /** + * @brief L3GD20 HP filter mode. + */ + l3gd20_hpm_t hpmode; + /** + * @brief L3GD20 HP configuration. + */ + l3gd20_hpcf_t hpconfiguration; + /** + * @brief L3GD20 LP2 filter mode. + * @detail To activate LP2 HP should be active + */ + l3gd20_lp2m_t lp2mode; +#endif + /** + * @brief L3GD20 initial measurement unit. + */ + l3gd20_unit_t unit; +} L3GD20Config; + +/** + * @brief Structure representing a L3GD20 driver. + */ +typedef struct L3GD20Driver L3GD20Driver; + +/** + * @brief @p L3GD20 specific methods. + */ +#define _l3gd20_methods \ + _base_gyroscope_methods \ + /* Change full scale value of L3GD20 .*/ \ + msg_t (*set_full_scale)(void *instance, l3gd20_fs_t fs); \ + /* Get full scale value of L3GD20 .*/ \ + l3gd20_fs_t (*get_full_scale)(void *instance); \ + /* Change measurement unit of L3GD20 .*/ \ + msg_t (*set_meas_unit)(void *instance, l3gd20_unit_t unit); \ + /* Get measurement unit of L3GD20 .*/ \ + l3gd20_unit_t (*get_meas_unit)(void *instance); + +/** + * @extends BaseGyroscopeVMT + * + * @brief @p L3GD20 virtual methods table. + */ +struct L3GD20VMT { + _l3gd20_methods +}; + +/** + * @brief @p L3GD20Driver specific data. + */ +#define _l3gd20_data \ + _base_gyroscope_data \ + /* Driver state.*/ \ + l3gd20_state_t state; \ + /* Current configuration data.*/ \ + const L3GD20Config *config; \ + /* Current sensitivity data.*/ \ + float sensitivity[L3GD20_NUMBER_OF_AXES]; \ + /* Current Bias data.*/ \ + float bias[L3GD20_NUMBER_OF_AXES]; \ + /* Current full scale value.*/ \ + float fullscale; \ + /* Measurement unit.*/ \ + l3gd20_unit_t meas_unit; + +/** + * @extends BaseGyroscope + * + * @brief L3GD20 3-axis gyroscope class. + * @details This class extends @p BaseGyroscope by adding physical + * driver implementation. + */ +struct L3GD20Driver { + /** @brief BaseSensor Virtual Methods Table. */ + const struct BaseSensorVMT *vmt_basesensor; + /** @brief BaseGyroscope Virtual Methods Table. */ + const struct BaseGyroscopeVMT *vmt_basegyroscope; + /** @brief L3GD20 Virtual Methods Table. */ + const struct L3GD20VMT *vmt_l3gd20; + _l3gd20_data +}; +/** @} */ + +/*===========================================================================*/ +/* Driver macros. */ +/*===========================================================================*/ + +/** + * @brief Change initial fullscale value. + * + * @param[in] ip pointer to a @p BaseGyroscope class. + * @param[in] fs the new full scale value. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more errors occurred. + * @api + */ +#define gyroscopeSetFullScale(ip, fs) \ + (ip)->vmt_l3gd20->set_full_scale(ip, fs) + +/** + * @brief Set gyroscope cooked data measurement unit. + * + * @param[in] ip pointer to a @p BaseGyroscope class. + * @param[in] unit the MEMS measurement unit. + * + * @return The operation status. + * @retval MSG_OK if the function succeeded. + * @retval MSG_RESET if one or more errors occurred. + * @api + */ +#define gyroscopeSetMeasurementUnit(ip, unit) \ + (ip)->vmt_l3gd20->set_meas_unit(ip, unit) + +/*===========================================================================*/ +/* External declarations. */ +/*===========================================================================*/ + +#ifdef __cplusplus +extern "C" { +#endif + void l3gd20ObjectInit(L3GD20Driver *devp); + void l3gd20Start(L3GD20Driver *devp, const L3GD20Config *config); + void l3gd20Stop(L3GD20Driver *devp); +#ifdef __cplusplus +} +#endif + +#endif /* _L3GD20_H_ */ + +/** @} */ + diff --git a/testhal/STM32/STM32F3xx/SPI-L3GD20/halconf.h b/testhal/STM32/STM32F3xx/SPI-L3GD20/halconf.h index c0869ead6..d282c6dac 100644 --- a/testhal/STM32/STM32F3xx/SPI-L3GD20/halconf.h +++ b/testhal/STM32/STM32F3xx/SPI-L3GD20/halconf.h @@ -139,7 +139,7 @@ * @brief Enables the SERIAL subsystem. */ #if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__) -#define HAL_USE_SERIAL TRUE +#define HAL_USE_SERIAL FALSE #endif /** diff --git a/testhal/STM32/STM32F3xx/SPI-L3GD20/mcuconf.h b/testhal/STM32/STM32F3xx/SPI-L3GD20/mcuconf.h index eb57e03bd..95a73c063 100644 --- a/testhal/STM32/STM32F3xx/SPI-L3GD20/mcuconf.h +++ b/testhal/STM32/STM32F3xx/SPI-L3GD20/mcuconf.h @@ -192,7 +192,7 @@ /* * SERIAL driver system settings. */ -#define STM32_SERIAL_USE_USART1 TRUE +#define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE