andreika-git
/
ChibiOS
mirror of https://github.com/andreika-git/ChibiOS.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6916 35acf78f-673a-0410-8e92-d51de3d6d3f4

This commit is contained in:
gdisirio 2014-05-07 08:11:03 +00:00
parent 4afa0b98df b43c71424d
commit bec915e052
2978 changed files with 145719 additions and 592698 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
.project
View File

@ -1,11 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>ChibiOS-RT (whole tree)</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
</buildSpec>
<natures>
</natures>
</projectDescription>

73
boards/ARDUINO/board.c
View File

@ -1,73 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
#if defined(PORTH)
{VAL_PORTH, VAL_DDRH},
#endif
#if defined(PORTJ)
{VAL_PORTJ, VAL_DDRJ},
#endif
#if defined(PORTK)
{VAL_PORTK, VAL_DDRK},
#endif
#if defined(PORTL)
{VAL_PORTL, VAL_DDRL},
#endif
};
#endif /* HAL_USE_PAL */
/**
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* External interrupts setup, all disabled initially.
*/
EICRA = 0x00;
EIMSK = 0x00;
}

86
boards/ARDUINO/board.h
View File

@ -1,86 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for the Arduino Mega board.
*/
/*
* Board identifier.
*/
#define BOARD_ARDUINO
#define BOARD_NAME "Arduino"
/* All inputs with pull-ups */
#define VAL_DDRA 0x00
#define VAL_PORTA 0xFF
/* All inputs except PB5 which has a LED connected */
#define VAL_DDRB 0x20
#define VAL_PORTB 0xFF
/* All inputs with pull-ups */
#define VAL_DDRC 0x00
#define VAL_PORTC 0xFF
/* All inputs with pull-ups */
#define VAL_DDRD 0x00
#define VAL_PORTD 0xFF
/* All inputs except PE1 (Serial TX0) */
#define VAL_DDRE 0x02
#define VAL_PORTE 0xFF
/* All inputs with pull-ups */
#define VAL_DDRF 0x00
#define VAL_PORTF 0xFF
/* All inputs with pull-ups */
#define VAL_DDRG 0x00
#define VAL_PORTG 0xFF
/* All inputs with pull-ups */
#define VAL_DDRH 0x00
#define VAL_PORTH 0xFF
/* All inputs with pull-ups */
#define VAL_DDRJ 0x00
#define VAL_PORTJ 0xFF
/* All inputs with pull-ups */
#define VAL_DDRK 0x00
#define VAL_PORTK 0xFF
/* All inputs with pull-ups */
#define VAL_DDRL 0x00
#define VAL_PORTL 0xFF
#define PORTB_LED1 5
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ARDUINO/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ARDUINO/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ARDUINO

75
boards/ARDUINO_MEGA/board.c
View File

@ -1,75 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
#if defined(PORTH)
{VAL_PORTH, VAL_DDRH},
#endif
#if defined(PORTJ)
{VAL_PORTJ, VAL_DDRJ},
#endif
#if defined(PORTK)
{VAL_PORTK, VAL_DDRK},
#endif
#if defined(PORTL)
{VAL_PORTL, VAL_DDRL},
#endif
};
#endif /* HAL_USE_PAL */
/**
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* External interrupts setup, all disabled initially.
*/
EICRA = 0x00;
EICRB = 0x00;
EIMSK = 0x00;
}

5
boards/ARDUINO_MEGA/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ARDUINO_MEGA/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ARDUINO_MEGA

54
boards/EA_LPCXPRESSO_11C24/board.c
View File

@ -1,54 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC11C24 EA Board support - Copyright (C) 2013 mike brown
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
lpc111x_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
*/
LPC_IOCON->PIO0_7 = 0xC0; /* Disables pull-up on LED2 output. */
}

5
boards/EA_LPCXPRESSO_11C24/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_11C24/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_11C24

59
boards/EA_LPCXPRESSO_BB_1114/board.c
View File

@ -1,59 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
lpc111x_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
* NOTE: PIO1_2 is associated also to the JTAG, if you need to use JTAG
* you must comment that line first.
*/
LPC_IOCON->PIO0_7 = 0xC0; /* Disables pull-up on LED2 output. */
LPC_IOCON->R_PIO1_2 = 0xC1; /* Disables pull-up on LED3B output
and makes it GPIO1_2. */
LPC_IOCON->PIO1_9 = 0xC0; /* Disables pull-up on LED3R output.*/
LPC_IOCON->PIO1_10 = 0xC0; /* Disables pull-up on LED3G output.*/
}

5
boards/EA_LPCXPRESSO_BB_1114/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1114/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1114

66
boards/EA_LPCXPRESSO_BB_11U14/board.c
View File

@ -1,66 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
lpc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
* NOTE: PIO1_2 is associated also to the JTAG, if you need to use JTAG
* you must comment that line first.
*/
LPC_IOCON->PIO0_7 = 0x80; /* Disables pull-up on LED2 output. */
LPC_IOCON->TRST_PIO0_14 = 0x81; /* Disables pull-up on LED3B output
and makes it GPIO1_2. */
LPC_IOCON->PIO0_21 = 0x80; /* Disables pull-up on LED3R output.*/
LPC_IOCON->PIO0_22 = 0x80; /* Disables pull-up on LED3G output.*/
/* SSP0 mapping.*/
LPC_IOCON->PIO1_29 = 0x81; /* SCK0 without resistors. */
LPC_IOCON->PIO0_8 = 0x81; /* MISO0 without resistors. */
LPC_IOCON->PIO0_9 = 0x81; /* MOSI0 without resistors. */
/* USART mapping.*/
LPC_IOCON->PIO0_18 = 0x81; /* RDX without resistors. */
LPC_IOCON->PIO0_19 = 0x81; /* TDX without resistors. */
}

5
boards/EA_LPCXPRESSO_BB_11U14/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_11U14/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_11U14

59
boards/EA_LPCXPRESSO_BB_1343/board.c
View File

@ -1,59 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
LPC13xx_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
* NOTE: PIO1_2 is associated also to the JTAG, if you need to use JTAG
* you must comment that line first.
*/
LPC_IOCON->PIO0_7 = 0xC0; /* Disables pull-up on LED2 output. */
LPC_IOCON->R_PIO1_2 = 0xC1; /* Disables pull-up on LED3B output
and makes it GPIO1_2. */
LPC_IOCON->PIO1_9 = 0xC0; /* Disables pull-up on LED3R output.*/
LPC_IOCON->PIO1_10 = 0xC0; /* Disables pull-up on LED3G output.*/
}

5
boards/EA_LPCXPRESSO_BB_1343/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1343/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_BB_1343

103
boards/EA_LPCXPRESSO_LPC1769/board.c
View File

@ -1,103 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
{VAL_GPIO4DATA, VAL_GPIO4DIR}
};
#endif
#if HAL_USE_MAC
/*
* Board Ethernet pins configuration.
* ENET_REF_CLK pin must be set before macInit().
*/
static void board_eth_pin_config(void) {
/* Ethernet pin config */
LPC_PINCON->PINSEL2 |= (1UL << 30) | (1UL << 28) | (1UL << 20) | (1UL << 18) \
| (1UL << 16) | (1UL << 8) | (1UL << 2) | (1UL << 0); /* Set Ethernet ENET_REF_CLK P1.15, ENET_RX_ER P1.14,
ENET_RXD1 P1.10, ENET_RXD0 P1.9, ENET_CRS P1.8, ENET_TX_EN P1.4,
ENET_TXD1 P1.1, ENET_TXD0 P1.0 pins. */
LPC_PINCON->PINMODE2 |= (2UL << 30) | (2UL << 28) | (2UL << 20) | (2UL << 18) \
| (2UL << 16) | (2UL << 8) | (2UL << 2) | (2UL << 0); /* Disable pull-up on ENET_REF_CLK P1.15, ENET_RX_ER P1.14,
ENET_RXD1 P1.10, ENET_RXD0 P1.9, ENET_CRS P1.8, ENET_TX_EN P1.4,
ENET_TXD1 P1.1, ENET_TXD0 P1.0 pins. */
LPC_PINCON->PINSEL3 |= (1UL << 2) | (1UL << 0); /* Set ENET_MDIO P1.17, ENET_MDC P1.16 */
LPC_PINCON->PINMODE3 |= (2UL << 2) | (2UL << 0); /* Disable pull-up on ENET_MDIO P1.17, ENET_MDC P1.16 */
}
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
LPC17xx_clock_init();
#if HAL_USE_MAC
board_eth_pin_config();
#endif
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
*/
/* UART0 pin config */
LPC_PINCON->PINSEL0 |= (1UL << 4) | (1UL << 6); /* Set UART0 TXD0 P0.2 and RXD0 P0.3 pins.*/
LPC_PINCON->PINMODE0 |= (2UL << 4) | (2UL << 6); /* Disable pull-up on UART0 TXD0 and RXD0 pins.*/
/* CLKOUT pin config */
/* LPC_PINCON->PINSEL3 |= (1UL << 22); */ /* Set CLKOUT P1.27 pin.*/
/* LPC_PINCON->PINMODE3 |= (2UL << 22); */ /* Disable pull-up on CLKOUT pin. */
/* I2C1 pin config */
LPC_PINCON->PINSEL1 |= (3UL << 8) | (3UL << 6); /* Set I2C1 SCL1 P0.20, SDA1 P0.19 pins. */
LPC_PINCON->PINMODE1 |= (2UL << 8) | (2UL << 6); /* Disable pull-up on I2C1 SCL1 P0.20, SDA1 P0.19 pins. */
LPC_PINCON->PINMODE_OD0 |= (1UL << 20) | (1UL << 19); /* Set I2C1 SCL1 P0.20, SDA1 P0.19 as open drain pins. */
/* DAC pin config */
/* DAC pin set in dac_lld_start() */
#if HAL_USE_CAN
/* CAN config i/o */
LPC_PINCON->PINSEL0 |= (1UL << 2) | (1UL << 0); /* Set CAN1 TD1 P0.1 and RD1 P0.0 pins. */
LPC_PINCON->PINMODE0 |= (2UL << 2) | (2UL << 0); /* Disable pull-up on TD1 and RD1 pins.*/
LPC_PINCON->PINSEL0 |= (2UL << 10) | (2UL << 8); /* Set CAN2 TD2 P0.5 and RD2 P0.4 pins. */
LPC_PINCON->PINMODE0 |= (2UL << 10) | (2UL << 8); /* Disable pull-up on TD1 and RD1 pins.*/
#endif
}

97
boards/EA_LPCXPRESSO_LPC1769/board.h
View File

@ -1,97 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Embedded Artists LPCXpresso LPC1769.
*/
/*
* Board identifiers.
*/
#define BOARD_EA_LPCXPRESSO_1769
#define BOARD_NAME "Embedded Artists LPCXpresso LPC1769"
/*
* Ethernet PHY type.
*/
#define MII_LAN8720_ID 0x0007C0F0
#define BOARD_PHY_ID MII_LAN8720_ID
#define BOARD_PHY_RMII
//#define BOARD_PHY_ADDRESS
#define LPC17xx_HAS_CAN1 TRUE
#define LPC17xx_HAS_CAN2 TRUE
/*
* Board frequencies.
*/
#define MAINOSCCLK 12000000UL
#define RTCOSCCLK 32768UL
/*
* GPIO 0 initial setup.
*/
#define VAL_GPIO0DIR PAL_PORT_BIT(GPIO0_LED2_RED) | \
PAL_PORT_BIT(GPIO0_LED3_EXT)
#define VAL_GPIO0DATA 0x00000000
/*
* GPIO 1 initial setup.
*/
#define VAL_GPIO1DIR 0x00000000
#define VAL_GPIO1DATA 0x00000000
/*
* GPIO 2 initial setup.
*/
#define VAL_GPIO2DIR 0x00000000
#define VAL_GPIO2DATA 0x00000000
/*
* GPIO 3 initial setup.
*/
#define VAL_GPIO3DIR 0x00000000
#define VAL_GPIO3DATA 0x00000000
/*
* GPIO 4 initial setup.
*/
#define VAL_GPIO4DIR 0x00000000
#define VAL_GPIO4DATA 0x00000000
/*
* Pin definitions.
*/
#define GPIO0_LED2_RED 22
#define GPIO0_LED3_EXT 28 /* Connect LED to board. */
#define GPIO2_PIN12_TO_GND 12
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/EA_LPCXPRESSO_LPC1769/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_LPC1769/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_LPC1769

136
boards/EA_LPCXPRESSO_LPC812/board.c
View File

@ -1,136 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {VAL_GPIO0DATA, VAL_GPIO0DIR};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void){
lpc8xx_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void){
/* Enable clocks to IOCON & SWM */
LPC_SYSCON->SYSAHBCLKCTRL |= ((1<<18)|(1<<7));
#if defined VAL_PIO0_0
LPC_IOCON->PIO0_0 = PIN_RSVD|VAL_PIO0_0;
#endif
#if defined VAL_PIO0_1
LPC_IOCON->PIO0_1 = PIN_RSVD|VAL_PIO0_1;
#endif
#if defined VAL_PIO0_2
LPC_IOCON->PIO0_2 = PIN_RSVD|VAL_PIO0_2;
#endif
#if defined VAL_PIO0_3
LPC_IOCON->PIO0_3 = PIN_RSVD|VAL_PIO0_3;
#endif
#if defined VAL_PIO0_4
LPC_IOCON->PIO0_4 = PIN_RSVD|VAL_PIO0_4;
#endif
#if defined VAL_PIO0_5
LPC_IOCON->PIO0_5 = PIN_RSVD|VAL_PIO0_5;
#endif
#if defined VAL_PIO0_6
LPC_IOCON->PIO0_6 = PIN_RSVD|VAL_PIO0_6;
#endif
#if defined VAL_PIO0_7
LPC_IOCON->PIO0_7 = PIN_RSVD|VAL_PIO0_7;
#endif
#if defined VAL_PIO0_8
LPC_IOCON->PIO0_8 = PIN_RSVD|VAL_PIO0_8;
#endif
#if defined VAL_PIO0_9
LPC_IOCON->PIO0_9 = PIN_RSVD|VAL_PIO0_9;
#endif
#if defined VAL_PIO0_10
LPC_IOCON->PIO0_10 = PIN_RSVD|VAL_PIO0_10;
#endif
#if defined VAL_PIO0_11
LPC_IOCON->PIO0_11 = PIN_RSVD|VAL_PIO0_11;
#endif
#if defined VAL_PIO0_12
LPC_IOCON->PIO0_12 = PIN_RSVD|VAL_PIO0_12;
#endif
#if defined VAL_PIO0_13
LPC_IOCON->PIO0_13 = PIN_RSVD|VAL_PIO0_13;
#endif
#if defined VAL_PIO0_14
LPC_IOCON->PIO0_14 = PIN_RSVD|VAL_PIO0_14;
#endif
#if defined VAL_PIO0_15
LPC_IOCON->PIO0_15 = PIN_RSVD|VAL_PIO0_15;
#endif
#if defined VAL_PIO0_16
LPC_IOCON->PIO0_16 = PIN_RSVD|VAL_PIO0_16;
#endif
#if defined VAL_PIO0_17
LPC_IOCON->PIO0_17 = PIN_RSVD|VAL_PIO0_17;
#endif
#if defined VAL_PINASSIGN0
LPC_SWM->PINASSIGN0 = VAL_PINASSIGN0;
#endif
#if defined VAL_PINASSIGN1
LPC_SWM->PINASSIGN1 = VAL_PINASSIGN1;
#endif
#if defined VAL_PINASSIGN2
LPC_SWM->PINASSIGN2 = VAL_PINASSIGN2;
#endif
#if defined VAL_PINASSIGN3
LPC_SWM->PINASSIGN3 = VAL_PINASSIGN3;
#endif
#if defined VAL_PINASSIGN4
LPC_SWM->PINASSIGN4 = VAL_PINASSIGN4;
#endif
#if defined VAL_PINASSIGN5
LPC_SWM->PINASSIGN5 = VAL_PINASSIGN5;
#endif
#if defined VAL_PINASSIGN6
LPC_SWM->PINASSIGN6 = VAL_PINASSIGN6;
#endif
#if defined VAL_PINASSIGN7
LPC_SWM->PINASSIGN7 = VAL_PINASSIGN7;
#endif
#if defined VAL_PINASSIGN8
LPC_SWM->PINASSIGN8 = VAL_PINASSIGN8;
#endif
/* Disable clocks to IOCON & SWM */
LPC_SYSCON->SYSAHBCLKCTRL &= ~((1<<18)|(1<<7));
}

5
boards/EA_LPCXPRESSO_LPC812/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/EA_LPCXPRESSO_LPC812/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/EA_LPCXPRESSO_LPC812

50
boards/MAPLEMINI_STM32_F103/board.c
View File

@ -1,50 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/MAPLEMINI_STM32_F103/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/MAPLEMINI_STM32_F103/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/MAPLEMINI_STM32_F103

61
boards/NGX_BB_LPC11U14/board.c
View File

@ -1,61 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
__inline void __early_init(void) {
lpc_clock_init();
}
/*
* Board-specific initialization code.
*/
__inline void boardInit(void) {
/* LCD */
LPC_IOCON->TMS_PIO0_12 = 0x91; /* LCD_EN: GPIO - pull-up */
LPC_IOCON->TDO_PIO0_13 = 0x81; /* LCD_RW: GPIO - No pull-up */
LPC_IOCON->TRST_PIO0_14 = 0x81; /* LCD_RS: GPIO - No pull-up */
/* USART */
LPC_IOCON->PIO0_18 = 0x81; /* RDX: RXD - No pull-up */
LPC_IOCON->PIO0_19 = 0x81; /* TDX: TXD - No pull-up */
/* Test LEDs */
LPC_IOCON->PIO0_22 = 0x80; /* LED_TEST1: GPIO - No pull-up */
LPC_IOCON->PIO0_23 = 0x80; /* LED_TEST2: GPIO - No pull-up */
}

5
boards/NGX_BB_LPC11U14/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/NGX_BB_LPC11U14/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/NGX_BB_LPC11U14

177
boards/NONSTANDARD_LPC4330_SBC/board.c
View File

@ -1,177 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC4330 SBC board config file - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
{VAL_GPIO4DATA, VAL_GPIO4DIR},
{VAL_GPIO5DATA, VAL_GPIO5DIR}
};
#endif
/*
* Board Ethernet pins configuration.
* ENET_REF_CLK pin must be set before macInit().
*/
static void board_eth_pin_config(void) {
/* Ethernet I/O config */
LPC_SCU->SFSP0_0 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x02; /* Set ENET RXD1 P0.0, disable pull-up resistor.*/
LPC_SCU->SFSP0_1 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x06; /* Set ENET TX EN P0.1, disable pull-up resistor.*/
LPC_SCU->SFSP1_15 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x03; /* Set ENET RXD0 P1.15, disable pull-up resistor.*/
LPC_SCU->SFSP1_16 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x07; /* Set ENET CRS P1.16, disable pull-up resistor.*/
LPC_SCU->SFSP1_17 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x03; /* Set ENET MDIO P1.17, disable pull-up resistor.*/
LPC_SCU->SFSP1_18 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x03; /* Set ENET TXD0 P1.18, disable pull-up resistor.*/
LPC_SCU->SFSP1_19 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x00; /* Set ENET REF CLK P1.19, disable pull-up resistor.*/
LPC_SCU->SFSP1_20 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x03; /* Set ENET TXD1 P1.20, disable pull-up resistor.*/
LPC_SCU->SFSP7_7 = (1 << 7) | (1 << 5) | (1 << 6) | (1 << 4) | 0x06; /* Set ENET MDC P7.7, disable pull-up resistor.*/
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
#ifdef RESET_ON_RESTART_DEBUG
uint32_t i;
__disable_irq();
/* Reset peripherals. */
LPC_RGU->RESET_CTRL0 = 0x10DF1000;
LPC_RGU->RESET_CTRL1 = 0x01DFF7FF;
for (i = 0; i < 8; i++) {
NVIC->ICPR[i] = 0xFFFFFFFF; /* Clear pending interrupts in the NVIC. */
}
__enable_irq();
#endif
lpc_clock_init();
#if HAL_USE_MAC
board_eth_pin_config();
#endif
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
*/
/* UART3 I/O config */
LPC_SCU->SFSP2_3 = (1 << 4) | 0x02; /* Set UART3 TXD3 P2.3, disable pull-up resistor.*/
LPC_SCU->SFSP2_4 = (1 << 6) | (1 << 4) | 0x02; /* Set UART3 RXD3 P2.4, disable pull-up resistor.*/
/* SD card SSP1 I/O config */
LPC_SCU->SFSPF_4 = (1 << 4) | 0x00; /* Set SSP1 SCK PF.4, disable pull-up resistor.*/
LPC_SCU->SFSP1_3 = (1 << 6) | (1 << 4) | 0x05; /* Set SSP1 MISO P1.3, disable pull-up resistor.*/
LPC_SCU->SFSP1_4 = (1 << 4) | 0x05; /* Set SSP1 MOSI P1.4, disable pull-up resistor.*/
LPC_SCU->SFSP3_1 = (1 << 4) | 0x04; /* Set SSP1 CS GPIO P3.1, disable pull-up resistor.*/
/* I2C0 I/O config */
//LPC_SCU->SFSI2C0 = (1 << 11) | (1 << 3); /* Set I2C0 SDA and SCL, standard/fast mode, enable the input receiver.*/
/* I/O for switches config */
LPC_SCU->SFSP7_5 = (1 << 6) | (1 << 4); /* Set SW_1 P7.5, enable input buffer, disable pull-up resistor.*/
LPC_SCU->SFSP7_6 = (1 << 6) | (1 << 4); /* Set SW_2 P7.6, enable input buffer, disable pull-up resistor.*/
/* I2S0 I/O config */
//LPC_SCU->SFSP3_0 = (1 << 4) | 0x03; /* Set I2S0 TX MCLK P3.0, disable pull-up resistor.*/
//LPC_SCU->SFSP3_2 = (1 << 4) | 0x01; /* Set I2S0 RX SDA P3.2, disable pull-up resistor.*/
//LPC_SCU->SFSP4_7 = (1 << 4) | 0x07; /* Set I2S0 TX SCK P4.7, disable pull-up resistor.*/
//LPC_SCU->SFSP7_1 = (1 << 4) | 0x02; /* Set I2S0 TX WS P7.1, disable pull-up resistor.*/
//LPC_SCU->SFSP7_2 = (1 << 4) | 0x02; /* Set I2S0 TX SDA P7.2, disable pull-up resistor.*/
/* SDRAM I/O config */
/* Address lines */
//LPC_SCU->SFSP2_9 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A0 P2.9, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_10 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A1 P2.10, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_11 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A2 P2.11, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_12 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A3 P2.12, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_13 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A4 P2.13, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP1_0 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A5 P1.0, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP1_1 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A6 P1.1, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP1_2 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A7 P1.2, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_8 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A8 P2.8, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_7 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC A9 P2.9, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_6 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A10 P2.6, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_2 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A11 P2.2, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_1 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A12 P2.1, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP2_0 = (1 << 7) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC A13 P2.0, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_8 = (1 << 7) | (1 << 5) | (1 << 4) | 0x01; /* Set EMC A14 P2.13, disable glitch filter, fast mode, disable pull-up resistor.*/
/* Data lines */
//LPC_SCU->SFSP1_7 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D0 P1.7, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_8 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D1 P1.8, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_9 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D2 P1.9, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_10 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D3 P1.10, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_11 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D4 P1.11, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_12 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D5 P1.12, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_13 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D6 P1.13, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_14 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC D7 P1.14, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_4 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D8 P5.4, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_5 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D9 P5.5, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_6 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D10 P5.6, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_7 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D11 P5.7, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_0 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D12 P5.0, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_1 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D13 P5.1, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_2 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D14 P5.2, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP5_3 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x02; /* Set EMC D15 P5.3, disable glitch filter, fast mode, input buffer, disable pull-up resistor.*/
//LPC_SCU->SFSP1_6 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC WE P1.6, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSCLK_0 = (1 << 7) | (1 << 5) | (1 << 4) | 0x00; /* Set EMC CLK0, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSCLK_2 = (1 << 7) | (1 << 5) | (1 << 4) | 0x00; /* Set EMC CLK2, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->EMCDELAYCLK = 0; /* No clock delay.*/
//LPC_SCU->SFSP6_4 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC CAS P6.4, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_5 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC RAS P6.5, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_11 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC CKEOUT0 P6.11, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_12 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC DQMOUT0 P6.12, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_10 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC DQMOUT1 P6.10, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP6_9 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set EMC DYCS0 P6.9, disable glitch filter, fast mode, disable pull-up resistor.*/
/* SPIFI I/O config */
//LPC_SCU->SFSP3_3 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI SCK P3.3, disable glitch filter, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP3_4 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI SIO3 P3.4, disable glitch filter, input buffer, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP3_5 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI SIO2 P3.5, disable glitch filter, input buffer, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP3_6 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI SIO1 P3.6, disable glitch filter, input buffer, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP3_7 = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI SIO0 P3.7, disable glitch filter, input buffer, fast mode, disable pull-up resistor.*/
//LPC_SCU->SFSP3_8 = (1 << 7) | (1 << 5) | (1 << 4) | 0x03; /* Set SPIFI CS P3.8, disable glitch filter, fast mode, disable pull-up resistor.*/
/* DAC I/O config */
/* No need configuration. */
}

115
boards/NONSTANDARD_LPC4330_SBC/board.h
View File

@ -1,115 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
LPC4330 SBC board config file - Copyright (C) 2013 Marcin Jokel
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for non standard board LPC4330 SBC.
*/
/*
* Board identifiers.
*/
#define BOARD_NONSTANDARD_LPC4330_SBC
#define BOARD_NAME "LPC4330 SBC"
#define RESET_ON_RESTART_DEBUG /* Only for debug. */
/*
* Ethernet PHY type.
*/
#define MII_KSZ8031_ID 0x00221556
#define BOARD_PHY_ID MII_KSZ8031_ID
#define BOARD_PHY_RMII
/*
* Board frequencies.
*/
#define XTAL 12000000UL
#define RTC_XTAL 32768UL
#define ENET_RX_CLK 50000000UL
#define ENET_TX_CLK 50000000UL
/*
* GPIO 0 initial setup.
*/
#define VAL_GPIO0DIR 0x00000000
#define VAL_GPIO0DATA 0x00000000
/*
* GPIO 1 initial setup.
*/
#define VAL_GPIO1DIR 0x00000000
#define VAL_GPIO1DATA 0x00000000
/*
* GPIO 2 initial setup.
*/
#define VAL_GPIO2DIR PAL_PORT_BIT(GPIO2_LED)
#define VAL_GPIO2DATA PAL_PORT_BIT(GPIO2_LED)
/*
* GPIO 3 initial setup.
*/
#define VAL_GPIO3DIR 0x00000000
#define VAL_GPIO3DATA 0x00000000
/*
* GPIO 4 initial setup.
*/
#define LPC_HAS_GPIO4 TRUE
#define VAL_GPIO4DIR 0x00000000
#define VAL_GPIO4DATA 0x00000000
/*
* GPIO 5 initial setup.
*/
#define VAL_GPIO5DIR PAL_PORT_BIT(GPIO5_SD_CS)
#define VAL_GPIO5DATA PAL_PORT_BIT(GPIO5_SD_CS)
/*
* GPIO 6 initial setup.
*/
#define LPC_HAS_GPIO6 FALSE
/*
* GPIO 7 initial setup.
*/
#define LPC_HAS_GPIO7 FALSE
/*
* Pin definitions.
*/
#define GPIO2_LED 0
#define GPIO3_SW_USER1 13
#define GPIO3_SW_USER2 14
#define GPIO5_SD_CS 8
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/NONSTANDARD_LPC4330_SBC/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/NONSTANDARD_LPC4330_SBC/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/NONSTANDARD_LPC4330_SBC

83
boards/NONSTANDARD_STM32F4_BARTHESS1/board.c
View File

@ -1,83 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}
#if HAL_USE_SDC
/**
* @brief Insertion monitor function.
*
* @param[in] sdcp pointer to the @p SDCDriver object
*
* @notapi
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
return !palReadPad(GPIOE, GPIOE_SDIO_DETECT);
}
/**
* @brief Protection detection.
* @note Not supported, always not protected.
*
* @param[in] sdcp pointer to the @p SDCDriver object
*
* @notapi
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif /* HAL_USE_SDC */

5
boards/NONSTANDARD_STM32F4_BARTHESS1/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1/board.c
# Required include directories
BOARDINC = $(CHIBIOS)/boards/NONSTANDARD_STM32F4_BARTHESS1

79
boards/OLIMEX_AVR_CAN/board.c
View File

@ -1,79 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
};
#endif /* HAL_USE_PAL */
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* External interrupts setup, all disabled initially.
*/
EICRA = 0x00;
EICRB = 0x00;
EIMSK = 0x00;
/*
* Enables Idle mode for SLEEP instruction.
*/
SMCR = (1 << SE);
/*
* Timer 0 setup.
*/
TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
(0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
(0 << CS02) | (1 << CS01) | (1 << CS00); /* CLK/64 clock. */
OCR0A = F_CPU / 64 / CH_FREQUENCY - 1;
TCNT0 = 0; /* Reset counter. */
TIFR0 = (1 << OCF0A); /* Reset pending. */
TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
}

5
boards/OLIMEX_AVR_CAN/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_AVR_CAN/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_AVR_CAN

63
boards/OLIMEX_AVR_MT_128/board.c
View File

@ -1,63 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(PORTA)
{VAL_PORTA, VAL_DDRA},
#endif
#if defined(PORTB)
{VAL_PORTB, VAL_DDRB},
#endif
#if defined(PORTC)
{VAL_PORTC, VAL_DDRC},
#endif
#if defined(PORTD)
{VAL_PORTD, VAL_DDRD},
#endif
#if defined(PORTE)
{VAL_PORTE, VAL_DDRE},
#endif
#if defined(PORTF)
{VAL_PORTF, VAL_DDRF},
#endif
#if defined(PORTG)
{VAL_PORTG, VAL_DDRG},
#endif
};
#endif /* HAL_USE_PAL */
/**
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* External interrupts setup, all disabled initially.
*/
EICRA = 0x00;
EICRB = 0x00;
EIMSK = 0x00;
}

5
boards/OLIMEX_AVR_MT_128/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_AVR_MT_128/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_AVR_MT_128

54
boards/OLIMEX_LPC-P1227/board.c
View File

@ -1,54 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
lpc122x_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
*/
LPC_IOCON->PIO1_4 = 0x80; /* Disables pull-up on LED2 output. */
LPC_IOCON->PIO1_5 = 0x80; /* Disables pull-up on LED1 output */
LPC_IOCON->PIO1_6 = 0x80; /* Disables pull-up on Buzzer output */
}

94
boards/OLIMEX_LPC-P1227/board.h
View File

@ -1,94 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Olimex LPC-P1227 board.
*
*/
/*
* Board identifiers.
*/
#define OLIMEX_LPC_P1227
#define BOARD_NAME "Olimex LPC-P1227"
/*
* Board frequencies.
*/
#define SYSOSCCLK 12000000
/*
* GPIO 0 initial setup.
*/
#define VAL_GPIO0DIR 0x00000000
#define VAL_GPIO0DATA 0x00000000
/*
* GPIO 1 initial setup.
*/
#define VAL_GPIO1DIR PAL_PORT_BIT(GPIO1_LED1) | \
PAL_PORT_BIT(GPIO1_LED2) | \
PAL_PORT_BIT(GPIO1_BUZZER)
#define VAL_GPIO1DATA PAL_PORT_BIT(GPIO1_LED1)
/*
* GPIO 2 initial setup.
*/
#define VAL_GPIO2DIR PAL_PORT_BIT(GPIO2_LCD_DC) | \
PAL_PORT_BIT(GPIO2_LCD_SS) | \
PAL_PORT_BIT(GPIO2_LCD_RES)
#define VAL_GPIO2DATA PAL_PORT_BIT(GPIO2_LCD_SS)
/*
* Pin definitions.
*/
#define GPIO1_LED1 5
#define GPIO1_LED2 4
#define GPIO1_SW_WAKEUP 3
#define GPIO1_BUZZER 6
#define GPIO2_SW_USER1 12
#define GPIO2_SW_USER2 11
#define GPIO2_SW_USER3 10
#define GPIO2_LCD_DC 15
#define GPIO2_LCD_SS 14
#define GPIO2_LCD_RES 13
/* LCD3310 pins */
#define LCD3310_RES_PIN GPIO2_LCD_RES
#define LCD3310_RES_PORT GPIO2
#define LCD3310_DC_PIN GPIO2_LCD_DC
#define LCD3310_DC_PORT GPIO2
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/OLIMEX_LPC-P1227/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_LPC-P1227/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_LPC-P1227

52
boards/OLIMEX_LPC_P1343/board.c
View File

@ -1,52 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_GPIO0DATA, VAL_GPIO0DIR},
{VAL_GPIO1DATA, VAL_GPIO1DIR},
{VAL_GPIO2DATA, VAL_GPIO2DIR},
{VAL_GPIO3DATA, VAL_GPIO3DIR},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
LPC13xx_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Extra, board-specific, initializations.
*/
}

5
boards/OLIMEX_LPC_P1343/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_LPC_P1343/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_LPC_P1343

95
boards/OLIMEX_LPC_P2148/board.c
View File

@ -1,95 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#define VAL_TC0_PRESCALER 0
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
VAL_PINSEL0,
VAL_PINSEL1,
VAL_PINSEL2,
{VAL_FIO0PIN, VAL_FIO0DIR},
{VAL_FIO1PIN, VAL_FIO1DIR}
};
#endif
/*
* Timer 0 IRQ handling here.
*/
static CH_IRQ_HANDLER(T0IrqHandler) {
CH_IRQ_PROLOGUE();
T0IR = 1; /* Clear interrupt on match MR0. */
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
VICVectAddr = 0;
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
lpc214x_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(IOPORT2, PB_CP1);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(IOPORT2, PB_WP1);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* System Timer initialization, 1ms intervals.
*/
SetVICVector(T0IrqHandler, 0, SOURCE_Timer0);
VICIntEnable = INTMASK(SOURCE_Timer0);
TC *timer = T0Base;
timer->TC_PR = VAL_TC0_PRESCALER;
timer->TC_MR0 = (PCLK / CH_FREQUENCY) / (VAL_TC0_PRESCALER + 1);
timer->TC_MCR = 3; /* Interrupt and clear TC on match MR0. */
timer->TC_TCR = 2; /* Reset counter and prescaler. */
timer->TC_TCR = 1; /* Timer enabled. */
}

5
boards/OLIMEX_LPC_P2148/board.mk
View File

@ -1,5 +0,0 @@
# List of all the mandatory board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_LPC_P2148

80
boards/OLIMEX_MSP430_P1611/board.c
View File

@ -1,80 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
#if defined(__MSP430_HAS_PORT1__) || defined(__MSP430_HAS_PORT1_R__)
{VAL_P1OUT, VAL_P1DIR},
#endif
#if defined(__MSP430_HAS_PORT2__) || defined(__MSP430_HAS_PORT2_R__)
{VAL_P2OUT, VAL_P2DIR},
#endif
#if defined(__MSP430_HAS_PORT3__) || defined(__MSP430_HAS_PORT3_R__)
{VAL_P3OUT, VAL_P3DIR},
#endif
#if defined(__MSP430_HAS_PORT4__) || defined(__MSP430_HAS_PORT4_R__)
{VAL_P4OUT, VAL_P4DIR},
#endif
#if defined(__MSP430_HAS_PORT5__) || defined(__MSP430_HAS_PORT5_R__)
{VAL_P5OUT, VAL_P5DIR},
#endif
#if defined(__MSP430_HAS_PORT6__) || defined(__MSP430_HAS_PORT6_R__)
{VAL_P6OUT, VAL_P6DIR},
#endif
};
#endif
CH_IRQ_HANDLER(TIMERA0) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
#if USE_MSP430_USART0
P3SEL |= (1 << 4) | (1 << 5);
#endif
#if USE_MSP430_USART1
P3SEL |= (1 << 6) | (1 << 7);
#endif
/*
* Timer 0 setup, uses SMCLK as source.
*/
TACCR0 = SMCLK / 4 / CH_FREQUENCY - 1;/* Counter limit. */
TACTL = TACLR; /* Clean start. */
TACTL = TASSEL_2 | ID_2 | MC_1; /* Src=SMCLK, ID=4, cmp=TACCR0. */
TACCTL0 = CCIE; /* Interrupt on compare. */
}

5
boards/OLIMEX_MSP430_P1611/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_MSP430_P1611/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_MSP430_P1611

137
boards/OLIMEX_SAM7_EX256/board.c
View File

@ -1,137 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};
#endif
/*
* SYS IRQ handling here.
*/
static CH_IRQ_HANDLER(SYSIrqHandler) {
CH_IRQ_PROLOGUE();
if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
(void) AT91C_BASE_PITC->PITC_PIVR;
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
}
#if USE_SAM7_DBGU_UART
if (AT91C_BASE_DBGU->DBGU_CSR &
(AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME |
AT91C_US_OVRE | AT91C_US_RXBRK)) {
sd_lld_serve_interrupt(&SDDBG);
}
#endif
AT91C_BASE_AIC->AIC_EOICR = 0;
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
/* Watchdog disabled.*/
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
at91sam7_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(IOPORT2, PIOB_MMC_CP);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(IOPORT2, PIOB_MMC_WP);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* LCD pins setup.
*/
palClearPad(IOPORT2, PIOB_LCD_BL);
palSetPadMode(IOPORT2, PIOB_LCD_BL, PAL_MODE_OUTPUT_PUSHPULL);
palSetPad(IOPORT1, PIOA_LCD_RESET);
palSetPadMode(IOPORT1, PIOA_LCD_RESET, PAL_MODE_OUTPUT_PUSHPULL);
/*
* Joystick and buttons setup.
*/
palSetGroupMode(IOPORT1,
PIOA_B1_MASK | PIOA_B2_MASK | PIOA_B3_MASK |
PIOA_B4_MASK | PIOA_B5_MASK,
0,
PAL_MODE_INPUT);
palSetGroupMode(IOPORT2, PIOB_SW1_MASK | PIOB_SW2_MASK, 0, PAL_MODE_INPUT);
/*
* MMC/SD slot setup.
*/
palSetGroupMode(IOPORT2,
PIOB_MMC_WP_MASK | PIOB_MMC_CP_MASK,
0,
PAL_MODE_INPUT);
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
/*
* RTS/CTS pins enabled for USART0 only.
*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
}

5
boards/OLIMEX_SAM7_EX256/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_SAM7_EX256/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_SAM7_EX256

117
boards/OLIMEX_SAM7_P256/board.c
View File

@ -1,117 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};
#endif
/*
* SYS IRQ handling here.
*/
static CH_IRQ_HANDLER(SYSIrqHandler) {
CH_IRQ_PROLOGUE();
if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
(void) AT91C_BASE_PITC->PITC_PIVR;
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
}
AT91C_BASE_AIC->AIC_EOICR = 0;
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
/* Watchdog disabled.*/
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
at91sam7_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(IOPORT1, PIOA_MMC_CP);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(IOPORT1, PIOA_MMC_WP);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* LED pins setup.
*/
palClearPad(IOPORT1, PIOA_LED1);
palSetPadMode(IOPORT1, PIOA_LED1, PAL_MODE_OUTPUT_PUSHPULL);
palClearPad(IOPORT1, PIOA_LED2);
palSetPadMode(IOPORT1, PIOA_LED2, PAL_MODE_OUTPUT_PUSHPULL);
/*
* buttons setup.
*/
palSetGroupMode(IOPORT1, PIOA_B1_MASK | PIOA_B2_MASK, 0, PAL_MODE_INPUT);
/*
* MMC/SD slot setup.
*/
palSetGroupMode(IOPORT1,
PIOA_MMC_WP_MASK | PIOA_MMC_CP_MASK,
0,
PAL_MODE_INPUT);
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
}

5
boards/OLIMEX_SAM7_P256/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_SAM7_P256/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_SAM7_P256

50
boards/OLIMEX_STM32_103STK/board.c
View File

@ -1,50 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_103STK/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_103STK

108
boards/OLIMEX_STM32_E407/board.c
View File

@ -1,108 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
static bool_t last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_E407/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_E407/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_E407

108
boards/OLIMEX_STM32_E407_REV_D/board.c
View File

@ -1,108 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
static bool_t last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

1300
boards/OLIMEX_STM32_E407_REV_D/board.h
View File

File diff suppressed because it is too large Load Diff

5
boards/OLIMEX_STM32_E407_REV_D/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_E407_REV_D/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_E407_REV_D

341
boards/OLIMEX_STM32_E407_REV_D/cfg/board.chcfg
View File

@ -1,341 +0,0 @@
<?xml version="1.0" encoding="UTF-8"?>
<!-- STM32F4xx board Template -->
<board xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd">
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
</configuration_settings>
<board_name>Olimex STM32-E407</board_name>
<board_id>OLIMEX_STM32_E407</board_id>
<board_functions>
<sdc_lld_is_card_inserted><![CDATA[ static bool_t last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
<sdc_lld_is_write_protected>
<![CDATA[ (void)sdcp;
return FALSE;]]></sdc_lld_is_write_protected>
</board_functions>
<ethernet_phy>
<identifier>MII_LAN8710A_ID</identifier>
<bus_type>RMII</bus_type>
</ethernet_phy>
<subtype>STM32F40_41xxx</subtype>
<clocks
HSEFrequency="12000000"
HSEBypass="false"
LSEFrequency="32768"
LSEBypass="false"
VDD="330"
/>
<ports>
<GPIOA>
<pin0 ID="BUTTON_WKUP" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="ETH_RMII_REF_CLK" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin2 ID="ETH_RMII_MDIO" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin3 ID="ETH_RMII_MDINT" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="ETH_RMII_CRS_DV" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin8 ID="USB_HS_BUSON" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Output" Alternate="0" />
<pin9 ID="OTG_FS_VBUS" Type="PushPull" Speed="Maximum" Resistor="PullDown"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="OTG_FS_ID" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="10" />
<pin11 ID="OTG_FS_DM" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="10" />
<pin12 ID="OTG_FS_DP" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="10" />
<pin13 ID="JTAG_TMS" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="0" />
<pin14 ID="JTAG_TCK" Type="PushPull" Speed="Maximum" Resistor="PullDown"
Level="High" Mode="Alternate" Alternate="0" />
<pin15 ID="JTAG_TDI" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="0" />
</GPIOA>
<GPIOB>
<pin0 ID="USB_FS_BUSON" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Output" Alternate="0" />
<pin1 ID="USB_HS_FAULT" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Input" Alternate="0" />
<pin2 ID="BOOT1" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="JTAG_TDO" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="0" />
<pin4 ID="JTAG_TRST" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="I2C1_SCL" Type="OpenDrain" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="4" />
<pin9 ID="I2C1_SDA" Type="OpenDrain" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="4" />
<pin10 ID="SPI2_SCK" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="5" />
<pin11 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin12 ID="OTG_HS_ID" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin13 ID="OTG_HS_VBUS" Type="PushPull" Speed="Maximum"
Resistor="PullDown" Level="High" Mode="Input" Alternate="0" />
<pin14 ID="OTG_HS_DM" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin15 ID="OTG_HS_DP" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
</GPIOB>
<GPIOC>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="ETH_RMII_MDC" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin2 ID="SPI2_MISO" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="5" />
<pin3 ID="SPI2_MOSI" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="5" />
<pin4 ID="ETH_RMII_RXD0" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin5 ID="ETH_RMII_RXD1" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin6 ID="USART6_TX" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="8" />
<pin7 ID="USART6_RX" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="8" />
<pin8 ID="SD_D0" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin9 ID="SD_D1" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin10 ID="SD_D2" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin11 ID="SD_D3" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin12 ID="SD_CLK" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin13 ID="LED" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Output" Alternate="0" />
<pin14 ID="OSC32_IN" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="OSC32_OUT" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0" />
</GPIOC>
<GPIOD>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="SD_CMD" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Alternate" Alternate="12" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin11 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin14 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOD>
<GPIOE>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin11 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin14 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOE>
<GPIOF>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin11 ID="USB_FS_FAULT" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Input" Alternate="0" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin14 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOF>
<GPIOG>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="SPI2_CS" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Output" Alternate="0" />
<pin11 ID="ETH_RMII_TXEN" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="ETH_RMII_TXD0" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin14 ID="ETH_RMII_TXD1" Type="PushPull" Speed="Maximum"
Resistor="Floating" Level="High" Mode="Alternate" Alternate="11" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOG>
<GPIOH>
<pin0 ID="OSC_IN" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0"></pin0>
<pin1 ID="OSC_OUT" Type="PushPull" Speed="Maximum" Resistor="Floating"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin11 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin14 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOH>
<GPIOI>
<pin0 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin1 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin2 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin3 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin4 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin5 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin6 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin7 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin8 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin9 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin10 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin11 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin12 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin13 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin14 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
<pin15 ID="" Type="PushPull" Speed="Maximum" Resistor="PullUp"
Level="High" Mode="Input" Alternate="0" />
</GPIOI>
</ports>
</board>

50
boards/OLIMEX_STM32_H103/board.c
View File

@ -1,50 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_H103/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_H103/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_H103

108
boards/OLIMEX_STM32_H407/board.c
View File

@ -1,108 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
static bool_t last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

88
boards/OLIMEX_STM32_LCD/board.c
View File

@ -1,88 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return TRUE;
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return FALSE;
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_LCD/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_LCD/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_LCD

65
boards/OLIMEX_STM32_P103/board.c
View File

@ -1,65 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(GPIOC, GPIOC_MMCCP);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(GPIOC, GPIOC_MMCWP);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_P103/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_P103/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_P103

84
boards/OLIMEX_STM32_P107/board.c
View File

@ -1,84 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_MMC_SPI
/*
* Card detection through the card internal pull-up on D3.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
static bool_t last_status = FALSE;
(void)mmcp;
if ((palReadLatch(GPIOA) & PAL_PORT_BIT(GPIOA_SPI3_CS_MMC)) == 0)
return last_status;
return last_status = (bool_t)palReadPad(GPIOA, GPIOA_SPI3_CS_MMC);
}
/*
* Card write protection detection is not possible, the card is always
* reported as not protected.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return FALSE;
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Several I/O pins are re-mapped:
* USART3 to the PD8/PD9 pins.
* I2C1 to the PB8/PB9 pins.
* SPI3 to the PC10/PC11/PC12 pins.
*/
AFIO->MAPR |= AFIO_MAPR_USART3_REMAP_FULLREMAP |
AFIO_MAPR_I2C1_REMAP |
AFIO_MAPR_SPI3_REMAP;
}

5
boards/OLIMEX_STM32_P107/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_P107/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_P107

78
boards/OLIMEX_STM32_P407/board.c
View File

@ -1,78 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
static bool_t last_status = FALSE;
(void)mmcp;
if ((palReadLatch(GPIOD) & PAL_PORT_BIT(GPIOD_SPI3_CS)) == 0)
return last_status;
return last_status = (bool_t)palReadPad(GPIOD, GPIOD_SPI3_CS);
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/OLIMEX_STM32_P407/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_P407/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_P407

78
boards/RAISONANCE_REVA_STM8S/board.c
View File

@ -1,78 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
ROMCONST PALConfig pal_default_config =
{
{
{VAL_GPIOAODR, 0, VAL_GPIOADDR, VAL_GPIOACR1, VAL_GPIOACR2},
{VAL_GPIOBODR, 0, VAL_GPIOBDDR, VAL_GPIOBCR1, VAL_GPIOBCR2},
{VAL_GPIOCODR, 0, VAL_GPIOCDDR, VAL_GPIOCCR1, VAL_GPIOCCR2},
{VAL_GPIODODR, 0, VAL_GPIODDDR, VAL_GPIODCR1, VAL_GPIODCR2},
{VAL_GPIOEODR, 0, VAL_GPIOEDDR, VAL_GPIOECR1, VAL_GPIOECR2},
{VAL_GPIOFODR, 0, VAL_GPIOFDDR, VAL_GPIOFCR1, VAL_GPIOFCR2},
{VAL_GPIOGODR, 0, VAL_GPIOGDDR, VAL_GPIOGCR1, VAL_GPIOGCR2},
}
};
#endif
/*
* TIM 2 clock after the prescaler.
*/
#define TIM2_CLOCK (SYSCLK / 16)
#define TIM2_ARR ((TIM2_CLOCK / CH_FREQUENCY) - 1)
/*
* TIM2 interrupt handler.
*/
CH_IRQ_HANDLER(13) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
TIM2->SR1 = 0;
CH_IRQ_EPILOGUE();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* TIM2 initialization as system tick.
*/
CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
TIM2->ARRL = (uint8_t)(TIM2_ARR);
TIM2->CNTRH = 0;
TIM2->CNTRL = 0;
TIM2->SR1 = 0;
TIM2->IER = TIM2_IER_UIE;
TIM2->CR1 = TIM2_CR1_CEN;
}

80
boards/RENESAS_RPBRX62N/board.c
View File

@ -1,80 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config = {
{VAL_PORT0DATA, VAL_PORT0DIR, VAL_PORT0ICR, VAL_PORT0ODR, 0},
{VAL_PORT1DATA, VAL_PORT1DIR, VAL_PORT1ICR, VAL_PORT1ODR, 0},
{VAL_PORT2DATA, VAL_PORT2DIR, VAL_PORT2ICR, VAL_PORT2ODR, 0},
{VAL_PORT3DATA, VAL_PORT3DIR, VAL_PORT3ICR, VAL_PORT3ODR, 0},
{VAL_PORT4DATA, VAL_PORT4DIR, VAL_PORT4ICR, 0 , 0},
{VAL_PORT5DATA, VAL_PORT5DIR, VAL_PORT5ICR, 0 , 0},
{VAL_PORTADATA, VAL_PORTADIR, VAL_PORTAICR, 0 , VAL_PORTAPCR},
{VAL_PORTBDATA, VAL_PORTBDIR, VAL_PORTBICR, 0 , VAL_PORTBPCR},
{VAL_PORTCDATA, VAL_PORTCDIR, VAL_PORTCICR, VAL_PORTCODR, VAL_PORTCPCR},
{VAL_PORTDDATA, VAL_PORTDDIR, VAL_PORTDICR, 0 , VAL_PORTDPCR},
{VAL_PORTEDATA, VAL_PORTEDIR, VAL_PORTEICR, 0 , VAL_PORTEPCR},
};
#endif
/**
* @brief CMT3 interrupt handler.
*/
CH_IRQ_HANDLER(Excep_CMTU1_CMT3) {
CH_IRQ_PROLOGUE();
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
rx62n_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/* Setup tick timer */
MSTP(CMT3) = 0; /* Enable CMT3 timer (cancel module stop state) */
CMT.CMSTR1.BIT.STR3 = 0; /* Stop timer */
CMT3.CMCR.BIT.CKS = 2; /* PCLK/128 */
CMT3.CMCNT = 0;
CMT3.CMCOR = RX62N_PERCLK / 128 / CH_FREQUENCY;
CMT3.CMCR.BIT.CMIE = 1; /* Enable compare match interrupts */
IEN(CMT3,CMI3) = 1; /* Set Interrupt Enable Register */
IPR(CMT3,CMI3) = 8; /* Setup interrupt priority */
CMT.CMSTR1.BIT.STR3 = 1; /* Start timer */
}

224
boards/RENESAS_RPBRX62N/board.h
View File

@ -1,224 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for Renesas RPBRX62N board
*/
/*
* Board identifiers.
*/
#define BOARD_RPBRX62N
#define BOARD_NAME "Renesas RPBRX62N"
/*
* Board frequencies.
*/
#define EXTALCLK 12000000
#define SUBCLK 32768
/*
* MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
*/
#define RX62NXBDFP
/* TODO: move this to hal/include/mii.h */
#define MII_LAN8700_ID 0x0007C0C4
/*
* Ethernet PHY type.
*/
#define BOARD_PHY_ID MII_LAN8700_ID
/*
* Ethernet PHY address.
*/
#define BOARD_PHY_ADDRESS 31
#define RX62N_MAC_PHY_TIMEOUT 0
/*
* Use ethernet PHY RMII interface (if defined).
*/
/*#define BOARD_PHY_RMII*/
/*
* Ethernet PHY hardware reset
* PORTA_ETH_RESETOUT must be held low for at least 100us.
*/
#define BOARD_PHY_RESET() do { \
palClearPad(GPIO10, PORTA_ETH_RESETOUT); \
asm volatile ("mov.l #2640,r2 \n\t" \
"1: \n\t" \
"sub #1,r2 \n\t" \
"bne.b 1b \n\t"); \
palSetPad(GPIO10, PORTA_ETH_RESETOUT); \
} while(0)
/*
* PORT 0 initial setup.
*/
#define VAL_PORT0DIR 0x00
#define VAL_PORT0DATA 0x00
#define VAL_PORT0ICR 0x00
#define VAL_PORT0ODR 0x00
/*
* PORT 1 initial setup.
*/
#define VAL_PORT1DIR 0x00
#define VAL_PORT1DATA 0x00
#define VAL_PORT1ICR 0x00
#define VAL_PORT1ODR 0x00
/*
* PORT 2 initial setup.
*/
#define VAL_PORT2DIR 0x00
#define VAL_PORT2DATA 0x00
#define VAL_PORT2ICR 0x00
#define VAL_PORT2ODR 0x00
/*
* PORT 3 initial setup.
*/
#define VAL_PORT3DIR 0x00
#define VAL_PORT3DATA 0x00
#define VAL_PORT3ICR 0x00
#define VAL_PORT3ODR 0x00
/*
* PORT 4 initial setup.
*/
#define VAL_PORT4DIR 0x00
#define VAL_PORT4DATA 0x00
#define VAL_PORT4ICR 0x00
/*
* PORT 5 initial setup.
*/
#define VAL_PORT5DIR 0x00
#define VAL_PORT5DATA 0x00
#define VAL_PORT5ICR 0x00
/*
* GPIO A initial setup.
*/
#define VAL_PORTADIR PAL_PORT_BIT(PORTA_LED0) | \
PAL_PORT_BIT(PORTA_LED1) | \
PAL_PORT_BIT(PORTA_LED2) | \
PAL_PORT_BIT(PORTA_MII_MDIO) | \
PAL_PORT_BIT(PORTA_MII_MDC) | \
PAL_PORT_BIT(PORTA_ETH_LINKSTA) | \
PAL_PORT_BIT(PORTA_ETH_RESETOUT)
#define VAL_PORTADATA PAL_PORT_BIT(PORTA_LED0) | \
PAL_PORT_BIT(PORTA_LED1) | \
PAL_PORT_BIT(PORTA_LED2) | \
PAL_PORT_BIT(PORTA_ETH_RESETOUT)
#define VAL_PORTAICR PAL_PORT_BIT(PORTA_MII_MDIO) | \
PAL_PORT_BIT(PORTA_ETH_LINKSTA)
#define VAL_PORTAPCR 0x00
/*
* PORT B initial setup.
*/
#define VAL_PORTBDIR PAL_PORT_BIT(PORTB_MII_TXD1) | \
PAL_PORT_BIT(PORTB_MII_TXD0) | \
PAL_PORT_BIT(PORTB_MII_TXEN)
#define VAL_PORTBDATA 0x00
#define VAL_PORTBICR PAL_PORT_BIT(PORTB_MII_CRS) | \
PAL_PORT_BIT(PORTB_MII_RXER) | \
PAL_PORT_BIT(PORTB_MII_RXCLK) | \
PAL_PORT_BIT(PORTB_MII_RXD0) | \
PAL_PORT_BIT(PORTB_MII_RXD1)
#define VAL_PORTBPCR 0x00
/*
* PORT C initial setup.
*/
#define VAL_PORTCDIR PAL_PORT_BIT(PORTC_MII_TXD3) | \
PAL_PORT_BIT(PORTC_MII_TXD2) | \
PAL_PORT_BIT(PORTC_MII_TXER)
#define VAL_PORTCDATA 0x00
#define VAL_PORTCICR PAL_PORT_BIT(PORTC_MII_COL) | \
PAL_PORT_BIT(PORTC_MII_TXCLK) | \
PAL_PORT_BIT(PORTC_MII_TXER) | \
PAL_PORT_BIT(PORTC_MII_RXDV) | \
PAL_PORT_BIT(PORTC_MII_RXD2) | \
PAL_PORT_BIT(PORTC_MII_RXD3)
#define VAL_PORTCODR 0x00
#define VAL_PORTCPCR 0x00
/*
* PORT D initial setup.
*/
#define VAL_PORTDDIR 0x00
#define VAL_PORTDDATA 0x00
#define VAL_PORTDICR 0x00
#define VAL_PORTDPCR 0x00
/*
* PORT E initial setup.
*/
#define VAL_PORTEDIR 0x00
#define VAL_PORTEDATA 0x00
#define VAL_PORTEICR 0x00
#define VAL_PORTEPCR 0x00
/*
* Pin definitions.
*/
#define PORTA_ETH_RESETOUT 7
#define PORTA_ETH_LINKSTA 5
#define PORTA_MII_MDC 4
#define PORTA_MII_MDIO 3
#define PORTA_LED0 2
#define PORTA_LED1 1
#define PORTA_LED2 0
#define PORTB_MII_CRS 7
#define PORTB_MII_TXD1 6
#define PORTB_MII_TXD0 5
#define PORTB_MII_TXEN 4
#define PORTB_MII_RXER 3
#define PORTB_MII_RXCLK 2
#define PORTB_MII_RXD0 1
#define PORTB_MII_RXD1 0
#define PORTC_MII_COL 7
#define PORTC_MII_TXD3 6
#define PORTC_MII_TXD2 5
#define PORTC_MII_TXCLK 4
#define PORTC_MII_TXER 3
#define PORTC_MII_RXDV 2
#define PORTC_MII_RXD2 1
#define PORTC_MII_RXD3 0
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

109
boards/STUDIEL_AT91SAM7A3_EK/board.c
View File

@ -1,109 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
(SAM7_PLATFORM == SAM7X512) || (SAM7_PLATFORM == SAM7A3)
{VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
#endif
};
#endif
/*
* SYS IRQ handling here.
*/
static CH_IRQ_HANDLER(SYSIrqHandler) {
CH_IRQ_PROLOGUE();
if (AT91C_BASE_PITC->PITC_PISR & AT91C_PITC_PITS) {
(void) AT91C_BASE_PITC->PITC_PIVR;
chSysLockFromIsr();
chSysTimerHandlerI();
chSysUnlockFromIsr();
}
#if USE_SAM7_DBGU_UART
if (AT91C_BASE_DBGU->DBGU_CSR &
(AT91C_US_RXRDY | AT91C_US_TXRDY | AT91C_US_PARE | AT91C_US_FRAME | AT91C_US_OVRE | AT91C_US_RXBRK)) {
sd_lld_serve_interrupt(&SDDBG);
}
#endif
AT91C_BASE_AIC->AIC_EOICR = 0;
CH_IRQ_EPILOGUE();
}
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
/* Watchdog disabled.*/
AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
at91sam7_clock_init();
}
#if HAL_USE_MMC_SPI
/* Board-related functions related to the MMC_SPI driver.*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
return !palReadPad(IOPORT2, PIOB_MMC_CP);
}
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
return palReadPad(IOPORT2, PIOB_MMC_WP);
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* PIT Initialization.
*/
AIC_ConfigureIT(AT91C_ID_SYS,
AT91C_AIC_SRCTYPE_HIGH_LEVEL | (AT91C_AIC_PRIOR_HIGHEST - 1),
SYSIrqHandler);
AIC_EnableIT(AT91C_ID_SYS);
AT91C_BASE_PITC->PITC_PIMR = (MCK / 16 / CH_FREQUENCY) - 1;
AT91C_BASE_PITC->PITC_PIMR |= AT91C_PITC_PITEN | AT91C_PITC_PITIEN;
/*
* RTS/CTS pins enabled for USART0 only.
*/
AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_RTS0 | AT91C_PA4_CTS0;
AT91C_BASE_PIOA->PIO_ASR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
AT91C_BASE_PIOA->PIO_PPUDR = AT91C_PIO_PA3 | AT91C_PIO_PA4;
}

67
boards/ST_EVB_SPC560BC/board.c
View File

@ -1,67 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/* Initialization array for the PSMI registers.*/
static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init,
spc_padsels_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/ST_EVB_SPC560BC/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC560BC/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC560BC

68
boards/ST_EVB_SPC560D/board.c
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_E, PE_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_E, PE_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/* Initialization array for the PSMI registers.*/
static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init,
spc_padsels_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

68
boards/ST_EVB_SPC560D/board.h
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for a generic SPC560Dxx proto board.
*/
/*
* Board identifiers.
*/
#define BOARD_GENERIC_SPC560D
#define BOARD_NAME "Generic SPC560Dxx"
/*
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 8000000
#endif
/*
* I/O definitions.
*/
#define PB_LIN0_TDX 2
#define PB_LIN0_RDX 3
#define PE_BUTTON1 0
#define PE_BUTTON2 1
#define PE_BUTTON3 2
#define PE_BUTTON4 3
#define PE_LED1 4
#define PE_LED2 5
#define PE_LED3 6
#define PE_LED4 7
/*
* Support macros.
*/
#define PCR(port, pin) (((port) * 16) + (pin))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_EVB_SPC560D/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC560D/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC560D

68
boards/ST_EVB_SPC560P/board.c
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/* Initialization array for the PSMI registers.*/
static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init,
spc_padsels_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

68
boards/ST_EVB_SPC560P/board.h
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for a generic SPC560Pxx proto board.
*/
/*
* Board identifiers.
*/
#define BOARD_GENERIC_SPC560P
#define BOARD_NAME "Generic SPC560Pxx"
/*
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 40000000
#endif
/*
* I/O definitions.
*/
#define PB_LIN0_TDX 2
#define PB_LIN0_RDX 3
#define PD_BUTTON1 0
#define PD_BUTTON2 1
#define PD_BUTTON3 2
#define PD_BUTTON4 3
#define PD_LED1 4
#define PD_LED2 5
#define PD_LED3 6
#define PD_LED4 7
/*
* Support macros.
*/
#define PCR(port, pin) (((port) * 16) + (pin))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_EVB_SPC560P/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC560P/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC560P

59
boards/ST_EVB_SPC563M/board.c
View File

@ -1,59 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT5, P5_ESCI_A_TX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT5, P5_ESCI_A_RX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT11, P11_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
spc_siu_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

68
boards/ST_EVB_SPC563M/board.h
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for a generic SPC563Mxx proto board.
*/
/*
* Board identifiers.
*/
#define BOARD_GENERIC_SPC563M
#define BOARD_NAME "Generic SPC563Mxx"
/*
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 8000000
#endif
/*
* I/O definitions.
*/
#define P5_ESCI_A_TX 9
#define P5_ESCI_A_RX 10
#define P11_BUTTON1 3
#define P11_BUTTON2 5
#define P11_BUTTON3 7
#define P11_BUTTON4 9
#define P11_LED1 12
#define P11_LED2 13
#define P11_LED3 14
#define P11_LED4 15
/*
* Support macros.
*/
#define PCR(port, pin) (((port) * 16) + (pin))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_EVB_SPC563M/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC563M/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC563M

59
boards/ST_EVB_SPC564A/board.c
View File

@ -1,59 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT5, P5_ESCI_A_TX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT5, P5_ESCI_A_RX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT11, P11_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT11, P11_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT11, P11_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
spc_siu_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

68
boards/ST_EVB_SPC564A/board.h
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for a generic SPC564Axx proto board.
*/
/*
* Board identifiers.
*/
#define BOARD_GENERIC_SPC564A
#define BOARD_NAME "Generic SPC564Axx"
/*
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 8000000
#endif
/*
* I/O definitions.
*/
#define P5_ESCI_A_TX 9
#define P5_ESCI_A_RX 10
#define P11_BUTTON1 3
#define P11_BUTTON2 5
#define P11_BUTTON3 7
#define P11_BUTTON4 9
#define P11_LED1 12
#define P11_LED2 13
#define P11_LED3 14
#define P11_LED4 15
/*
* Support macros.
*/
#define PCR(port, pin) (((port) * 16) + (pin))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_EVB_SPC564A/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC564A/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC564A

68
boards/ST_EVB_SPC56EL/board.c
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/* Initial setup of all defined pads, the list is terminated by a {-1, 0, 0}.*/
static const spc_siu_init_t spc_siu_init[] = {
{PCR(PORT_B, PB_LIN0_TDX), PAL_HIGH, PAL_MODE_OUTPUT_ALTERNATE(1)},
{PCR(PORT_B, PB_LIN0_RDX), PAL_HIGH, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON1), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON2), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON3), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_BUTTON4), PAL_LOW, PAL_MODE_INPUT},
{PCR(PORT_D, PD_LED1), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED2), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED3), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{PCR(PORT_D, PD_LED4), PAL_HIGH, PAL_MODE_OUTPUT_PUSHPULL},
{-1, 0, 0}
};
/* Initialization array for the PSMI registers.*/
static const uint8_t spc_padsels_init[SPC5_SIUL_NUM_PADSELS] = {
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
};
/**
* @brief PAL setup.
*/
const PALConfig pal_default_config = {
PAL_MODE_UNCONNECTED, /* Default mode for all undefined pads. */
spc_siu_init,
spc_padsels_init
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
spc_early_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

68
boards/ST_EVB_SPC56EL/board.h
View File

@ -1,68 +0,0 @@
/*
SPC5 HAL - Copyright (C) 2013 STMicroelectronics
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for a generic SPC560Pxx proto board.
*/
/*
* Board identifiers.
*/
#define BOARD_GENERIC_SPC56EL
#define BOARD_NAME "Generic SPC56ELxx"
/*
* Board frequencies.
*/
#if !defined(SPC5_XOSC_CLK)
#define SPC5_XOSC_CLK 40000000
#endif
/*
* I/O definitions.
*/
#define PB_LIN0_TDX 2
#define PB_LIN0_RDX 3
#define PD_BUTTON1 0
#define PD_BUTTON2 1
#define PD_BUTTON3 2
#define PD_BUTTON4 3
#define PD_LED1 4
#define PD_LED2 5
#define PD_LED3 6
#define PD_LED4 7
/*
* Support macros.
*/
#define PCR(port, pin) (((port) * 16) + (pin))
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_EVB_SPC56EL/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_EVB_SPC56EL/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_EVB_SPC56EL

55
boards/ST_STM3210C_EVAL/board.c
View File

@ -1,55 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
/*
* Remap USART2 to the PD5/PD6 pins.
*/
AFIO->MAPR |= AFIO_MAPR_USART2_REMAP;
}

5
boards/ST_STM3210C_EVAL/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM3210C_EVAL/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM3210C_EVAL

68
boards/ST_STM3210E_EVAL/board.c
View File

@ -1,68 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
{VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
{VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
{VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
{VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
{VAL_GPIOFODR, VAL_GPIOFCRL, VAL_GPIOFCRH},
{VAL_GPIOGODR, VAL_GPIOGCRL, VAL_GPIOGCRH},
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC
/* Board-related functions related to the SDC driver.*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
return !palReadPad(GPIOF, GPIOF_SD_DETECT);
}
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
}
#endif
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/ST_STM3210E_EVAL/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM3210E_EVAL/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM3210E_EVAL

54
boards/ST_STM3220G_EVAL/board.c
View File

@ -1,54 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
#if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR, VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR, VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR, VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
};
#endif
/*
* Early initialization code.
* This initialization must be performed just after stack setup and before
* any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
/*
* Board-specific initialization code.
*/
void boardInit(void) {
}

5
boards/ST_STM3220G_EVAL/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM3220G_EVAL/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM3220G_EVAL

102
boards/ST_STM32373C_EVAL/board.c
View File

@ -1,102 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

5
boards/ST_STM32373C_EVAL/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM32373C_EVAL/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM32373C_EVAL

77
boards/ST_STM32F0_DISCOVERY/board.c
View File

@ -1,77 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

5
boards/ST_STM32F0_DISCOVERY/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM32F0_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM32F0_DISCOVERY

102
boards/ST_STM32F3_DISCOVERY/board.c
View File

@ -1,102 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

5
boards/ST_STM32F3_DISCOVERY/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM32F3_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM32F3_DISCOVERY

96
boards/ST_STM32F401C_DISCOVERY/board.c
View File

@ -1,96 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "ch.h"
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

797
boards/ST_STM32F401C_DISCOVERY/board.h
View File

@ -1,797 +0,0 @@
/*
ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#ifndef _BOARD_H_
#define _BOARD_H_
/*
* Setup for STMicroelectronics STM32F401-Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32F4_DISCOVERY
#define BOARD_NAME "STMicroelectronics STM32F401-Discovery"
/*
* Board oscillators-related settings.
* NOTE: LSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 0
#endif
#if !defined(STM32_HSECLK)
#define STM32_HSECLK 8000000
#endif
/*
* Board voltages.
* Required for performance limits calculation.
*/
#define STM32_VDD 300
/*
* MCU type as defined in the ST header.
*/
#define STM32F401xx
/*
* IO pins assignments.
*/
#define GPIOA_BUTTON 0
#define GPIOA_PIN1 1
#define GPIOA_PIN2 2
#define GPIOA_PIN3 3
#define GPIOA_LRCK 4
#define GPIOA_SPC 5
#define GPIOA_SDO 6
#define GPIOA_SDI 7
#define GPIOA_PIN8 8
#define GPIOA_VBUS_FS 9
#define GPIOA_OTG_FS_ID 10
#define GPIOA_OTG_FS_DM 11
#define GPIOA_OTG_FS_DP 12
#define GPIOA_SWDIO 13
#define GPIOA_SWCLK 14
#define GPIOA_PIN15 15
#define GPIOB_PIN0 0
#define GPIOB_PIN1 1
#define GPIOB_PIN2 2
#define GPIOB_SWO 3
#define GPIOB_PIN4 4
#define GPIOB_PIN5 5
#define GPIOB_SCL 6
#define GPIOB_PIN7 7
#define GPIOB_PIN8 8
#define GPIOB_SDA 9
#define GPIOB_CLK_IN 10
#define GPIOB_NOT_AVAILABLE 11 //This is now VCAP1, not usable as a pin
#define GPIOB_PIN12 12
#define GPIOB_PIN13 13
#define GPIOB_PIN14 14
#define GPIOB_PIN15 15
#define GPIOC_OTG_FS_POWER_ON 0
#define GPIOC_PIN1 1
#define GPIOC_PIN2 2
#define GPIOC_PDM_OUT 3
#define GPIOC_PIN4 4
#define GPIOC_PIN5 5
#define GPIOC_PIN6 6
#define GPIOC_MCLK 7
#define GPIOC_PIN8 8
#define GPIOC_PIN9 9
#define GPIOC_SCLK 10
#define GPIOC_PIN11 11
#define GPIOC_SDIN 12
#define GPIOC_PIN13 13
#define GPIOC_PIN14 14 //If crystal fitted and SB18 removed, OSC32_IN
#define GPIOC_PIN15 15 //If crystal fitted and SB17 removed, OSC32_OUT
#define GPIOD_PIN0 0
#define GPIOD_PIN1 1
#define GPIOD_PIN2 2
#define GPIOD_PIN3 3
#define GPIOD_RESET 4
#define GPIOD_OVER_CURRENT 5
#define GPIOD_PIN6 6
#define GPIOD_PIN7 7
#define GPIOD_PIN8 8
#define GPIOD_PIN9 9
#define GPIOD_PIN10 10
#define GPIOD_PIN11 11
#define GPIOD_LED4 12
#define GPIOD_LED3 13
#define GPIOD_LED5 14
#define GPIOD_LED6 15
#define GPIOE_INT1 0
#define GPIOE_INT2 1
#define GPIOE_LSM_DRDY 2 //LSM303DLHC DRDY
#define GPIOE_CS_SPI 3
#define GPIOE_LSM_INT1 4 //LSM303DLHC INT1
#define GPIOE_LSM_INT2 5 //LSM303DLHC INT2
#define GPIOE_PIN6 6
#define GPIOE_PIN7 7
#define GPIOE_PIN8 8
#define GPIOE_PIN9 9
#define GPIOE_PIN10 10
#define GPIOE_PIN11 11
#define GPIOE_PIN12 12
#define GPIOE_PIN13 13
#define GPIOE_PIN14 14
#define GPIOE_PIN15 15
#define GPIOH_OSC_IN 0
#define GPIOH_OSC_OUT 1
/*
* I/O ports initial setup, this configuration is established soon after reset
* in the initialization code.
* Please refer to the STM32 Reference Manual for details.
*/
#define PIN_MODE_INPUT(n) (0U << ((n) * 2))
#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2))
#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2))
#define PIN_MODE_ANALOG(n) (3U << ((n) * 2))
#define PIN_ODR_LOW(n) (0U << (n))
#define PIN_ODR_HIGH(n) (1U << (n))
#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
#define PIN_OSPEED_2M(n) (0U << ((n) * 2))
#define PIN_OSPEED_25M(n) (1U << ((n) * 2))
#define PIN_OSPEED_50M(n) (2U << ((n) * 2))
#define PIN_OSPEED_100M(n) (3U << ((n) * 2))
#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2))
#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2))
#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2))
#define PIN_AFIO_AF(n, v) ((v##U) << ((n % 8) * 4))
/*
* GPIOA setup:
*
* PA0 - BUTTON (input floating).
* PA1 - PIN1 (input pullup).
* PA2 - PIN2 (input pullup).
* PA3 - PIN3 (input pullup).
* PA4 - LRCK (alternate 6).
* PA5 - SPC (alternate 5).
* PA6 - SDO (alternate 5).
* PA7 - SDI (alternate 5).
* PA8 - PIN8 (input pullup).
* PA9 - VBUS_FS (input floating).
* PA10 - OTG_FS_ID (alternate 10).
* PA11 - OTG_FS_DM (alternate 10).
* PA12 - OTG_FS_DP (alternate 10).
* PA13 - SWDIO (alternate 0).
* PA14 - SWCLK (alternate 0).
* PA15 - PIN15 (input pullup).
*/
#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_BUTTON) | \
PIN_MODE_INPUT(GPIOA_PIN1) | \
PIN_MODE_INPUT(GPIOA_PIN2) | \
PIN_MODE_INPUT(GPIOA_PIN3) | \
PIN_MODE_ALTERNATE(GPIOA_LRCK) | \
PIN_MODE_ALTERNATE(GPIOA_SPC) | \
PIN_MODE_ALTERNATE(GPIOA_SDO) | \
PIN_MODE_ALTERNATE(GPIOA_SDI) | \
PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_VBUS_FS) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_ID) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_BUTTON) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOA_LRCK) | \
PIN_OTYPE_PUSHPULL(GPIOA_SPC) | \
PIN_OTYPE_PUSHPULL(GPIOA_SDO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SDI) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOA_VBUS_FS) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_ID) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DM) | \
PIN_OTYPE_PUSHPULL(GPIOA_OTG_FS_DP) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_100M(GPIOA_BUTTON) | \
PIN_OSPEED_100M(GPIOA_PIN1) | \
PIN_OSPEED_100M(GPIOA_PIN2) | \
PIN_OSPEED_100M(GPIOA_PIN3) | \
PIN_OSPEED_100M(GPIOA_LRCK) | \
PIN_OSPEED_50M(GPIOA_SPC) | \
PIN_OSPEED_50M(GPIOA_SDO) | \
PIN_OSPEED_50M(GPIOA_SDI) | \
PIN_OSPEED_100M(GPIOA_PIN8) | \
PIN_OSPEED_100M(GPIOA_VBUS_FS) | \
PIN_OSPEED_100M(GPIOA_OTG_FS_ID) | \
PIN_OSPEED_100M(GPIOA_OTG_FS_DM) | \
PIN_OSPEED_100M(GPIOA_OTG_FS_DP) | \
PIN_OSPEED_100M(GPIOA_SWDIO) | \
PIN_OSPEED_100M(GPIOA_SWCLK) | \
PIN_OSPEED_100M(GPIOA_PIN15))
#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_BUTTON) | \
PIN_PUPDR_PULLUP(GPIOA_PIN1) | \
PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
PIN_PUPDR_FLOATING(GPIOA_LRCK) | \
PIN_PUPDR_FLOATING(GPIOA_SPC) | \
PIN_PUPDR_FLOATING(GPIOA_SDO) | \
PIN_PUPDR_FLOATING(GPIOA_SDI) | \
PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
PIN_PUPDR_FLOATING(GPIOA_VBUS_FS) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_ID) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DM) | \
PIN_PUPDR_FLOATING(GPIOA_OTG_FS_DP) | \
PIN_PUPDR_FLOATING(GPIOA_SWDIO) | \
PIN_PUPDR_FLOATING(GPIOA_SWCLK) | \
PIN_PUPDR_PULLUP(GPIOA_PIN15))
#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_BUTTON) | \
PIN_ODR_HIGH(GPIOA_PIN1) | \
PIN_ODR_HIGH(GPIOA_PIN2) | \
PIN_ODR_HIGH(GPIOA_PIN3) | \
PIN_ODR_HIGH(GPIOA_LRCK) | \
PIN_ODR_HIGH(GPIOA_SPC) | \
PIN_ODR_HIGH(GPIOA_SDO) | \
PIN_ODR_HIGH(GPIOA_SDI) | \
PIN_ODR_HIGH(GPIOA_PIN8) | \
PIN_ODR_HIGH(GPIOA_VBUS_FS) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_ID) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DM) | \
PIN_ODR_HIGH(GPIOA_OTG_FS_DP) | \
PIN_ODR_HIGH(GPIOA_SWDIO) | \
PIN_ODR_HIGH(GPIOA_SWCLK) | \
PIN_ODR_HIGH(GPIOA_PIN15))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_BUTTON, 0) | \
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
PIN_AFIO_AF(GPIOA_PIN2, 0) | \
PIN_AFIO_AF(GPIOA_PIN3, 0) | \
PIN_AFIO_AF(GPIOA_LRCK, 6) | \
PIN_AFIO_AF(GPIOA_SPC, 5) | \
PIN_AFIO_AF(GPIOA_SDO, 5) | \
PIN_AFIO_AF(GPIOA_SDI, 5))
#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_VBUS_FS, 0) | \
PIN_AFIO_AF(GPIOA_OTG_FS_ID, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))
/*
* GPIOB setup:
*
* PB0 - PIN0 (input pullup).
* PB1 - PIN1 (input pullup).
* PB2 - PIN2 (input pullup).
* PB3 - SWO (alternate 0).
* PB4 - PIN4 (input pullup).
* PB5 - PIN5 (input pullup).
* PB6 - SCL (alternate 4).
* PB7 - PIN7 (input pullup).
* PB8 - PIN8 (input pullup).
* PB9 - SDA (alternate 4).
* PB10 - CLK_IN (input pullup).
* PB11 - NOT_AVAILABLE (input floating).
* PB12 - PIN12 (input pullup).
* PB13 - PIN13 (input pullup).
* PB14 - PIN14 (input pullup).
* PB15 - PIN15 (input pullup).
*/
#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
PIN_MODE_INPUT(GPIOB_PIN1) | \
PIN_MODE_INPUT(GPIOB_PIN2) | \
PIN_MODE_ALTERNATE(GPIOB_SWO) | \
PIN_MODE_INPUT(GPIOB_PIN4) | \
PIN_MODE_INPUT(GPIOB_PIN5) | \
PIN_MODE_ALTERNATE(GPIOB_SCL) | \
PIN_MODE_INPUT(GPIOB_PIN7) | \
PIN_MODE_INPUT(GPIOB_PIN8) | \
PIN_MODE_ALTERNATE(GPIOB_SDA) | \
PIN_MODE_INPUT(GPIOB_CLK_IN) | \
PIN_MODE_INPUT(GPIOB_NOT_AVAILABLE) | \
PIN_MODE_INPUT(GPIOB_PIN12) | \
PIN_MODE_INPUT(GPIOB_PIN13) | \
PIN_MODE_INPUT(GPIOB_PIN14) | \
PIN_MODE_INPUT(GPIOB_PIN15))
#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOB_SWO) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
PIN_OTYPE_OPENDRAIN(GPIOB_SCL) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
PIN_OTYPE_OPENDRAIN(GPIOB_SDA) | \
PIN_OTYPE_PUSHPULL(GPIOB_CLK_IN) | \
PIN_OTYPE_PUSHPULL(GPIOB_NOT_AVAILABLE) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_100M(GPIOB_PIN0) | \
PIN_OSPEED_100M(GPIOB_PIN1) | \
PIN_OSPEED_100M(GPIOB_PIN2) | \
PIN_OSPEED_100M(GPIOB_SWO) | \
PIN_OSPEED_100M(GPIOB_PIN4) | \
PIN_OSPEED_100M(GPIOB_PIN5) | \
PIN_OSPEED_100M(GPIOB_SCL) | \
PIN_OSPEED_100M(GPIOB_PIN7) | \
PIN_OSPEED_100M(GPIOB_PIN8) | \
PIN_OSPEED_100M(GPIOB_SDA) | \
PIN_OSPEED_100M(GPIOB_CLK_IN) | \
PIN_OSPEED_100M(GPIOB_NOT_AVAILABLE) | \
PIN_OSPEED_100M(GPIOB_PIN12) | \
PIN_OSPEED_100M(GPIOB_PIN13) | \
PIN_OSPEED_100M(GPIOB_PIN14) | \
PIN_OSPEED_100M(GPIOB_PIN15))
#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
PIN_PUPDR_FLOATING(GPIOB_SWO) | \
PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
PIN_PUPDR_FLOATING(GPIOB_SCL) | \
PIN_PUPDR_PULLUP(GPIOB_PIN7) | \
PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
PIN_PUPDR_FLOATING(GPIOB_SDA) | \
PIN_PUPDR_PULLUP(GPIOB_CLK_IN) | \
PIN_PUPDR_FLOATING(GPIOB_NOT_AVAILABLE) | \
PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
PIN_PUPDR_PULLUP(GPIOB_PIN15))
#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
PIN_ODR_HIGH(GPIOB_PIN1) | \
PIN_ODR_HIGH(GPIOB_PIN2) | \
PIN_ODR_HIGH(GPIOB_SWO) | \
PIN_ODR_HIGH(GPIOB_PIN4) | \
PIN_ODR_HIGH(GPIOB_PIN5) | \
PIN_ODR_HIGH(GPIOB_SCL) | \
PIN_ODR_HIGH(GPIOB_PIN7) | \
PIN_ODR_HIGH(GPIOB_PIN8) | \
PIN_ODR_HIGH(GPIOB_SDA) | \
PIN_ODR_HIGH(GPIOB_CLK_IN) | \
PIN_ODR_HIGH(GPIOB_NOT_AVAILABLE) | \
PIN_ODR_HIGH(GPIOB_PIN12) | \
PIN_ODR_HIGH(GPIOB_PIN13) | \
PIN_ODR_HIGH(GPIOB_PIN14) | \
PIN_ODR_HIGH(GPIOB_PIN15))
#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
PIN_AFIO_AF(GPIOB_PIN1, 0) | \
PIN_AFIO_AF(GPIOB_PIN2, 0) | \
PIN_AFIO_AF(GPIOB_SWO, 0) | \
PIN_AFIO_AF(GPIOB_PIN4, 0) | \
PIN_AFIO_AF(GPIOB_PIN5, 0) | \
PIN_AFIO_AF(GPIOB_SCL, 4) | \
PIN_AFIO_AF(GPIOB_PIN7, 0))
#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
PIN_AFIO_AF(GPIOB_SDA, 4) | \
PIN_AFIO_AF(GPIOB_CLK_IN, 0) | \
PIN_AFIO_AF(GPIOB_NOT_AVAILABLE, 0) | \
PIN_AFIO_AF(GPIOB_PIN12, 0) | \
PIN_AFIO_AF(GPIOB_PIN13, 0) | \
PIN_AFIO_AF(GPIOB_PIN14, 0) | \
PIN_AFIO_AF(GPIOB_PIN15, 0))
/*
* GPIOC setup:
*
* PC0 - OTG_FS_POWER_ON (output pushpull maximum).
* PC1 - PIN1 (input pullup).
* PC2 - PIN2 (input pullup).
* PC3 - PDM_OUT (input pullup).
* PC4 - PIN4 (input pullup).
* PC5 - PIN5 (input pullup).
* PC6 - PIN6 (input pullup).
* PC7 - MCLK (alternate 6).
* PC8 - PIN8 (input pullup).
* PC9 - PIN9 (input pullup).
* PC10 - SCLK (alternate 6).
* PC11 - PIN11 (input pullup).
* PC12 - SDIN (alternate 6).
* PC13 - PIN13 (input pullup).
* PC14 - PIN14 (input pullup).
* PC15 - PIN15 (input pullup).
*/
#define VAL_GPIOC_MODER (PIN_MODE_OUTPUT(GPIOC_OTG_FS_POWER_ON) |\
PIN_MODE_INPUT(GPIOC_PIN1) | \
PIN_MODE_INPUT(GPIOC_PIN2) | \
PIN_MODE_INPUT(GPIOC_PDM_OUT) | \
PIN_MODE_INPUT(GPIOC_PIN4) | \
PIN_MODE_INPUT(GPIOC_PIN5) | \
PIN_MODE_INPUT(GPIOC_PIN6) | \
PIN_MODE_ALTERNATE(GPIOC_MCLK) | \
PIN_MODE_INPUT(GPIOC_PIN8) | \
PIN_MODE_INPUT(GPIOC_PIN9) | \
PIN_MODE_ALTERNATE(GPIOC_SCLK) | \
PIN_MODE_INPUT(GPIOC_PIN11) | \
PIN_MODE_ALTERNATE(GPIOC_SDIN) | \
PIN_MODE_INPUT(GPIOC_PIN13) | \
PIN_MODE_INPUT(GPIOC_PIN14) | \
PIN_MODE_INPUT(GPIOC_PIN15))
#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_OTG_FS_POWER_ON) |\
PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOC_PDM_OUT) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOC_MCLK) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOC_SCLK) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOC_SDIN) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_100M(GPIOC_OTG_FS_POWER_ON) |\
PIN_OSPEED_100M(GPIOC_PIN1) | \
PIN_OSPEED_100M(GPIOC_PIN2) | \
PIN_OSPEED_100M(GPIOC_PDM_OUT) | \
PIN_OSPEED_100M(GPIOC_PIN4) | \
PIN_OSPEED_100M(GPIOC_PIN5) | \
PIN_OSPEED_100M(GPIOC_PIN6) | \
PIN_OSPEED_100M(GPIOC_MCLK) | \
PIN_OSPEED_100M(GPIOC_PIN8) | \
PIN_OSPEED_100M(GPIOC_PIN9) | \
PIN_OSPEED_100M(GPIOC_SCLK) | \
PIN_OSPEED_100M(GPIOC_PIN11) | \
PIN_OSPEED_100M(GPIOC_SDIN) | \
PIN_OSPEED_100M(GPIOC_PIN13) | \
PIN_OSPEED_100M(GPIOC_PIN14) | \
PIN_OSPEED_100M(GPIOC_PIN15))
#define VAL_GPIOC_PUPDR (PIN_PUPDR_FLOATING(GPIOC_OTG_FS_POWER_ON) |\
PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
PIN_PUPDR_PULLUP(GPIOC_PDM_OUT) | \
PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
PIN_PUPDR_FLOATING(GPIOC_MCLK) | \
PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
PIN_PUPDR_FLOATING(GPIOC_SCLK) | \
PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
PIN_PUPDR_FLOATING(GPIOC_SDIN) | \
PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
PIN_PUPDR_PULLUP(GPIOC_PIN14) | \
PIN_PUPDR_PULLUP(GPIOC_PIN15))
#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_OTG_FS_POWER_ON) | \
PIN_ODR_HIGH(GPIOC_PIN1) | \
PIN_ODR_HIGH(GPIOC_PIN2) | \
PIN_ODR_HIGH(GPIOC_PDM_OUT) | \
PIN_ODR_HIGH(GPIOC_PIN4) | \
PIN_ODR_HIGH(GPIOC_PIN5) | \
PIN_ODR_HIGH(GPIOC_PIN6) | \
PIN_ODR_HIGH(GPIOC_MCLK) | \
PIN_ODR_HIGH(GPIOC_PIN8) | \
PIN_ODR_HIGH(GPIOC_PIN9) | \
PIN_ODR_HIGH(GPIOC_SCLK) | \
PIN_ODR_HIGH(GPIOC_PIN11) | \
PIN_ODR_HIGH(GPIOC_SDIN) | \
PIN_ODR_HIGH(GPIOC_PIN13) | \
PIN_ODR_HIGH(GPIOC_PIN14) | \
PIN_ODR_HIGH(GPIOC_PIN15))
#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_OTG_FS_POWER_ON, 0) |\
PIN_AFIO_AF(GPIOC_PIN1, 0) | \
PIN_AFIO_AF(GPIOC_PIN2, 0) | \
PIN_AFIO_AF(GPIOC_PDM_OUT, 0) | \
PIN_AFIO_AF(GPIOC_PIN4, 0) | \
PIN_AFIO_AF(GPIOC_PIN5, 0) | \
PIN_AFIO_AF(GPIOC_PIN6, 0) | \
PIN_AFIO_AF(GPIOC_MCLK, 6))
#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
PIN_AFIO_AF(GPIOC_PIN9, 0) | \
PIN_AFIO_AF(GPIOC_SCLK, 6) | \
PIN_AFIO_AF(GPIOC_PIN11, 0) | \
PIN_AFIO_AF(GPIOC_SDIN, 6) | \
PIN_AFIO_AF(GPIOC_PIN13, 0) | \
PIN_AFIO_AF(GPIOC_PIN14, 0) | \
PIN_AFIO_AF(GPIOC_PIN15, 0))
/*
* GPIOD setup:
*
* PD0 - PIN0 (input pullup).
* PD1 - PIN1 (input pullup).
* PD2 - PIN2 (input pullup).
* PD3 - PIN3 (input pullup).
* PD4 - RESET (output pushpull maximum).
* PD5 - OVER_CURRENT (input floating).
* PD6 - PIN6 (input pullup).
* PD7 - PIN7 (input pullup).
* PD8 - PIN8 (input pullup).
* PD9 - PIN9 (input pullup).
* PD10 - PIN10 (input pullup).
* PD11 - PIN11 (input pullup).
* PD12 - LED4 (output pushpull maximum).
* PD13 - LED3 (output pushpull maximum).
* PD14 - LED5 (output pushpull maximum).
* PD15 - LED6 (output pushpull maximum).
*/
#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
PIN_MODE_INPUT(GPIOD_PIN1) | \
PIN_MODE_INPUT(GPIOD_PIN2) | \
PIN_MODE_INPUT(GPIOD_PIN3) | \
PIN_MODE_OUTPUT(GPIOD_RESET) | \
PIN_MODE_INPUT(GPIOD_OVER_CURRENT) | \
PIN_MODE_INPUT(GPIOD_PIN6) | \
PIN_MODE_INPUT(GPIOD_PIN7) | \
PIN_MODE_INPUT(GPIOD_PIN8) | \
PIN_MODE_INPUT(GPIOD_PIN9) | \
PIN_MODE_INPUT(GPIOD_PIN10) | \
PIN_MODE_INPUT(GPIOD_PIN11) | \
PIN_MODE_OUTPUT(GPIOD_LED4) | \
PIN_MODE_OUTPUT(GPIOD_LED3) | \
PIN_MODE_OUTPUT(GPIOD_LED5) | \
PIN_MODE_OUTPUT(GPIOD_LED6))
#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
PIN_OTYPE_PUSHPULL(GPIOD_RESET) | \
PIN_OTYPE_PUSHPULL(GPIOD_OVER_CURRENT) |\
PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOD_LED4) | \
PIN_OTYPE_PUSHPULL(GPIOD_LED3) | \
PIN_OTYPE_PUSHPULL(GPIOD_LED5) | \
PIN_OTYPE_PUSHPULL(GPIOD_LED6))
#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_100M(GPIOD_PIN0) | \
PIN_OSPEED_100M(GPIOD_PIN1) | \
PIN_OSPEED_100M(GPIOD_PIN2) | \
PIN_OSPEED_100M(GPIOD_PIN3) | \
PIN_OSPEED_100M(GPIOD_RESET) | \
PIN_OSPEED_100M(GPIOD_OVER_CURRENT) | \
PIN_OSPEED_100M(GPIOD_PIN6) | \
PIN_OSPEED_100M(GPIOD_PIN7) | \
PIN_OSPEED_100M(GPIOD_PIN8) | \
PIN_OSPEED_100M(GPIOD_PIN9) | \
PIN_OSPEED_100M(GPIOD_PIN10) | \
PIN_OSPEED_100M(GPIOD_PIN11) | \
PIN_OSPEED_100M(GPIOD_LED4) | \
PIN_OSPEED_100M(GPIOD_LED3) | \
PIN_OSPEED_100M(GPIOD_LED5) | \
PIN_OSPEED_100M(GPIOD_LED6))
#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
PIN_PUPDR_FLOATING(GPIOD_RESET) | \
PIN_PUPDR_FLOATING(GPIOD_OVER_CURRENT) |\
PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
PIN_PUPDR_FLOATING(GPIOD_LED4) | \
PIN_PUPDR_FLOATING(GPIOD_LED3) | \
PIN_PUPDR_FLOATING(GPIOD_LED5) | \
PIN_PUPDR_FLOATING(GPIOD_LED6))
#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
PIN_ODR_HIGH(GPIOD_PIN1) | \
PIN_ODR_HIGH(GPIOD_PIN2) | \
PIN_ODR_HIGH(GPIOD_PIN3) | \
PIN_ODR_HIGH(GPIOD_RESET) | \
PIN_ODR_HIGH(GPIOD_OVER_CURRENT) | \
PIN_ODR_HIGH(GPIOD_PIN6) | \
PIN_ODR_HIGH(GPIOD_PIN7) | \
PIN_ODR_HIGH(GPIOD_PIN8) | \
PIN_ODR_HIGH(GPIOD_PIN9) | \
PIN_ODR_HIGH(GPIOD_PIN10) | \
PIN_ODR_HIGH(GPIOD_PIN11) | \
PIN_ODR_LOW(GPIOD_LED4) | \
PIN_ODR_LOW(GPIOD_LED3) | \
PIN_ODR_LOW(GPIOD_LED5) | \
PIN_ODR_LOW(GPIOD_LED6))
#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
PIN_AFIO_AF(GPIOD_PIN1, 0) | \
PIN_AFIO_AF(GPIOD_PIN2, 0) | \
PIN_AFIO_AF(GPIOD_PIN3, 0) | \
PIN_AFIO_AF(GPIOD_RESET, 0) | \
PIN_AFIO_AF(GPIOD_OVER_CURRENT, 0) | \
PIN_AFIO_AF(GPIOD_PIN6, 0) | \
PIN_AFIO_AF(GPIOD_PIN7, 0))
#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
PIN_AFIO_AF(GPIOD_PIN9, 0) | \
PIN_AFIO_AF(GPIOD_PIN10, 0) | \
PIN_AFIO_AF(GPIOD_PIN11, 0) | \
PIN_AFIO_AF(GPIOD_LED4, 0) | \
PIN_AFIO_AF(GPIOD_LED3, 0) | \
PIN_AFIO_AF(GPIOD_LED5, 0) | \
PIN_AFIO_AF(GPIOD_LED6, 0))
/*
* GPIOE setup:
*
* PE0 - INT1 (input floating).
* PE1 - INT2 (input floating).
* PE2 - LSM_DRDY (input floating).
* PE3 - CS_SPI (output pushpull maximum).
* PE4 - LSM_INT1 (input floating).
* PE5 - LSM_INT2 (input floating).
* PE6 - PIN6 (input floating).
* PE7 - PIN7 (input floating).
* PE8 - PIN8 (input floating).
* PE9 - PIN9 (input floating).
* PE10 - PIN10 (input floating).
* PE11 - PIN11 (input floating).
* PE12 - PIN12 (input floating).
* PE13 - PIN13 (input floating).
* PE14 - PIN14 (input floating).
* PE15 - PIN15 (input floating).
*/
#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_INT1) | \
PIN_MODE_INPUT(GPIOE_INT2) | \
PIN_MODE_INPUT(GPIOE_LSM_DRDY) | \
PIN_MODE_OUTPUT(GPIOE_CS_SPI) | \
PIN_MODE_INPUT(GPIOE_LSM_INT1) | \
PIN_MODE_INPUT(GPIOE_LSM_INT2) | \
PIN_MODE_INPUT(GPIOE_PIN6) | \
PIN_MODE_INPUT(GPIOE_PIN7) | \
PIN_MODE_INPUT(GPIOE_PIN8) | \
PIN_MODE_INPUT(GPIOE_PIN9) | \
PIN_MODE_INPUT(GPIOE_PIN10) | \
PIN_MODE_INPUT(GPIOE_PIN11) | \
PIN_MODE_INPUT(GPIOE_PIN12) | \
PIN_MODE_INPUT(GPIOE_PIN13) | \
PIN_MODE_INPUT(GPIOE_PIN14) | \
PIN_MODE_INPUT(GPIOE_PIN15))
#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_INT1) | \
PIN_OTYPE_PUSHPULL(GPIOE_INT2) | \
PIN_OTYPE_PUSHPULL(GPIOE_LSM_DRDY) | \
PIN_OTYPE_PUSHPULL(GPIOE_CS_SPI) | \
PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT1) | \
PIN_OTYPE_PUSHPULL(GPIOE_LSM_INT2) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN10) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN14) | \
PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_100M(GPIOE_INT1) | \
PIN_OSPEED_100M(GPIOE_INT2) | \
PIN_OSPEED_100M(GPIOE_LSM_DRDY) | \
PIN_OSPEED_100M(GPIOE_CS_SPI) | \
PIN_OSPEED_100M(GPIOE_LSM_INT1) | \
PIN_OSPEED_100M(GPIOE_LSM_INT2) | \
PIN_OSPEED_100M(GPIOE_PIN6) | \
PIN_OSPEED_100M(GPIOE_PIN7) | \
PIN_OSPEED_100M(GPIOE_PIN8) | \
PIN_OSPEED_100M(GPIOE_PIN9) | \
PIN_OSPEED_100M(GPIOE_PIN10) | \
PIN_OSPEED_100M(GPIOE_PIN11) | \
PIN_OSPEED_100M(GPIOE_PIN12) | \
PIN_OSPEED_100M(GPIOE_PIN13) | \
PIN_OSPEED_100M(GPIOE_PIN14) | \
PIN_OSPEED_100M(GPIOE_PIN15))
#define VAL_GPIOE_PUPDR (PIN_PUPDR_FLOATING(GPIOE_INT1) | \
PIN_PUPDR_FLOATING(GPIOE_INT2) | \
PIN_PUPDR_FLOATING(GPIOE_LSM_DRDY) | \
PIN_PUPDR_FLOATING(GPIOE_CS_SPI) | \
PIN_PUPDR_FLOATING(GPIOE_LSM_INT1) | \
PIN_PUPDR_FLOATING(GPIOE_LSM_INT2) | \
PIN_PUPDR_FLOATING(GPIOE_PIN6) | \
PIN_PUPDR_FLOATING(GPIOE_PIN7) | \
PIN_PUPDR_FLOATING(GPIOE_PIN8) | \
PIN_PUPDR_FLOATING(GPIOE_PIN9) | \
PIN_PUPDR_FLOATING(GPIOE_PIN10) | \
PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
PIN_PUPDR_FLOATING(GPIOE_PIN12) | \
PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
PIN_PUPDR_FLOATING(GPIOE_PIN14) | \
PIN_PUPDR_FLOATING(GPIOE_PIN15))
#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_INT1) | \
PIN_ODR_HIGH(GPIOE_INT2) | \
PIN_ODR_HIGH(GPIOE_LSM_DRDY) | \
PIN_ODR_HIGH(GPIOE_CS_SPI) | \
PIN_ODR_HIGH(GPIOE_LSM_INT1) | \
PIN_ODR_HIGH(GPIOE_LSM_INT2) | \
PIN_ODR_HIGH(GPIOE_PIN6) | \
PIN_ODR_HIGH(GPIOE_PIN7) | \
PIN_ODR_HIGH(GPIOE_PIN8) | \
PIN_ODR_HIGH(GPIOE_PIN9) | \
PIN_ODR_HIGH(GPIOE_PIN10) | \
PIN_ODR_HIGH(GPIOE_PIN11) | \
PIN_ODR_HIGH(GPIOE_PIN12) | \
PIN_ODR_HIGH(GPIOE_PIN13) | \
PIN_ODR_HIGH(GPIOE_PIN14) | \
PIN_ODR_HIGH(GPIOE_PIN15))
#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_INT1, 0) | \
PIN_AFIO_AF(GPIOE_INT2, 0) | \
PIN_AFIO_AF(GPIOE_LSM_DRDY, 0) | \
PIN_AFIO_AF(GPIOE_CS_SPI, 0) | \
PIN_AFIO_AF(GPIOE_LSM_INT1, 0) | \
PIN_AFIO_AF(GPIOE_LSM_INT2, 0) | \
PIN_AFIO_AF(GPIOE_PIN6, 0) | \
PIN_AFIO_AF(GPIOE_PIN7, 0))
#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
PIN_AFIO_AF(GPIOE_PIN9, 0) | \
PIN_AFIO_AF(GPIOE_PIN10, 0) | \
PIN_AFIO_AF(GPIOE_PIN11, 0) | \
PIN_AFIO_AF(GPIOE_PIN12, 0) | \
PIN_AFIO_AF(GPIOE_PIN13, 0) | \
PIN_AFIO_AF(GPIOE_PIN14, 0) | \
PIN_AFIO_AF(GPIOE_PIN15, 0))
/*
* GPIOH setup:
*
* PH0 - OSC_IN (input floating).
* PH1 - OSC_OUT (input floating).
* PH2 - PIN2 (input floating).
* PH3 - PIN3 (input floating).
* PH4 - PIN4 (input floating).
* PH5 - PIN5 (input floating).
* PH6 - PIN6 (input floating).
* PH7 - PIN7 (input floating).
* PH8 - PIN8 (input floating).
* PH9 - PIN9 (input floating).
* PH10 - PIN10 (input floating).
* PH11 - PIN11 (input floating).
* PH12 - PIN12 (input floating).
* PH13 - PIN13 (input floating).
* PH14 - PIN14 (input floating).
* PH15 - PIN15 (input floating).
*/
#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_OSC_IN) | \
PIN_MODE_INPUT(GPIOH_OSC_OUT))
#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_OSC_IN) | \
PIN_OTYPE_PUSHPULL(GPIOH_OSC_OUT))
#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_100M(GPIOH_OSC_IN) | \
PIN_OSPEED_100M(GPIOH_OSC_OUT))
#define VAL_GPIOH_PUPDR (PIN_PUPDR_FLOATING(GPIOH_OSC_IN) | \
PIN_PUPDR_FLOATING(GPIOH_OSC_OUT))
#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_OSC_IN) | \
PIN_ODR_HIGH(GPIOH_OSC_OUT))
#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_OSC_IN, 0) | \
PIN_AFIO_AF(GPIOH_OSC_OUT, 0))
#define VAL_GPIOH_AFRH (0)
#if !defined(_FROM_ASM_)
#ifdef __cplusplus
extern "C" {
#endif
void boardInit(void);
#ifdef __cplusplus
}
#endif
#endif /* _FROM_ASM_ */
#endif /* _BOARD_H_ */

5
boards/ST_STM32F401C_DISCOVERY/board.mk
View File

@ -1,5 +0,0 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/ST_STM32F401C_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/ST_STM32F401C_DISCOVERY

Some files were not shown because too many files have changed in this diff Show More