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Regenerated board files using latest templates. 

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7581 35acf78f-673a-0410-8e92-d51de3d6d3f4
This commit is contained in:
gdisirio 2014-12-13 21:17:22 +00:00
parent 2014cfd445
commit c2ecbaa307
41 changed files with 1329 additions and 1942 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

41
os/hal/boards/OLIMEX_STM32_E407/board.c
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,26 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -60,10 +77,10 @@ void __early_init(void) {
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
static bool last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
static bool last_status = false;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);
}
@ -71,9 +88,9 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
(void)sdcp;
return false;
}
#endif /* HAL_USE_SDC */
@ -85,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -95,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/OLIMEX_STM32_E407/board.h
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

9
os/hal/boards/OLIMEX_STM32_E407/cfg/board.chcfg
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@ -5,24 +5,25 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>Olimex STM32-E407</board_name>
<board_id>OLIMEX_STM32_E407</board_id>
<board_functions>
<sdc_lld_is_card_inserted><![CDATA[ static bool_t last_status = FALSE;
<sdc_lld_is_card_inserted><![CDATA[ static bool last_status = false;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
<sdc_lld_is_write_protected>
<![CDATA[ (void)sdcp;
return FALSE;]]></sdc_lld_is_write_protected>
return false;]]></sdc_lld_is_write_protected>
</board_functions>
<ethernet_phy>
<identifier>MII_KS8721_ID</identifier>
<bus_type>RMII</bus_type>
</ethernet_phy>
<subtype>STM32F40_41xxx</subtype>
<subtype>STM32F407xx</subtype>
<clocks
HSEFrequency="12000000"
HSEBypass="false"

43
os/hal/boards/OLIMEX_STM32_H407/board.c
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,26 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -60,20 +77,20 @@ void __early_init(void) {
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
static bool_t last_status = FALSE;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);
static bool last_status = false;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
return FALSE;
(void)sdcp;
return false;
}
#endif /* HAL_USE_SDC */
@ -85,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -95,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/OLIMEX_STM32_H407/board.h
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

4
os/hal/boards/OLIMEX_STM32_H407/board.mk
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@ -1,5 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/boards/OLIMEX_STM32_H407/board.c
BOARDSRC = ${CHIBIOS}/os/hal/boards/OLIMEX_STM32_H407/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/boards/OLIMEX_STM32_H407
BOARDINC = ${CHIBIOS}/os/hal/boards/OLIMEX_STM32_H407

9
os/hal/boards/OLIMEX_STM32_H407/cfg/board.chcfg
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@ -5,24 +5,25 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>Olimex STM32-H407</board_name>
<board_id>OLIMEX_STM32_H407</board_id>
<board_functions>
<sdc_lld_is_card_inserted><![CDATA[ static bool_t last_status = FALSE;
<sdc_lld_is_card_inserted><![CDATA[ static bool last_status = false;
if (blkIsTransferring(sdcp))
return last_status;
return last_status = (bool_t)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
return last_status = (bool)palReadPad(GPIOC, GPIOC_SD_D3);]]></sdc_lld_is_card_inserted>
<sdc_lld_is_write_protected>
<![CDATA[ (void)sdcp;
return FALSE;]]></sdc_lld_is_write_protected>
return false;]]></sdc_lld_is_write_protected>
</board_functions>
<ethernet_phy>
<identifier>MII_KS8721_ID</identifier>
<bus_type>RMII</bus_type>
</ethernet_phy>
<subtype>STM32F40_41xxx</subtype>
<subtype>STM32F407xx</subtype>
<clocks
HSEFrequency="12000000"
HSEBypass="false"

37
os/hal/boards/ST_NUCLEO_F030R8/board.c
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,18 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -55,7 +80,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -65,7 +90,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_NUCLEO_F030R8/board.h
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@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_NUCLEO_F030R8/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics NUCLEO-F030R8</board_name>
<board_id>ST_NUCLEO_F030R8</board_id>
<board_functions></board_functions>
<subtype>STM32F030</subtype>
<subtype>STM32F030x8</subtype>
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>

249
os/hal/boards/ST_NUCLEO_F334R8/board.c
View File

@ -1,125 +1,124 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}
/*
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
http://www.apache.org/licenses/LICENSE-2.0
Unless required by applicable law or agreed to in writing, software
distributed under the License is distributed on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
*/
#include "hal.h"
#if HAL_USE_PAL || defined(__DOXYGEN__)
/**
* @brief PAL setup.
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
/**
* @brief Early initialization code.
* @details This initialization must be performed just after stack setup
* and before any other initialization.
*/
void __early_init(void) {
stm32_clock_init();
}
#if HAL_USE_SDC || defined(__DOXYGEN__)
/**
* @brief SDC card detection.
*/
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return true;
}
/**
* @brief SDC card write protection detection.
*/
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return false;
}
#endif /* HAL_USE_SDC */
#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
/**
* @brief MMC_SPI card detection.
*/
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return true;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return false;
}
#endif
/**
* @brief Board-specific initialization code.
* @todo Add your board-specific code, if any.
*/
void boardInit(void) {
}

2181
os/hal/boards/ST_NUCLEO_F334R8/board.h
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File diff suppressed because it is too large Load Diff

10
os/hal/boards/ST_NUCLEO_F334R8/board.mk
View File

@ -1,5 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F334R8/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F334R8
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F334R8/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_NUCLEO_F334R8

409
os/hal/boards/ST_NUCLEO_F334R8/cfg/board.chcfg
View File

@ -2,21 +2,18 @@
<!-- STM32F4xx board Template -->
<board
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f4xx_board.xsd">
xsi:noNamespaceSchemaLocation="http://www.chibios.org/xml/schema/boards/stm32f3xx_board.xsd">
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<templates_path>resources/gencfg/processors/boards/stm32f3xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics NUCLEO-F401RE</board_name>
<board_id>ST_NUCLEO_F401RE</board_id>
<board_name>STMicroelectronics NUCLEO-F334R8</board_name>
<board_id>ST_NUCLEO_F334R8</board_id>
<board_functions></board_functions>
<subtype>STM32F334xx</subtype>
<clocks
HSEFrequency="0"
HSEBypass="false"
LSEFrequency="0"
LSEBypass="false"
VDD="300" />
<subtype>STM32F334x8</subtype>
<clocks HSEFrequency="0" HSEBypass="false" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>
<GPIOA>
<pin0
@ -798,395 +795,5 @@
Mode="Input"
Alternate="0" />
</GPIOF>
<GPIOG>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin3
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
</GPIOG>
<GPIOH>
<pin0
ID="OSC_IN"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin1
ID="OSC_OUT"
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" ></pin2>
<pin3
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
</GPIOH>
<GPIOI>
<pin0
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin1
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin2
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin3
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin4
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin5
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin6
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin7
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin8
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin9
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin10
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin11
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin12
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin13
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin14
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
<pin15
ID=""
Type="PushPull"
Level="High"
Speed="Maximum"
Resistor="Floating"
Mode="Input"
Alternate="0" />
</GPIOI>
</ports>
</board>

13
os/hal/boards/ST_NUCLEO_F401RE/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,8 +22,7 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
@ -81,7 +80,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -91,7 +90,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -103,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -113,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_NUCLEO_F401RE/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_NUCLEO_F401RE/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics NUCLEO-F401RE</board_name>
<board_id>ST_NUCLEO_F401RE</board_id>
<board_functions></board_functions>
<subtype>STM32F401xx</subtype>
<subtype>STM32F401xE</subtype>
<clocks
HSEFrequency="0"
HSEBypass="false"

12
os/hal/boards/ST_NUCLEO_L152RE/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -53,7 +53,7 @@ const PALConfig pal_default_config = {
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
@ -80,7 +80,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -90,7 +90,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -102,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -112,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_NUCLEO_L152RE/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

1
os/hal/boards/ST_NUCLEO_L152RE/cfg/board.chcfg
View File

@ -6,6 +6,7 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32l1xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics NUCLEO-L152RE</board_name>
<board_id>ST_NUCLEO_L152RE</board_id>

39
os/hal/boards/ST_STM32373C_EVAL/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,20 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -57,7 +80,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -67,7 +90,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -79,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -89,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_STM32373C_EVAL/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_STM32373C_EVAL/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f3xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics STM32373C-EVAL</board_name>
<board_id>ST_STM32373C_EVAL</board_id>
<board_functions></board_functions>
<subtype>STM32F37X</subtype>
<subtype>STM32F373xC</subtype>
<clocks HSEFrequency="8000000" HSEBypass="false" LSEFrequency="32768"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>

2
os/hal/boards/ST_STM32F072B_DISCOVERY/board.c
View File

@ -53,7 +53,7 @@ const PALConfig pal_default_config = {
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,

6
os/hal/boards/ST_STM32F072B_DISCOVERY/board.h
View File

@ -18,14 +18,14 @@
#define _BOARD_H_
/*
* Setup for ST STM32F072-Discovery board.
* Setup for ST STM32F072B-Discovery board.
*/
/*
* Board identifier.
*/
#define BOARD_ST_STM32F072_DISCOVERY
#define BOARD_NAME "ST STM32F072-Discovery"
#define BOARD_ST_STM32F072B_DISCOVERY
#define BOARD_NAME "ST STM32F072B-Discovery"
/*
* Board oscillators-related settings.

4
os/hal/boards/ST_STM32F072B_DISCOVERY/board.mk
View File

@ -1,5 +1,5 @@
# List of all the board related files.
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_STM32F072_DISCOVERY/board.c
BOARDSRC = ${CHIBIOS}/os/hal/boards/ST_STM32F072B_DISCOVERY/board.c
# Required include directories
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_STM32F072_DISCOVERY
BOARDINC = ${CHIBIOS}/os/hal/boards/ST_STM32F072B_DISCOVERY

5
os/hal/boards/ST_STM32F072B_DISCOVERY/cfg/board.chcfg
View File

@ -6,9 +6,10 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>ST STM32F072-Discovery</board_name>
<board_id>ST_STM32F072_DISCOVERY</board_id>
<board_name>ST STM32F072B-Discovery</board_name>
<board_id>ST_STM32F072B_DISCOVERY</board_id>
<board_functions></board_functions>
<subtype>STM32F072xB</subtype>
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"

37
os/hal/boards/ST_STM32F0_DISCOVERY/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,18 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -55,7 +80,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -65,7 +90,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_STM32F0_DISCOVERY/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_STM32F0_DISCOVERY/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f0xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>ST STM32F0-Discovery</board_name>
<board_id>ST_STM32F0_DISCOVERY</board_id>
<board_functions></board_functions>
<subtype>STM32F0XX_MD</subtype>
<subtype>STM32F051x8</subtype>
<clocks HSEFrequency="0" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>

39
os/hal/boards/ST_STM32F3_DISCOVERY/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,20 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH}
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -57,7 +80,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -67,7 +90,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -79,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -89,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_STM32F3_DISCOVERY/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_STM32F3_DISCOVERY/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f3xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics STM32F3-Discovery</board_name>
<board_id>ST_STM32F3_DISCOVERY</board_id>
<board_functions></board_functions>
<subtype>STM32F30X</subtype>
<subtype>STM32F303xC</subtype>
<clocks HSEFrequency="8000000" HSEBypass="true" LSEFrequency="0"
LSEBypass="false" LSEDrive="3 High Drive (default)" />
<ports>

39
os/hal/boards/ST_STM32F429I_DISCOVERY/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,26 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -59,21 +76,21 @@ void __early_init(void) {
/**
* @brief SDC card detection.
*/
bool_t sdc_lld_is_card_inserted(SDCDriver *sdcp) {
bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
* @brief SDC card write protection detection.
*/
bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -81,21 +98,21 @@ bool_t sdc_lld_is_write_protected(SDCDriver *sdcp) {
/**
* @brief MMC_SPI card detection.
*/
bool_t mmc_lld_is_card_inserted(MMCDriver *mmcp) {
bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
* @brief MMC_SPI card write protection detection.
*/
bool_t mmc_lld_is_write_protected(MMCDriver *mmcp) {
bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_STM32F429I_DISCOVERY/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

3
os/hal/boards/ST_STM32F429I_DISCOVERY/cfg/board.chcfg
View File

@ -6,11 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics STM32F429I-Discovery</board_name>
<board_id>ST_STM32F429I_DISCOVERY</board_id>
<board_functions></board_functions>
<subtype>STM32F429_439xx</subtype>
<subtype>STM32F429xx</subtype>
<clocks
HSEFrequency="8000000"
HSEBypass="false"

2
os/hal/boards/ST_STM32F4_DISCOVERY/board.c
View File

@ -53,7 +53,7 @@ const PALConfig pal_default_config = {
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,

1
os/hal/boards/ST_STM32F4_DISCOVERY/cfg/board.chcfg
View File

@ -6,6 +6,7 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32f4xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>STMicroelectronics STM32F4-Discovery</board_name>
<board_id>ST_STM32F4_DISCOVERY</board_id>

39
os/hal/boards/ST_STM32L_DISCOVERY/board.c
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
@ -22,20 +22,43 @@
* @details Digital I/O ports static configuration as defined in @p board.h.
* This variable is used by the HAL when initializing the PAL driver.
*/
const PALConfig pal_default_config =
{
const PALConfig pal_default_config = {
#if STM32_HAS_GPIOA
{VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
#endif
#if STM32_HAS_GPIOB
{VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
#endif
#if STM32_HAS_GPIOC
{VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
#endif
#if STM32_HAS_GPIOD
{VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
#endif
#if STM32_HAS_GPIOE
{VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
#endif
#if STM32_HAS_GPIOF
{VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
#endif
#if STM32_HAS_GPIOG
{VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
#endif
#if STM32_HAS_GPIOH
{VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
#endif
#if STM32_HAS_GPIOI
{VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
#endif
};
#endif
@ -57,7 +80,7 @@ bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -67,7 +90,7 @@ bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
(void)sdcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif /* HAL_USE_SDC */
@ -79,7 +102,7 @@ bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return TRUE;
return true;
}
/**
@ -89,7 +112,7 @@ bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
(void)mmcp;
/* TODO: Fill the implementation.*/
return FALSE;
return false;
}
#endif

2
os/hal/boards/ST_STM32L_DISCOVERY/board.h
View File

@ -1,5 +1,5 @@
/*
ChibiOS/RT - Copyright (C) 2006-2014 Giovanni Di Sirio
ChibiOS - Copyright (C) 2006-2014 Giovanni Di Sirio
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.

2
os/hal/boards/ST_STM32L_DISCOVERY/cfg/board.chcfg
View File

@ -6,10 +6,12 @@
<configuration_settings>
<templates_path>resources/gencfg/processors/boards/stm32l1xx/templates</templates_path>
<output_path>..</output_path>
<hal_version>3.0.x</hal_version>
</configuration_settings>
<board_name>ST STM32L-Discovery</board_name>
<board_id>ST_STM32L_DISCOVERY</board_id>
<board_functions></board_functions>
<subtype>STM32L1XX_MD</subtype>
<clocks
HSEFrequency="0"
HSEBypass="true"