diff --git a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h
index 681fd528a..29e736380 100644
--- a/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h
+++ b/demos/STM32/RT-STM32G071RB-NUCLEO64/cfg/mcuconf.h
@@ -40,9 +40,7 @@
*/
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_RANGE1
-#define STM32_PWR_CR2 (STM32_PVDRT_LEV0 | \
- STM32_PVDFT_LEV0 | \
- STM32_PVDE_DISABLED)
+#define STM32_PWR_CR2 (STM32_PVDRT_LEV0 | STM32_PVDFT_LEV0 | STM32_PVDE_DISABLED)
#define STM32_HSIDIV_VALUE 1
#define STM32_HSI16_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
@@ -105,7 +103,6 @@
#define STM32_GPT_USE_TIM3 FALSE
#define STM32_GPT_USE_TIM6 FALSE
#define STM32_GPT_USE_TIM7 FALSE
-#define STM32_GPT_USE_TIM8 FALSE
#define STM32_GPT_TIM1_IRQ_PRIORITY 1
#define STM32_GPT_TIM2_IRQ_PRIORITY 1
#define STM32_GPT_TIM3_IRQ_PRIORITY 1
diff --git a/tools/ftl/processors/conf/mcuconf_stm32g071xx/mcuconf.h.ftl b/tools/ftl/processors/conf/mcuconf_stm32g071xx/mcuconf.h.ftl
new file mode 100644
index 000000000..422855370
--- /dev/null
+++ b/tools/ftl/processors/conf/mcuconf_stm32g071xx/mcuconf.h.ftl
@@ -0,0 +1,224 @@
+[#ftl]
+[#--
+ ChibiOS - Copyright (C) 2006..2019 Giovanni Di Sirio.
+
+ This file is part of ChibiOS.
+
+ ChibiOS is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see .
+ --]
+[@pp.dropOutputFile /]
+[#import "/@lib/libutils.ftl" as utils /]
+[#import "/@lib/liblicense.ftl" as license /]
+[@pp.changeOutputFile name="mcuconf.h" /]
+/*
+[@license.EmitLicenseAsText /]
+*/
+
+/*
+ * STM32L4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 3...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+#define STM32G0xx_MCUCONF
+#define STM32G071_MCUCONF
+#define STM32G081_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT ${doc.STM32_NO_INIT!"FALSE"}
+#define STM32_VOS ${doc.STM32_VOS!"STM32_VOS_RANGE1"}
+#define STM32_PWR_CR2 ${doc.STM32_PWR_CR2!"(STM32_PVDRT_LEV0 | STM32_PVDFT_LEV0 | STM32_PVDE_DISABLED)"}
+#define STM32_HSIDIV_VALUE ${doc.STM32_HSIDIV_VALUE!"1"}
+#define STM32_HSI16_ENABLED ${doc.STM32_HSI16_ENABLED!"TRUE"}
+#define STM32_HSE_ENABLED ${doc.STM32_HSE_ENABLED!"FALSE"}
+#define STM32_LSI_ENABLED ${doc.STM32_LSI_ENABLED!"FALSE"}
+#define STM32_LSE_ENABLED ${doc.STM32_LSE_ENABLED!"FALSE"}
+#define STM32_SW ${doc.STM32_SW!"STM32_SW_PLLRCLK"}
+#define STM32_PLLSRC ${doc.STM32_PLLSRC!"STM32_PLLSRC_HSI16"}
+#define STM32_PLLM_VALUE ${doc.STM32_PLLM_VALUE!"2"}
+#define STM32_PLLN_VALUE ${doc.STM32_PLLN_VALUE!"16"}
+#define STM32_PLLP_VALUE ${doc.STM32_PLLP_VALUE!"4"}
+#define STM32_PLLQ_VALUE ${doc.STM32_PLLQ_VALUE!"4"}
+#define STM32_PLLR_VALUE ${doc.STM32_PLLR_VALUE!"2"}
+#define STM32_HPRE ${doc.STM32_HPRE!"STM32_HPRE_DIV1"}
+#define STM32_PPRE ${doc.STM32_PPRE!"STM32_PPRE_DIV1"}
+#define STM32_MCOSEL ${doc.STM32_MCOSEL!"STM32_MCOSEL_NOCLOCK"}
+#define STM32_MCOPRE ${doc.STM32_MCOPRE!"STM32_MCOPRE_DIV1"}
+#define STM32_LSCOSEL ${doc.STM32_LSCOSEL!"STM32_LSCOSEL_NOCLOCK"}
+
+/*
+ * Peripherals clocks and sources.
+ */
+#define STM32_USART1SEL ${doc.STM32_USART1SEL!"STM32_USART1SEL_SYSCLK"}
+#define STM32_USART2SEL ${doc.STM32_USART2SEL!"STM32_USART2SEL_SYSCLK"}
+#define STM32_LPUART1SEL ${doc.STM32_LPUART1SEL!"STM32_LPUART1SEL_SYSCLK"}
+#define STM32_CECSEL ${doc.STM32_CECSEL!"STM32_CECSEL_HSI16DIV"}
+#define STM32_I2C1SEL ${doc.STM32_I2C1SEL!"STM32_I2C1SEL_PCLK"}
+#define STM32_I2S1SEL ${doc.STM32_I2S1SEL!"STM32_I2S1SEL_SYSCLK"}
+#define STM32_LPTIM1SEL ${doc.STM32_LPTIM1SEL!"STM32_LPTIM1SEL_PCLK"}
+#define STM32_LPTIM2SEL ${doc.STM32_LPTIM2SEL!"STM32_LPTIM2SEL_PCLK"}
+#define STM32_TIM1SEL ${doc.STM32_TIM1SEL!"STM32_TIM1SEL_TIMPCLK"}
+#define STM32_TIM15SEL ${doc.STM32_TIM15SEL!"STM32_TIM15SEL_TIMPCLK"}
+#define STM32_RNGSEL ${doc.STM32_RNGSEL!"STM32_RNGSEL_HSI16"}
+#define STM32_RNGDIV_VALUE ${doc.STM32_RNGDIV_VALUE!"1"}
+#define STM32_ADCSEL ${doc.STM32_ADCSEL!"STM32_ADCSEL_PLLPCLK"}
+#define STM32_RTCSEL ${doc.STM32_RTCSEL!"STM32_RTCSEL_NOCLOCK"}
+
+/*
+ * Shared IRQ settings.
+ */
+#define STM32_IRQ_EXTI0_1_PRIORITY ${doc.STM32_IRQ_EXTI0_1_PRIORITY!"3"}
+#define STM32_IRQ_EXTI2_3_PRIORITY ${doc.STM32_IRQ_EXTI2_3_PRIORITY!"3"}
+#define STM32_IRQ_EXTI4_15_PRIORITY ${doc.STM32_IRQ_EXTI4_15_PRIORITY!"3"}
+#define STM32_IRQ_EXTI16_PRIORITY ${doc.STM32_IRQ_EXTI16_PRIORITY!"3"}
+#define STM32_IRQ_EXTI17_18_PRIORITY ${doc.STM32_IRQ_EXTI17_18_PRIORITY!"3"}
+#define STM32_IRQ_USART3_4_LP1_PRIORITY ${doc.STM32_IRQ_USART3_4_LP1_PRIORITY!"3"}
+
+/*
+ * ADC driver system settings.
+ */
+
+/*
+ * DAC driver system settings.
+ */
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 ${doc.STM32_GPT_USE_TIM1!"FALSE"}
+#define STM32_GPT_USE_TIM2 ${doc.STM32_GPT_USE_TIM2!"FALSE"}
+#define STM32_GPT_USE_TIM3 ${doc.STM32_GPT_USE_TIM3!"FALSE"}
+#define STM32_GPT_USE_TIM6 ${doc.STM32_GPT_USE_TIM6!"FALSE"}
+#define STM32_GPT_USE_TIM7 ${doc.STM32_GPT_USE_TIM7!"FALSE"}
+#define STM32_GPT_TIM1_IRQ_PRIORITY ${doc.STM32_GPT_TIM1_IRQ_PRIORITY!"1"}
+#define STM32_GPT_TIM2_IRQ_PRIORITY ${doc.STM32_GPT_TIM2_IRQ_PRIORITY!"1"}
+#define STM32_GPT_TIM3_IRQ_PRIORITY ${doc.STM32_GPT_TIM3_IRQ_PRIORITY!"1"}
+#define STM32_GPT_TIM6_IRQ_PRIORITY ${doc.STM32_GPT_TIM6_IRQ_PRIORITY!"1"}
+#define STM32_GPT_TIM7_IRQ_PRIORITY ${doc.STM32_GPT_TIM7_IRQ_PRIORITY!"1"}
+
+/*
+ * I2C driver system settings.
+ */
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 ${doc.STM32_ICU_USE_TIM1!"FALSE"}
+#define STM32_ICU_USE_TIM2 ${doc.STM32_ICU_USE_TIM2!"FALSE"}
+#define STM32_ICU_USE_TIM3 ${doc.STM32_ICU_USE_TIM3!"FALSE"}
+#define STM32_ICU_TIM1_IRQ_PRIORITY ${doc.STM32_ICU_TIM1_IRQ_PRIORITY!"1"}
+#define STM32_ICU_TIM2_IRQ_PRIORITY ${doc.STM32_ICU_TIM2_IRQ_PRIORITY!"1"}
+#define STM32_ICU_TIM3_IRQ_PRIORITY ${doc.STM32_ICU_TIM3_IRQ_PRIORITY!"1"}
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED ${doc.STM32_PWM_USE_ADVANCED!"FALSE"}
+#define STM32_PWM_USE_TIM1 ${doc.STM32_PWM_USE_TIM1!"FALSE"}
+#define STM32_PWM_USE_TIM2 ${doc.STM32_PWM_USE_TIM2!"FALSE"}
+#define STM32_PWM_USE_TIM3 ${doc.STM32_PWM_USE_TIM3!"FALSE"}
+#define STM32_PWM_TIM1_IRQ_PRIORITY ${doc.STM32_PWM_TIM1_IRQ_PRIORITY!"1"}
+#define STM32_PWM_TIM2_IRQ_PRIORITY ${doc.STM32_PWM_TIM2_IRQ_PRIORITY!"1"}
+#define STM32_PWM_TIM3_IRQ_PRIORITY ${doc.STM32_PWM_TIM3_IRQ_PRIORITY!"1"}
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE ${doc.STM32_RTC_PRESA_VALUE!"32"}
+#define STM32_RTC_PRESS_VALUE ${doc.STM32_RTC_PRESS_VALUE!"1024"}
+#define STM32_RTC_CR_INIT ${doc.STM32_RTC_CR_INIT!"0"}
+#define STM32_RTC_TAMPCR_INIT ${doc.STM32_RTC_TAMPCR_INIT!"0"}
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 ${doc.STM32_SERIAL_USE_USART1!"FALSE"}
+#define STM32_SERIAL_USE_USART2 ${doc.STM32_SERIAL_USE_USART2!"FALSE"}
+#define STM32_SERIAL_USE_USART3 ${doc.STM32_SERIAL_USE_USART3!"FALSE"}
+#define STM32_SERIAL_USE_UART4 ${doc.STM32_SERIAL_USE_UART4!"FALSE"}
+#define STM32_SERIAL_USE_LPUART1 ${doc.STM32_SERIAL_USE_LPUART1!"TRUE"}
+#define STM32_SERIAL_USART1_PRIORITY ${doc.STM32_SERIAL_USART1_PRIORITY!"3"}
+#define STM32_SERIAL_USART2_PRIORITY ${doc.STM32_SERIAL_USART2_PRIORITY!"3"}
+#define STM32_SERIAL_USART3_PRIORITY ${doc.STM32_SERIAL_USART3_PRIORITY!"3"}
+#define STM32_SERIAL_UART4_PRIORITY ${doc.STM32_SERIAL_UART4_PRIORITY!"3"}
+#define STM32_SERIAL_LPUART1_PRIORITY ${doc.STM32_SERIAL_LPUART1_PRIORITY!"3"}
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 ${doc.STM32_SPI_USE_SPI1!"FALSE"}
+#define STM32_SPI_USE_SPI2 ${doc.STM32_SPI_USE_SPI2!"FALSE"}
+#define STM32_SPI_SPI1_RX_DMA_STREAM ${doc.STM32_SPI_SPI1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_SPI_SPI1_TX_DMA_STREAM ${doc.STM32_SPI_SPI1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_SPI_SPI2_RX_DMA_STREAM ${doc.STM32_SPI_SPI2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_SPI_SPI2_TX_DMA_STREAM ${doc.STM32_SPI_SPI2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_SPI_SPI1_DMA_PRIORITY ${doc.STM32_SPI_SPI1_DMA_PRIORITY!"1"}
+#define STM32_SPI_SPI2_DMA_PRIORITY ${doc.STM32_SPI_SPI2_DMA_PRIORITY!"1"}
+#define STM32_SPI_SPI1_IRQ_PRIORITY ${doc.STM32_SPI_SPI1_IRQ_PRIORITY!"2"}
+#define STM32_SPI_SPI2_IRQ_PRIORITY ${doc.STM32_SPI_SPI2_IRQ_PRIORITY!"2"}
+#define STM32_SPI_DMA_ERROR_HOOK(spip) ${doc.STM32_SPI_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY ${doc.STM32_ST_IRQ_PRIORITY!"2"}
+#define STM32_ST_USE_TIMER ${doc.STM32_ST_USE_TIMER!"2"}
+
+/*
+ * TRNG driver system settings.
+ */
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 ${doc.STM32_UART_USE_USART1!"FALSE"}
+#define STM32_UART_USE_USART2 ${doc.STM32_UART_USE_USART2!"FALSE"}
+#define STM32_UART_USE_USART3 ${doc.STM32_UART_USE_USART3!"FALSE"}
+#define STM32_UART_USE_UART4 ${doc.STM32_UART_USE_UART4!"FALSE"}
+#define STM32_UART_USART1_RX_DMA_STREAM ${doc.STM32_UART_USART1_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART1_TX_DMA_STREAM ${doc.STM32_UART_USART1_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART2_RX_DMA_STREAM ${doc.STM32_UART_USART2_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART2_TX_DMA_STREAM ${doc.STM32_UART_USART2_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART3_RX_DMA_STREAM ${doc.STM32_UART_USART3_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART3_TX_DMA_STREAM ${doc.STM32_UART_USART3_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_UART4_RX_DMA_STREAM ${doc.STM32_UART_UART4_RX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_UART4_TX_DMA_STREAM ${doc.STM32_UART_UART4_TX_DMA_STREAM!"STM32_DMA_STREAM_ID_ANY"}
+#define STM32_UART_USART1_IRQ_PRIORITY ${doc.STM32_UART_USART1_IRQ_PRIORITY!"3"}
+#define STM32_UART_USART2_IRQ_PRIORITY ${doc.STM32_UART_USART2_IRQ_PRIORITY!"3"}
+#define STM32_UART_USART3_IRQ_PRIORITY ${doc.STM32_UART_USART3_IRQ_PRIORITY!"3"}
+#define STM32_UART_UART4_IRQ_PRIORITY ${doc.STM32_UART_UART4_IRQ_PRIORITY!"3"}
+#define STM32_UART_USART1_DMA_PRIORITY ${doc.STM32_UART_USART1_DMA_PRIORITY!"0"}
+#define STM32_UART_USART2_DMA_PRIORITY ${doc.STM32_UART_USART2_DMA_PRIORITY!"0"}
+#define STM32_UART_USART3_DMA_PRIORITY ${doc.STM32_UART_USART3_DMA_PRIORITY!"0"}
+#define STM32_UART_DMA_ERROR_HOOK(uartp) ${doc.STM32_UART_DMA_ERROR_HOOK!"osalSysHalt(\"DMA failure\")"}
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG ${doc.STM32_WDG_USE_IWDG!"FALSE"}
+
+#endif /* MCUCONF_H */
diff --git a/tools/updater/update_mcuconf_stm32g071xx.sh b/tools/updater/update_mcuconf_stm32g071xx.sh
new file mode 100644
index 000000000..caf6708a1
--- /dev/null
+++ b/tools/updater/update_mcuconf_stm32g071xx.sh
@@ -0,0 +1,29 @@
+#!/bin/bash
+if [ $# -eq 2 ]
+ then
+ if [ $1 = "rootpath" ]
+ then
+ find $2 -name "mcuconf.h" -exec bash update_mcuconf_stm32g071xx.sh "{}" \;
+ else
+ echo "Usage: update_mcuconf_stm32g071xx.sh [rootpath ]"
+ fi
+elif [ $# -eq 1 ]
+then
+ declare conffile=$(<$1)
+ if egrep -q "STM32G071_MCUCONF" <<< "$conffile"
+ then
+ echo Processing: $1
+ egrep -e "\#define\s+[a-zA-Z0-9_()]*\s+[a-zA-Z0-9_]" <<< "$conffile" | sed -r 's/\#define\s+([a-zA-Z0-9_]*)(\([^)]*\))?\s+/\1=/g' > ./values.txt
+ if ! fmpp -q -C conf.fmpp -S ../ftl/processors/conf/mcuconf_stm32g071xx
+ then
+ echo
+ echo "aborted"
+ exit 1
+ fi
+ cp ./mcuconf.h $1
+ rm ./mcuconf.h ./values.txt
+ fi
+else
+ echo "Usage: update_mcuconf_stm32g071xx.sh [rootpath ]"
+ echo " update_mcuconf_stm32g071xx.sh ]"
+fi